Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
Introduction
The Atmel® ATF15xx-DK3 Complex Programmable Logic Device (CPLD) Development/Programmer Kit is a
complete development system and an In-System Programming (ISP) programmer for the Atmel ATF15xx
Family of industry standard pin compatible CPLDs with Logic Doubling® features. This kit provides designers a
very quick and easy way to develop prototypes and evaluate new designs with an ATF15xx ISP CPLD. The
ATF15xx Family of ISP CPLDs includes the Atmel ATF15xxAS, ATF15xxASL, ATF15xxASV, and
ATF15xxASVL CPLDs. With the availability of the different socket adapter boards to support most of the
package types(1) offered in the ATF15xx Family of ISP CPLDs, this kit can be used as an ISP programmer to
program the ATF15xx ISP CPLDs in most of the available package types(1) through the industry standard JTAG
interface (IEEE 1149.1).
Kit Contents
Atmel CPLD Development/Programmer Board (P/N: ATF15xx-DK3)
Atmel 44-pin TQFP Socket Adapter Board (P/N: ATF15xx-DK3-SAA44)(2)
Atmel ATF15xx LPT-based JTAG ISP Download Cable (P/N: ATDH1150VPC)
Two Atmel 44-pin TQFP Sample Devices
Device Support
The ATF15xx-DK3 CPLD Development/Programmer Kit supports the following devices in all currently available
Atmel speed grades and packages (except the 100-PQFP):
ATF1502AS/ASL
ATF1504AS/ASL
ATF1508ASV/ASVL
ATF1502ASV
ATF1504ASV/ASVL
ATF1508AS/ASL
1. The socket adapter board is not offered for the 100-pin PQFP.
2. Only the 44-pin TQFP Socket Adapter Board is included in this kit. Other socket adapter boards are sold separately. See
Section, “Hardware Description” for more information on socket adapter board ordering codes.
ATF15xx-DK3
CPLD Development/Programmer Kit
USER GUIDE
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
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Table of Contents
Kit Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
CPLD Development/Programmer Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Logic Doubling CPLDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
ATF15xx ISP Download Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
PLD Development Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
System Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Hardware Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
CPLD Development/Programmer Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7-segment Displays with Selectable Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
LEDs with Selectable Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Push-button Switches with Selectable Jumpers for I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Push-button Switches with Selectable Jumpers for GCLR and OE1 Pins . . . . . . . . . . . . . . . . . . . . . 9
2MHz Oscillator and Clock Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
VCCIO and VCCINT Voltage Selection Jumpers and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
ICCIO and ICCINT Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power Supply Switch and Power LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power Supply Jack and Power Supply Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
JTAG ISP Connector and TDO Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Socket Adapter Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Atmel ATF15xx ISP Download Cable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
References and Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Atmel ProChip Designer Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Atmel WinCUPL Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Atmel ATMISP Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Atmel POF2JED Conversion Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
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Kit Features
CPLD Development/Programmer Board
10-pin JTAG-ISP Port
Regulated Power Supply Circuits for 9VDC Power Source
Selectable 5V, 3.3V, 2.5V, or 1.8V I/O Voltage Supply
Selectable 1.8V, 3.3V, or 5.0V Core Voltage Supply
44-pin TQFP Socket Adapter Board
Headers for I/O Pins of the ATF15xx Device
2MHz Crystal Oscillator
Four 7-segment LED Displays
Eight Individual LEDs
Eight Push-button Switches
Global Clear and Output Enable Push-button Switches
Current Measurement Jumpers
Logic Doubling CPLDs
ATF15xx ISP CPLD with Logic Doubling Architecture
ATF15xx ISP Download Cable
5V, 3.3V, 2.5V, or 1.8V ISP Download Cable for PC Parallel Printer (LPT) Port
PLD Development Software
The Atmel PLD development software tools are available online for PLD designer’s use of the ATF15xx
ISP CPLDs. Please reference the Overview document, “PLD Design Software Overview” available at:
http://www.atmel.com/images/atmel-3629-pld-design-software-overview.pdf
System Requirements
The minimum hardware and software required to program an ATF15xx ISP CPLD device which is
designed using the Atmel ProChip Designer Software on the CPLD Development/Programmer Board
through the Atmel ATMISP v6.x (ATF15xx CPLD ISP Software) are:
x86 Microprocessor-based Computer
Windows XP®, Windows® 98, Windows NT® 4.0, or Windows 2000
128-MByte RAM
500-MByte Free Hard Disk Space
Windows-supported Mouse
Available Parallel Printer (LPT) Port
9VDC Power Supply with 500mA of Supply Current
SVGA Monitor (800 x 600 Resolution)
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Ordering Information
Hardware Description
CPLD Development/Programmer Board
The CPLD Development/Programmer and Socket Adapter Boards shown in the below figure contain
features that are useful for developing, prototyping, or evaluating ATF15xx CPLD designs. Features
that make this a very versatile starter/development kit and an ISP programmer for the ATF15xx family
of JTAG-ISP CPLDs include:
Figure 1. CPLD Development/Programmer Kit with 44-pin TQFP Socket Adapter Board
Atmel Part Number Description
ATF15xx-DK3 CPLD Development/Programmer Kit (includes the ATF15xxDK3-SAA44*)
ATF15xxDK3-SAA100 100-pin TQFP Socket Adapter Board for DK3 Board
ATF15xxDK3-SAJ44 44-pin PLCC Socket Adapter Board for DK3 Board
ATF15xxDK3-SAJ84 84-pin PLCC Socket Adapter Board for DK3 Board
ATF15xxDK3-SAA44* 44-pin TQFP Socket Adapter Board for DK3 Board
Push-button Switches
LEDs
7-segment Displays
2MHz Crystal Oscillator
5V, 3.3V, 2.5V, or 1.8V VCCIO Selector
1.8V, 3.3V, or 5.0V VCCINT Selector
JTAG ISP Port
Socket Adapters
Voltage
Regulators
GCLR
Switch
GOE
Switch
VccIO
Selector
VCCINT Selector
VccIO LED
VccINT LED
Power LED
Clock Selector
Power Switch
Oscillator
Power Supply Jack
Power Supply Header
JTAG Cascade Jumper
JTAG ISP Header
g
7-Segment
Displays
ATF15xxDK3-SAA44
Socket Adapter Board
User I/O
Pin Headers
LEDs
Device Socket
Push-Button Switches
IccINT Jumper
IccIO Jumper
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7-segment Displays with Selectable Jumpers
The CPLD Development/Programmer Board contains four 7-segment displays which allow the
observation of the ATF15xx CPLD outputs. These four displays are labeled as DSP1, DSP2, DSP3,
and DSP4. The 7-segment displays have common anode LEDs with the common anode lines
connected to the VCCIO (I/O supply voltage for the CPLD) through a series of resistors with selectable
jumpers labeled as JPDSP1, JPDSP2, JPDSP3, and JPDSP4. These jumpers can be removed to
disable the displays by unconnecting the VCCIO to the displays. Individual cathode lines are connected
to the I/O pins of the ATF15xx CPLD on the CPLD Development/Programmer Kit. To turn on a
particular segment, including the DOT of a display, the corresponding ATF15xx I/O pin connected to
this LED segment must be in a logic low state with the corresponding selectable jumper set; therefore,
the outputs of the ATF15xx device will require configuration for active-low outputs in the design file.
The displays work best at 2.5V VCCIO or higher.
Each segment of each display is hard-wired to one specific I/O pin of the ATF15xx device. For the
higher pin count devices (100-pin and larger), all seven segments and the DOT segments of the four
displays are connected to the I/O pins; however, for the lower pin count devices, only a subset of the
displays, first and fourth displays, are connected to the ATF15xx device’s I/O pins. Tables 1 and 2
show the 7-segment display package connections to the ATF15xx device. The circuit schematic of the
displays and jumpers is shown in the figure below.
Figure 2. Circuit Diagram of 7-segment Display and Jumpers
a
b
c
d
e
f
Vc1
Vc2
g
a
b
c
d
e
fg
DOT
DSP1
a
b
c
d
e
f
Vc1
Vc2
g
a
b
c
d
e
fg
DOT
DSP2
a
b
c
d
e
f
Vc1
Vc2
g
a
b
c
d
e
fg
DOT
DSP3
a
b
c
d
e
f
Vc1
Vc2
g
a
b
c
d
e
fg
DOT
DSP4
RDSP21
RDSP22
RDSP23
RDSP24
RDSP25
RDSP26
RDSP27
RDSP31
RDSP32
RDSP33
RDSP34
RDSP35
RDSP36
RDSP37
RDSP41
RDSP42
RDSP43
RDSP44
RDSP45
RDSP46
RDSP47
VccIO
DOT2
DOT3
DOT4
RDOT2 RDOT3 RDOT4
D4A
D4B
D4C
D4D
D4E
D4F
D4G
JPDSP1
JPLED1
JPDSP2
JPLED2
JPDSP3
JPLED3
JPDSP4
JPLED4
RDOT1
RDSP11
RDSP12
RDSP13
RDSP14
RDSP15
RDSP16
RDSP17
DOT1
D1A
D1B
D1C
D1D
D1E
D1F
D1G
D2A
D2B
D2C
D2D
D2E
D2F
D2G
D3A
D3B
D3C
D3D
D3E
D3F
D3G
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Table 1. ATF15xx 44-pin Connections to 7-segment Displays
Table 2. ATF15xx 84-pin and 100-pin Connections to 7-segment Displays
44-pin TQFP 44-pin PLCC
DSP/Segment PLD Pin DSP/Segment PLD Pin DSP/Segment PLD Pin DSP/Segment PLD Pin
1/A 27 3/A NC 1/A 33 3/A NC
1/B 33 3/B NC 1/B 39 3/B NC
1/C 30 3/C NC 1/C 36 3/C NC
1/D 21 3/D NC 1/D 27 3/D NC
1/E 18 3/E NC 1/E 24 3/E NC
1/F 23 3/F NC 1/F 29 3/F NC
1/G 20 3/G NC 1/G 26 3/G NC
1/DOT 31 3/DOT NC 1/DOT 37 3/DOT NC
2/A NC 4/A 3 2/A NC 4/A 9
2/B NC 4/B 10 2/B NC 4/B 16
2/C NC 4/C 6 2/C NC 4/C 12
2/D NC 4/D 43 2/D NC 4/D 5
2/E NC 4/E 35 2/E NC 4/E 41
2/F NC 4/F 42 2/F NC 4/F 4
2/G NC 4/G 34 2/G NC 4/G 40
2/DOT NC 4/DOT 11 2/DOT NC 4/DOT 17
84-pin PLCC 100-pin TQFP
DSP/Segment PLD Pin DSP/Segment PLD Pin DSP/Segment PLD Pin DSP/Segment PLD Pin
1/A 68 3/A 22 1/A 67 3/A 13
1/B 74 3/B 28 1/B 71 3/B 19
1/C 70 3/C 25 1/C 69 3/C 16
1/D 63 3/D 21 1/D 61 3/D 8
1/E 58 3/E 16 1/E 57 3/E 83
1/F 65 3/F 17 1/F 64 3/F 6
1/G 61 3/G 12 1/G 60 3/G 92
1/DOT 73 3/DOT 29 1/DOT 75 3/DOT 20
2/A 52 4/A 5 2/A 52 4/A 100
2/B 57 4/B 10 2/B 54 4/B 94
2/C 55 4/C 8 2/C 47 4/C 97
2/D 48 4/D 79 2/D 41 4/D 81
2/E 41 4/E 76 2/E 46 4/E 76
2/F 50 4/F 77 2/F 40 4/F 80
2/G 45 4/G 75 2/G 45 4/G 79
2/DOT 50 4/DOT 11 2/DOT 56 4/DOT 93
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LEDs with Selectable Jumpers
The CPLD Development/Programmer Board has eight individual LEDs, which allow designers to
display the output signals from the user I/Os of the ATF15xx devices. These eight LEDs are labeled
LED1 to LED8 on the CPLD Development/Programmer Board. The cathode of each LED is connected
to Ground (GND) through a series resistor, while the anode of each LED is connected to a user I/O pin
of the CPLD through the JPL1/2/3/4/5/6/7/8 selectable jumper. These jumpers can be removed to
disable the LEDs by unconnecting the anodes of the LEDs to the I/O pins of the CPLD. The figure
below illustrates the circuit diagram of the LEDs with the selection jumpers.
To turn on a particular LED, the corresponding ATF15xx I/O pin connected to the LED must be in a
logic high state with the corresponding jumper set; therefore, the outputs of the ATF15xx device will
need to be configured as active high outputs. The LEDs work best at 2.5V VCCIO or higher.
The lower pin count devices (44-pin) only have four I/Os connected to LED1/2/3/4. For the higher
pin-count devices (100-pin and larger), all eight LEDs are connected to the I/Os of the device. Table 3
shows the different package connections of the CPLD I/Os to the LEDs.
Figure 3. Circuit Diagram of the LEDs and Jumpers
Table 3. ATF15xx Connections to LEDs
44-pin TQFP 44-pin PLCC 84-pin PLCC 100-pin TQFP
LED PLD Pin LED PLD Pin LED PLD Pin LED PLD Pin
LED1 28 LED1 34 LED1 69 LED1 68
LED2 25 LED2 31 LED2 67 LED2 65
LED3 22 LED3 28 LED3 64 LED3 63
LED4 19 LED4 25 LED4 60 LED4 58
LED5 27 LED5 17
LED6 24 LED6 14
LED7 18 LED7 10
LED8 15 LED8 9
LED8
GREEN
LED7
GREEN
LED6
GREEN
LED5
GREEN
JPL8
SIP2
JPL7
SIP2
JPL6
SIP2
JPL5
SIP2
RL8
330
RL7
330
RL6
330
RL5
330
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
LED4
GREEN
LED3
GREEN
LED2
GREEN
LED1
GREEN
JPL4
SIP2
JPL3
SIP2
JPL2
SIP2
JPL1
SIP2
RL4
330
RL3
330
RL2
330
RL1
330
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Push-button Switches with Selectable Jumpers for I/O Pins
The CPLD Development/Programmer Board contains eight push-button switches, which are
connected to the I/O pins of the CPLD. The switches send input logic signals to the user I/O pins of the
ATF15xx device. These switches are labeled SW1 to SW8 on the CPLD Development/Programmer
Board. One end of each input push-button switch is connected to VCCIO, while the other end of each
push-button switch is connected to a pull-down resistor and then connected to the specific I/O pin of
the CPLD through the JPS1/2/3/4/5/6/7/8 selectable jumper.
If any one of these switches is pressed and the corresponding jumper is set, the specific I/O pin of the
device will be driven to a logic high state by the output of switch circuit. Since each push-button switch
is also connected to a pull-down resistor, the input will have a logic low state if the switch is not pressed
with the corresponding jumper set. If the push-button jumper is not set, the corresponding pin will be
treated as an unconnected pin. Figure 4 is a circuit diagram of the push-button switch and selectable
jumper. Table 4 shows the connections of these eight push-button switches to the CPLD I/O pins in the
different package types.
Figure 4. Circuit Diagram of the Push-button Switches and Jumpers for the I/O Pins
Table 4. ATF15xx Connections to the I/O Pin Switches
44-pin TQFP 44-pin PLCC 84-pin PLCC 100-pin TQFP
Push Button PLD Pin Push Button PLD Pin Push Button PLD Pin Push Button PLD Pin
SW1 15 SW1 21 SW1 54 SW1 48
SW2 14 SW2 20 SW2 51 SW2 36
SW3 13 SW3 19 SW3 49 SW3 44
SW4 12 SW4 18 SW4 44 SW4 37
SW5 8 SW5 14 SW5 9 SW5 96
SW6 5 SW6 11 SW6 6 SW6 98
SW7 2 SW7 8 SW7 4 SW7 84
SW8 44 SW8 6 SW8 80 SW8 99
R19
1K
SW1
VCCIO
C13
0.001uF
JPS1
SIP2
SW1
R29
1K
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Push-button Switches with Selectable Jumpers for GCLR and OE1 Pins
The CPLD Development/Programmer Board contains two push-button switches for the Global Clear
(GCLR) and Output Enable (OE1) pins of the CPLD. The switches control the logic states of the OE1
and GCLR inputs of the ATF15xx devices. These switches are labeled SW-GCLR and SW-GOE1 on
the board. One end of the SW-GCLR input push-button switch is connected to GND. The other end of
the push-button switch is connected to a pull-up resistor to VCCIO, and then connected to the GCLR
dedicated input pin of the ATF15xx device. It is intended to be used as an active-low reset signal to
reset the registers in the ATF15xx device with the JPGCLR selectable jumper set. Similarly, one end of
the SW-GOE1 input push-button switch is connected to GND. The other end of the push-button switch
is connected to a pull-up resistor to VCCIO, and then connected to the OE1 dedicated input pin of the
ATF15xx device. It is intended to be used as an active-low output enable signal to control the
enabling/disabling of the tri-state output buffers in the ATF15xx with the JPGOE selectable jumper set.
Figure 5 is the circuit diagram of the push-button switches and the jumpers for the GCLR and OE1
pins.
If any of these push-button switches is pressed and the corresponding jumper is set, the specific I/O of
the CPLD will be driven to a logic low state. Since each push-button is also connected to a pull-up
resistor, the corresponding CPLD input will have a logic high state if the push-button switch is not
pressed with the corresponding selectable jumper set. If the selectable jumper is not set, the
corresponding dedicated input pin of the CPLD can be considered a No Connect (NC) pin. Table 5
shows the pin numbers of the GCLR and OE1 dedicated input pins of the ATF15xx devices in all
available package types.
Figure 5. Circuit Diagram of Push-button Switches and Selectable Jumpers for GCLR and OE1
Table 5. Pin Numbers of GCLR and OE1
44-pin TQFP 44-pin PLCC 84-pin PLCC 100-pin TQFP
GCLR 39 1 1 89
OE1 38 44 84 88
GCLR
R15
1K
R16
1K
VccIO
JPGCLR JPGOE GOE
C7
0.001uF
C8
0.001uF
SW-GCLR
SW-GCLR
SW-GOE
SW-GOE
R37
1K
R38
1K
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2MHz Oscillator and Clock Selection Jumper
The Clock Selection Jumper labeled JP-GCLK on the CPLD Development/Programmer Board is a
two-position jumper that allows the users to select which GCLK dedicated input pin (either GCLK1 or
GCLK2) of the ATF15xx device should be connected to the output of the 2MHz oscillator. In addition,
the jumper can be removed to allow an external clock source to be connected to GCLK1 and/or GCLK2
of the ATF15xx device. Figure 6 is an illustration of the circuit diagram of the oscillator and selection
jumper. Table 6 shows the pin numbers for the GCLK1 and GCLK2 dedicated input pins of the
ATF15xx device in all the different available package types.
Figure 6. Circuit Diagram of Oscillator and Clock Selection Jumper
If GCLK1 jumper is set, the jumper will be located toward the side of the board. On the other
hand, if GCLK2 jumper is set, the jumper will be located toward the middle of the board.
Table 6. Pin Numbers of GCLK1 and GCLK2
44-pin TQFP 44-pin PLCC 84-pin PLCC 100-pin TQFP
GCLK1 37 43 83 87
GCLK2 40 2 2 90
1 4
2 3
OSC
2MHZ
GCLK2 GCLK1
1
2
3
JPGCLK
R18
1K
R17
1K
VccOSC
C21
0.1uF
R39
100
11
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
VCCIO and VCCINT Voltage Selection Jumpers and LEDs
The VCCIO and VCCINT Voltage Selection Jumpers, labeled VCCIO Selector and VCCINT Selector
respectively on ATF15xx-DK3 Development/Programming Kit, allow the selection of the I/O supply
voltage level (VCCIO) and core supply voltage level (VCCINT) that are used for the target CPLD on the
kit. Once these jumpers are set correctly, the LEDs (labeled VCCINT LED and VCCIO LED) will turn
on; however, at lower supply voltage levels (i.e. 2.5V or lower), the LEDs might be very dim.
For ATF15xxAS/ASL (5.0V) CPLDs, both the VCCIO Selector and VCCINT Selector jumpers
must be set to 5.0V.
For ATF15xxASV/ASVL (3.3V) CPLDs, both the VCCIO Selector and VCCINT Selector Jumpers
must be set to 3.3V only.
ICCIO and ICCINT Jumpers
The ICCIO and ICCINT jumpers can be removed and used as ICC measurement points. When the
jumpers are removed, current meters can be connected to the posts to measure the current
consumption of the target CPLD. When users are not using these jumpers to measure the current,
these jumpers must be set in order for the kit and CPLD to operate.
Voltage Regulators
Two voltage regulators, labeled VR1 and VR2, are used to independently generate and regulate the
VCCINT and VCCIO voltages from the 9VDC power supply. For details, please see the ATF15xx-DK3 kit
schematic, Figure 12.
Power Supply Switch and Power LED
The Power Supply Switch, labeled POWER SWITCH, can be switched to the on or off position, which
is used to turn on or off the power of the ATF15xx-DK3 board respectively. It allows the 9VDC voltage
at the Power Supply Jack to pass to the voltage regulators when it is in the on position. When the
Power Supply Switch is turned on, the Power LED (labeled POWER LED) will light up to indicate that
the ATF15xx-DK3 Kit is supplied with power.
Power Supply Jack and Power Supply Header
The ATF15xx-DK3 board contains two different types of power supply connectors labeled JPower and
JP Power. Either one of these power supply connectors can be used to connect a 9VDC power source
to the kit. The first power connector labeled JPower, is a barrel power jack with a 2.1mm diameter post,
and it mates to a 2.1mm (inner diameter) x 5.5mm (outer diameter) female plug. The second power
supply header labeled JP Power, is a 4-pin male 0.100" header with 0.025" square posts. The
availability of these two types of power connectors allows the users to choose the type of power supply
equipment to use for ATF15xx-DK3 Development/Programmer Kit.
The power of the CPLD Development/Programmer Kit must be turned OFF when
changing the position of the VCCIO or VCCINT Voltage Selection Jumper (VCCIO
Selector or VCCINT Selector).
Only one of these two power supply connectors should be powered with a 9VDC
source but not both at the same time.
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
12
JTAG ISP Connector and TDO Selection Jumper
The JTAG ISP Connector labeled JTAG-IN, is used to connect the ATF15xx JTAG port pins (TCK, TDI,
TMS, and TDO) through the ISP download cable to the parallel printer (LPT) port of a PC for JTAG ISP
programming of the ATF15xx device. Polarized connectors are used on the ATF15xx-DK3 and ISP
Download Cable to minimize connection problems. The PIN1 label at the bottom of the JTAG ISP
connector indicates the pin 1 position of the 10-pin header and further reduces the chance of
connecting the ISP Download Cable incorrectly.
To the left of the JTAG-IN connector, there are two columns of vias, and they are labeled JTAG-OUT.
They are intended to allow the users to create a JTAG daisy chain to perform JTAG operations to
multiple devices. Users will need to solder the same type of connector as the one used for JTAG-IN
into the JTAG-OUT position in order to utilize this available feature.
To create a JTAG daisy chain using multiple ATF15xx-DK3 boards, the TDO Selection Jumper,
labeled JP-TDO, must be set to the appropriate position. For all the devices in the daisy chain except
the last device, this jumper must be set to the TO NEXT DEVICE position. For the last device in the
chain, this jumper must be set to the TO ISP CABLE position. When this jumper is in the TO NEXT
DEVICE position, the TDO of that particular JTAG device will be connected to the TDI of the next JTAG
device in the chain. When this jumper is in the TO ISP CABLE position, the TDO of that device will be
connected to the TDO of the JTAG 10-pin connector, which will allow the TDO signal of the that device
in the chain to be transmitted back to the host PC with the ISP software. The figure below is a circuit
diagram of the JTAG connectors and the JP-TDO jumper. The table below lists the pin numbers of the
four JTAG pins for the ATF15xx device in all the available packages.
For a single device setup, the position of the JP-TDO jumper must be set to TO ISP CABLE.
Figure 7. Circuit Diagram of the JTAG ISP Connectors and TDO Jumper
Table 7. Pin Numbers of JTAG Port Signals
44-pin TQFP 44-pin PLCC 84-pin PLCC 100-pin TQFP
TDI 1 7 14 4
TDO 32 38 71 73
TMS 7 13 23 15
TCK 26 32 62 62
1 4
2 3
OSC
2MHZ
GCLK2 GCLK1
1
2
3
JPGCLK
R18
1K
R17
1K
VccOSC
C21
0.1uF
R39
100
13
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
The ISP algorithm is controlled by the ATMISP software, which is running on the PC. The four JTAG
signals are generated by the LPT port, and they are buffered by the ISP download cable before going
into the ATF15xx device on the CPLD Development/Programmer board. The 10-pin JTAG Port Header
pinout on the CPLD Development/Programmer board is shown in Figure 8, and the dimensions of this
10-pin male JTAG header are shown in Figure 9.
Figure 8. 10-pin JTAG Port Header Pinout
Figure 9. 10-pin Male Header Dimensions
The 10-pin JTAG Port Header pinout is compatible with the ATDH1150PC/VPC LPT port based cable
and ATDH1150USB USB port based cable, as well as the Altera ByteBlaster/MV/II LPT port based
cables. In addition, the ATMISP v6.7 software allows the use of either the Atmel
ATDH1150PC/VPC/USB cable or the ByteBlaster/MV/II cable to implement ISP.
ATMISP v7.0 only supports the ATDH1150USB cable.
GND
NC
NC
VCC
GND
TDI
NC
TMS
TDO
TCK
10
8
6
4
2
9
7
5
3
1
10-Pin JTAG Port Header
(Top View)
0.100 0.025 Sq.
0.235
Top View Side View
0.100
All dimensions are in inches.
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
14
Socket Adapter Board
The ATF15xx-DK3 CPLD Development/Programmer Socket Adapter Boards (ATF15xx-DK3-XXXXX)
are circuit boards that interface with the ATF15xx-DK3 CPLD Development/Programmer Board. They
are used in conjunction with the ATF15xx-DK3 CPLD Development/Programmer Board to evaluate or
program ATF15xx ISP CPLD devices in different package types. There are four Socket Adapter
Boards available for the ATF15xx-DK3 covering the 44-TQFP, 44-PLCC, 84-PLCC, and 100-TQFP
package types in the ATF15xx family of CPLDs.
Each socket adapter board contains a socket for the ATF15xx device and has male headers on the
bottom side, labeled JP1 and JP2. The headers on the bottom side mate with the female headers on
the ATF15xx-DK3 board, labeled JP4 and JP3. The four 7-segment displays, push-button switches,
JTAG port signals, oscillator, VCCINT, VCCIO, and GND on the CPLD Development/Programmer Board
are connected to the ATF15xx device on the Socket Adapter Board through these two sets of
connectors.
On the top of the 44-TQFP socket adapter, there are four 10-pin connectors with the same dimensions
as the JTAG ISP connector. The pins of these four connectors are connected to the input and I/O pins
(except the four JTAG pins) of the target CPLD device. They can be used to connect to an oscilloscope
or logic analyzer to capture the activities of the input and I/O pins of the CPLD. They also can be used
to connect the input and I/O pins of the CPLD to other external boards or devices for system level
evaluation or testing.
Atmel ATF15xx ISP Download Cable
The ATF15xx ISP Download Cable (P/N: ATDH1150VPC) connects the LPT port of the PC to the
10-pin JTAG header on the CPLD Development/Programmer Board or a custom circuit board. This is
shown in Figure 10. This ISP cable acts as a buffer to buffer the JTAG signals between the PC’s LPT
port and the ATF15xx on the circuit board. The Power-On LED on the back of the 25-pin male
connector housing indicates that the cable is connected properly.
This ISP cable consists of a 25-pin (DB25) male connector, which is connected to the LPT port of a PC.
The 10-pin female plug connects to the 10-pin male JTAG header on the ISP circuit board. The red
color stripe on the ribbon cable indicates the orientation of pin 1 of the female plug. The 10-pin male
JTAG header on the CPLD Development/Programmer Board is polarized to prevent users from
inserting the female plug in the wrong orientation.
The CPLD Development/Programmer kits includes the ATF15xx ISP Download Cable
(ATDH1150VPC); however, other supported ISP cables can also be used. The ATDH1150VPC,
ATDH1150USB, ByteBlasterMV, and ByteBlasterII cables can be used for the ATF15xx/ASL (5V) and
ATF15xxASV/ASVL (3.3V) devices, while the older ATDH1150PC and the ByteBlaster cables can be
used for the ATF15xxAS/ASL (5V) only.
Be sure this LED is turned on before using the Atmel CPLD ISP Software (ATMISP).
15
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
Figure 10. ATF15xx ISP Download Cable Connection to ISP Hardware Board/Circuit Board
Figure 11 illustrates the 10-pin female header pinout for the ATF15xx ISP Download Cable. The
10-pin male header pinout on the PC board (if used for ISP) must match this pinout.
Figure 11. ATF15xx ISP Download Cable 10-pin Female Header Pinout
Note: The circuit board must supply VCC and GND to the CPLD ISP Cable through the 10-pin male header.
ISP
DOWNLOAD
CABLE
Pin 1
LED
Color Stripe
13579
246810
13579
246810
Color Stripe
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
16
Schematic Diagrams
Figure 12. ATF15xx-D3 Development/Programmer Kit Schematic Diagram
a
b
c
d
e
f
Vc1
Vc2
g
a
b
c
d
e
fg
DOT
DSP1
a
b
c
d
e
f
Vc1
Vc2
g
a
b
c
d
e
fg
DOT
DSP2
a
b
c
d
e
f
Vc1
Vc2
g
a
b
c
d
e
fg
DOT
DSP3
a
b
c
d
e
f
Vc1
Vc2
g
a
b
c
d
e
fg
DOT
DSP4
RDSP2 1
RDSP2 2
RDSP2 3
RDSP2 4
RDSP2 5
RDSP2 6
RDSP2 7
RDSP3 1
RDSP3 2
RDSP3 3
RDSP3 4
RDSP3 5
RDSP3 6
RDSP3 7
RDSP4 1
RDSP4 2
RDSP4 3
RDSP4 4
RDSP4 5
RDSP4 6
RDSP4 7
VccIO
BIGATMEL
MARK
ATMEL
D2
Vin
3
ADJ
1
+Vout 2
VR1
D1
1N4001
POWER SWITCH
C1
100uF
C2
0.1uF
R3
240
R2
510
GCL R
1 4
2 3
OSC
2MHZ
GCLK2 GCLK1
1
2
3
JPGCLK
R18
1K
R17
1K
R15
1K
R16
1K
9VDC
500mA
JPower
9V DC Cente r Positive
C3
0.1uF
LM317 VccIO
VccOSC
DOT2
DOT3
DOT4
RDOT2 RDOT3 RD OT4
D4A
D4B
D4C
D4D
D4E
D4F
D4G
VCCIO GND
GCLK1
TCK
VCCI N T GND
GCLK2
TDO
VCCI OGND
GCLR
TDI
VCCI N TGND
GOE
TMS
1 2
3 4
5 6
7 8
910
JTAG-IN
TCK
TDO
TDI
TMS
R12
4.7K
R14
10K
R13
4.7K
R11
4.7K
R1
1K
R4
270
R5
330
R6
680
JPIO18
1.8V(BE)
JPIO25
2.5V(BE)
JPIO33
3.3V(ASV/BE)
JPIO50
5V(AS)
C4
10uF
VccI N Vin
3
ADJ
1
+Vout 2
VR2
R8
240
R7
510
C5
0.1uF
LM317 VccINT
R9
620
R10
680
JPINT18
1.8V(BE)
JPINT33
3.3V(ASV)
JPINT50
5.0( AS)
C6
10uF
C9
0.1uF
C10
0.1uF
VccI O
C12
0.1uF
JP2
IccINT
JP1
IccIO
JPDSP1
JPLED1
JPDSP2
JPLED2
JPDSP3
JPLED3
JPDSP4
JPLED4
1 2
3 4
5 6
7 8
910
JTAG- OUT
VccIOVccI O
1
2
3
JP-TDO
VccI O
JPGCLR JPGOE GOE
C7
0.001uF
C8
0.001uF
C11
0.1uF
VccI NT
RDOT1
RDSP1 1
RDSP1 2
RDSP1 3
RDSP1 4
RDSP1 5
RDSP1 6
RDSP1 7 DOT1
LED8
GREEN
LED7
GREEN
LED6
GREEN
LED5
GREEN
JPL8
SI P 2
JPL7
SI P 2
JPL6
SI P 2
JPL5
SI P 2
RL8
330
RL7
330
RL6
330
RL5
330
D1A
D1B
D1C
D1D
D1E
D1F
D1G
D2A
D2B
D2C
D2D
D2E
D2F
D2G
D3A
D3B
D3C
D3D
D3E
D3F
D3G
D1 A
D1 B
D1 C
D1 D
D1 E
D1 F
D1 G
D2 A
D2 B
D2 C
D2 D
D2 E
D2 F
D2 G
DOT1
DOT2
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
LED1
LED2
D4 A
D4 B
D4 C
D4 D
D4 E
D4 F
D4 G
D3 A
D3 B
D3 C
D3 D
D3 E
D3 F
D3 G
DOT3
DOT4
LED3
LED4
LED5
LED6
LED7
LED8
LED4
GREEN
LED3
GREEN
LED2
GREEN
LED1
GREEN
JPL4
SI P 2
JPL3
SI P 2
JPL2
SI P 2
JPL1
SI P 2
RL4
330
RL3
330
RL2
330
RL1
330
R19
1K
SW1
VCCIO
C13
0.001uF
JPS1
SI P 2
R21
1K
SW2
VCCIO
C15
0.001uF
JPS2
SI P 2
R23
1K
SW3
VCCIO
C17
0.001uF
JPS3
SI P 2
R25
1K
SW4
VCCIO
C19
0.001uF
JPS4
SI P 2
R20
1K
SW5
VCCIO
C14
0.001uF
JPS5
SI P 2
R22
1K
SW6
VCCIO
C16
0.001uF
JPS6
SI P 2
R24
1K
SW7
VCCIO
C18
0.001uF
JPS7
SI P 2
R26
1K
SW8
VCCIO
C20
0.001uF
JPS8
SI P 2
SW1
SW1
SW2
SW3
SW4
SW5
SW6
SW7
SW8
SW- GCL R
SW- GCL R
SW- GO E
SW- GO E
VCCIN
D3
R27
1K
D4
R28
1K
C21
0.1uF
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP3
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP4
GNDGND
GND GND
GND GND
GND GND
R37
1K
R38
1K
R39
100
R29
1K
SW5
R30
1K
SW6
R32
1K
SW2
R31
1K
SW3
R33
1K
SW7
R34
1K
SW4
R35
1K
SW8
R36
1K
1
2
3
4
JP
JP Power
Vin
3
ADJ
1
+Vout 2
VR3
R41
820
R40
510
C22
0.1uF
LM317
C23
10uF
VCCIN VccOSC
17
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
Figure 13. 44-pin TQFP Socket Adapter Board Schematic Diagram
c1
0.1uF
c2
0.1uF
c3
0.1uF
c4
0.1uF
VCCINT
TDI
TMS
VCCIO
VCCINT
VCCIO
TDO
TCK
VCCINT
GND
GND
GND
GND
VCCIO GND
GCLK1
TCK
VCCINT GND
GCLK2
TDO
VCCIOGND
GCLR
TDI
VCCINTGND
GOE
TMS
D1 A
D1 B
D1 C
D1 D
D1 E
D1 F
D1 G
D2 A
D2 B
D2 C
D2 D
D2 E
D2 F
D2 G
DOT1
DOT2
LED1
LED2
D4 A
D4 B
D4 C
D4 D
D4 E
D4 F
D4 G
D3 A
D3 B
D3 C
D3 D
D3 E
D3 F
D3 G
DOT3
DOT4
LED3
LED4
LED5
LED6
LED7
LED8
SW1
SW2
SW3
SW4
SW5
SW6
SW7
SW8
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP2
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP1
GNDGND
GND GNDGND GND
GND GND
PIN38
PIN39
PIN37
PIN40
1 2
3 4
5 6
7 8
910
JL
1 2
3 4
5 6
7 8
910
JR
1 2
3 4
5 6
7 8
910
JB
1 2
3 4
5 6
7 8
910
JT
ATMEL TQFP44
TDI
1
I/O
2
I/O
3
GND
4
I/O
5
TMS
7
I/O
8
VCC
9
I/O
10
I/O
11
I/O
6
I/O
12
I/O
13
I/O
14
I/O
15
GND
16
VCC
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O 23
GND 24
I/O 25
TCK 26
I/O 27
I/O 28
VCC 29
I/O 30
I/O 31
TDO 32
I/O 33
I/O 34
GCLK3 35
GND 36
GCLK1 37
OE1 38
GCLR 39
I/OE2/GCLK2 40
VCC 41
I/O 42
I/O 43
I/O 44
U1
TQFP44
PIN2
PIN3
PIN5
PIN6
PIN8
PIN10
PIN11
PIN12
PIN13
PIN14
PIN15
PIN18
PIN19
PIN20
PIN21
PIN22
PIN23
PIN25
PIN27
PIN28
PIN30
PIN31
PIN33
PIN34
PIN35
PIN37
PIN38
PIN39
PIN40
PIN42
PIN43
PIN44
PIN34
PIN35
PIN42
PIN43
PIN2 PIN3
PIN5 PIN6
PIN8 PIN10
PIN11
PIN44
PIN34 PIN35
PIN37 PIN38
PIN39 PIN40
PIN42 PIN43
PIN44
PIN2 PIN3
PIN5 PIN6
PIN8 PIN10
PIN11
PIN12 PIN13
PIN14 PIN15
PIN18 PIN19
PIN20 PIN21
PIN22
PIN23
PIN25PIN27
PIN28PIN30
PIN31PIN33
PIN23
PIN25PIN27
PIN28PIN30
PIN31PIN33
PIN18
PIN19PIN20
PIN21
PIN22
PIN12
PIN13
PIN14
PIN15
VCCIO
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
18
Figure 14. 44-pin PLCC Socket Adapter Board Schematic Diagram
ATMEL PLCC44
TDI
7
I/O
8
I/O
9
GND
10
I/O
11
TMS
13
I/O
14
VCC
15
I/O
16
I/O
17
I/O
12
I/O
18
I/O
19
I/O
20
I/O
21
GND
22
VCC
23
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O 29
GND 30
I/O 31
TCK 32
I/O 33
I/O 34
VCC 35
I/O 36
I/O 37
TDO 38
I/O 39
I/O 40
GCLK3 41
GND 42
GCLK1 43
OE1 44
GCLR 1
I/OE2/GCLK2 2
VCC 3
I/O 4
I/O 5
I/O 6
U1
PLCC44
PIN1
PIN2
VCCINT
PIN4
PIN5
PIN6
TDI
PIN8
PIN9
GND
PIN11
PIN12
TMS
PIN14
VCCIO
PIN16
PIN17
PIN18
PIN19
PIN20
PIN21
GND
VCCINT
PIN24
PIN25
PIN26
PIN27
PIN28
PIN29
GND
PIN31
TCK
PIN33
PIN34
VCCI O
PIN36
PIN37
TDO
PIN39
PIN40
PIN41
GND
PIN43
PIN44
VCCI O GND
GCLK1
TCK
VCCI NT GND
GCLK2
TDO
VCCIOGND
GCLR
TDI
VCCINTGND
GOE
TMS
D1 A
D1 B
D1 C
D1 D
D1 E
D1 F
D1 G
D2 A
D2 B
D2 C
D2 D
D2 E
D2 F
D2 G
DOT1
DOT2
LED1
LED2
D4 A
D4 B
D4 C
D4 D
D4 E
D4 F
D4 G
D3 A
D3 B
D3 C
D3 D
D3 E
D3 F
D3 G
DOT3
DOT4
LED3
LED4
LED5
LED6
LED7
LED8
SW1
SW2
SW3
SW4
SW5
SW6
SW7
SW8
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP2
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP1
GNDGND
GND GNDGND GND
GND GND
PIN44
PIN1
PIN43
PIN2
PIN40
PIN41
PIN4
PIN5
PIN8 PIN9
PIN11 PIN12
PIN14 PIN16
PIN17
PIN6
PIN29
PIN31PIN33
PIN34PIN36
PIN37PIN39
PIN24
PIN25PIN26
PIN27
PIN28
PIN18
PIN19
PIN20
PIN21
1 2
3 4
5 6
7 8
910
JL
1 2
3 4
5 6
7 8
910
JB
1 2
3 4
5 6
7 8
910
JR
1 2
3 4
5 6
7 8
910
JT
PIN8 PIN9
PIN11 PIN12
PIN14 PIN16
PIN17
PIN18 PIN19
PIN20 PIN21
PIN24 PIN25
PIN26 PIN27
PIN28
PIN29 PIN31
PIN33 PIN34
PIN36 PIN37
PIN39
PIN40 PIN41
PIN43 PIN44
PIN1 PIN2
PIN4 PIN5
PIN6
c1
0.1uF
c2
0.1uF
c3
0.1uF
c4
0.1uF
VCCINTVCCI O
19
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
Figure 15. 84-pin PLCC Socket Adapter Board Schematic Diagram
INPUT/GCLRn 1
INPUT/OE2/GCLK2 2
VCC_INT 3
I/O 4
I/O 5
I/O 6
GND 7
I/O 8
I/O 9
I/O 10
I/O 11
I/O
12
VCC_IO
13
I/O / TDI
14
I/O
15
I/O
16
I/O
17
I/O
18
GND
19
I/O
20
I/O
21
I/O
22
I/O / TMS
23
I/O
24
I/O
25
VCC_IO
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
GND
32
I/O
33
I/O
34
I/O
35
I/O
36
I/O
37
VCC_IO
38
I/O
39
I/O
40
I/O
41
GND
42
VCC_INT
43
I/O
44
I/O
45
I/O
46
GND
47
I/O
48
I/O
49
I/O
50
I/O
51
I/O
52
VCC_IO
53
I/O 54
I/O 55
I/O 56
I/O 57
I/O 58
GND 59
I/O 60
I/O 61
I/O / TCK 62
I/O 63
I/O 64
I/O 65
VCC_ I O 66
I/O 67
I/O 68
I/O 69
I/O 70
I/O / TDO 71
GND 72
I/O 73
I/O 74
I/O 75
I/O 76
I/O 77
VCC_IO 78
I/O 79
I/O 80
I/O 81
GND 82
INPUT/GCLK1 83
INPUT/OE1 84
ATMEL
ATF1508AS-15JC84
U1
PIN1
GND
GND
GND
GND
GND
GND
GND
GND
VCCINT
VCCIO
VCCIO
VCCIO
VCCI O
VCCIO
VCCIO
VCCINT
PIN84
PIN83
PIN2
TDI
TMS
TDO
TCK
C1
0.1uF
C2
0.1uF
C3
0.1uF
C5
0.1uF
VCCI O
SMALLATMEL
MARK1
PIN4
PIN5
PIN6
PIN8
PIN9
PIN10
PIN11
PIN12
PIN15
PIN16
PIN17
PIN18
PIN20
PIN21
PIN22
PIN24
PIN25
PIN27
PIN28
PIN29
PIN30
PIN31
PIN33
PIN34
PIN35
PIN36
PIN37
PIN39
PIN40
PIN41
PIN44
PIN45
PIN46
PIN48
PIN49
PIN50
PIN51
PIN52
PIN54
PIN55
PIN56
PIN57
PIN58
PIN60
PIN61
PIN63
PIN64
PIN65
PIN67
PIN68
PIN69
PIN70
PIN73
PIN74
PIN75
PIN76
PIN77
PIN79
PIN80
PIN81
PIN1 PIN84
PIN83
PIN2PIN4
PIN5PIN6
PIN8PIN9
PIN10PIN11
PIN75
PIN76PIN77
PIN79PIN80
PIN81
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
JP3
JPTOP
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
JP4
JPLEFT
PIN12
PIN15 PIN16
PIN17PIN18
PIN20
PIN21
PIN22
PIN24
PIN25
PIN27
PIN28
PIN29 PIN30
PIN31
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
JP6
JPBOTTOM
PIN33 PIN34
PIN35 PIN36
PIN37 PIN39
PIN40 PIN41
PIN44 PIN45
PIN46 PIN48
PIN49 PIN50
PIN51 PIN52
VCCI O GND
GCLK1
TCK
VCCI N T GND
GCLK2 TDO
VCCI OGND
GCLR
TDI
VCCI N TGND
GOE
TMS
D1 A
D1 B
D1 C
D1 D
D1 E
D1 F
D1 G
D2 A
D2 B
D2 C
D2 D
D2 E
D2 F
D2 G
DOT1
DOT2
LED1
LED2
D4 A
D4 B
D4 C
D4 D
D4 E
D4 F
D4 G
D3 A
D3 B
D3 C
D3 D
D3 E
D3 F
D3 G
DOT3
DOT4
LED3
LED4
LED5
LED6
LED7
LED8
SW1
SW2
SW3
SW4
SW5
SW6
SW7
SW8
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP2
IDC40
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP1
IDC40
GNDGND
GND GND
GND GND
GND GND
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
JP5
JPBOTTOM
PIN1
PIN2
PIN83
PIN84
PIN5
PIN6 PIN8
PIN9
PIN12
PIN15
PIN18
PIN16
PIN21
PIN17
PIN24
PIN25
PIN22
PIN29 PIN28
PIN37
PIN39PIN40
PIN41PIN44
PIN45PIN46
PIN48PIN49
PIN50PIN51 PIN52
PIN58
PIN60PIN61
PIN63
PIN64PIN65
PIN67PIN68
PIN69PIN70
PIN73PIN74
PIN54PIN55
PIN56PIN57
PIN58 PIN60
PIN61 PIN63
PIN64 PIN65
PIN67 PIN68
PIN69 PIN70
PIN73 PIN74
C7
0.1uF
C8
0.1uF
C4
0.1uF
C6
0.1uF
VCCI N T
PIN11
PIN10
PIN4
PIN80
PIN79
PIN75
PIN77
PIN57
PIN55
PIN48
PIN41
PIN50
PIN45
PIN56
PIN54
PIN51
PIN49
PIN44
PIN27
PIN76
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
20
Figure 16. 100-pin TQFP Socket Adapter Board Schematic Diagram
I/On
1
I/On
2
VCCI O
3
TDI
4
I/On
5
I/O
6
I/On
7
I/O
8
I/O
9
I/O
10
GND
11
I/O
12
I/O
13
I/O
14
TMS
15
I/O
16
I/O
17
VCCI O
18
I/O
19
I/O
20
I/O
21
I/On
22
I/O
23
I/On
24
I/O
25
GND
26
I/On
27
I/On
28
I/O
29
I/O
30
I/O
31
I/O
32
I/O
33
VCCIO
34
I/O
35
I/O
36
I/O
37
GND
38
VCCINT
39
I/O
40
I/O
41
I/O
42
GND
43
I/O
44
I/O
45
I/O
46
I/O
47
I/O
48
I/On
49
I/On
50
VCCI O 51
I/O 52
I/On 53
I/O 54
I/On 55
I/O 56
I/O 57
I/O 58
GND 59
I/O 60
I/O 61
TCK 62
I/O 63
I/O 64
I/O 65
VCCI O 66
I/O 67
I/O 68
I/O 69
I/On 70
I/O 71
I/On 72
TDO 73
GND 74
I/O 75
ATMEL TQFP100
I/O 76
I/On 77
I/O 78
I/On 79
I/O 80
I/O 81
VCCIO 82
I/O 83
I/O 84
I/O GCLK3 85
GND 86
GCLK1 87
OE1 88
GCLR 89
GCLK2 90
VCCINT 91
I/O 92
I/O 93
I/O 94
GND 95
I/O 96
I/O 97
I/O 98
I/O 99
I/O 100
U1
TQFP100
PIN1
PIN2
VCCI O
TDI
PIN5
PIN6
PIN7
PIN8
PIN9
PIN10
GND
PIN12
PIN13
PIN14
TMS
PIN16
PIN17
VCCI O
PIN19
PIN20
PIN21
PIN22
PIN23
PIN24
PIN25
GND
PIN27
PIN28
PIN29
PIN30
PIN31
PIN32
PIN33
VCCIO
PIN35
PIN36
PIN37
GND
VCCI N T
PIN40
PIN41
PIN42
GND
PIN44
PIN45
PIN46
PIN47
PIN48
PIN49
PIN50
VCCI O
PIN52
PIN53
PIN54
PIN55
PIN56
PIN57
PIN58
GND
PIN60
PIN61
TCK
PIN63
PIN64
PIN65
VCCI O
PIN67
PIN68
PIN69
PIN70
PIN71
PIN72
TDO
GND
PIN75
PIN76
PIN77
PIN78
PIN79
PIN80
PIN81
VCCIO
PIN83
PIN84
PIN85
GND
PIN87
PIN88
PIN89
PIN90
VCCINT
PIN92
PIN93
PIN94
GND
PIN96
PIN97
PIN98
PIN99
PIN100
C1
0.1uF
C2
0.1uF
C3
0.1uF
VCCI O
C5
0.01uF
C6
0.01uF
VCCI N T
VCCI O GND
GCLK1
TCK
VCCI N T GND
GCLK2
TDO
VCCI OGND
GCLR
TDI
VCCI NTGND
GOE
TMS
D1 A
D1 B
D1 C
D1 D
D1 E
D1 F
D1 G
D2 A
D2 B
D2 C
D2 D
D2 E
D2 F
D2 G
DOT1
DOT2
LED1
LED2
D4 A
D4 B
D4 C
D4 D
D4 E
D4 F
D4 G
D3 A
D3 B
D3 C
D3 D
D3 E
D3 F
D3 G
DOT3
DOT4
LED3
LED4
LED5
LED6
LED7
LED8
SW1
SW2
SW3
SW4
SW5
SW6
SW7
SW8
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP2
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP1
GNDGND
GND GNDGND GND
GND GND
PIN88
PIN89
PIN87
PIN90
PIN76
PIN79
PIN80
PIN81
PIN84
PIN92
PIN93
PIN94PIN96
PIN97PIN98
PIN83
PIN64
PIN65PIN67
PIN68PIN69
PIN71 PIN75
PIN57
PIN58PIN60
PIN61
PIN63
PIN37
PIN44
PIN46
PIN48
PIN9
PIN10
PIN14
PIN17
PIN20
PIN13
PIN19
PIN16
PIN8
PIN100
PIN6
PIN99
PIN56
PIN47
PIN52
PIN45
PIN41
PIN40 PIN36
PIN54
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
JL
HEADER 11X2
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
JT
HEADER 11X2
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
JR
HEADER 11X2
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
JB
HEADER 11X2
PIN1
PIN2
PIN5
PIN6
PIN7
PIN8
PIN9
PIN10
PIN12
PIN13
PIN14
PIN16
PIN17
PIN19
PIN20
PIN21
PIN22
PIN23
PIN24
PIN25
PIN27
PIN28
PIN29
PIN30
PIN31
PIN32
PIN33 PIN35
PIN36 PIN37
PIN40 PIN41
PIN42 PIN44
PIN45
PIN46
PIN47
PIN48
PIN49
PIN50
PIN52PIN53
PIN54
PIN55 PIN56
PIN57
PIN58PIN60
PIN61PIN63
PIN64PIN65
PIN67PIN68
PIN69
PIN70
PIN71
PIN72
PIN75
PIN76 PIN77
PIN78
PIN79 PIN80
PIN81
PIN83
PIN84
PIN85
PIN87
PIN88PIN89
PIN90
PIN92PIN93
PIN94PIN96
PIN97PIN98
PIN99 PIN100
C7
0.1uF
C8
0.1uF
C9
0.1uF
C10
0.1uF
1
2
3
J1
CON3
PIN39
PIN39
C11
0.2uF
C12
0.2uF
21
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
References and Support
For additional PLD design software references and support, documentation such as help files, tutorials,
application notes/briefs, and user guides are available at www.atmel.com.
Atmel ProChip Designer Software
Table 8. ProChip Designer References and Support
Atmel WinCUPL Software
Table 9. WinCUPL References and Support
Atmel ATMISP Software
Table 10. ATMISP References and Support
Atmel POF2JED Conversion Software
Table 11. POF2JED References and Support
ProChip Designer From the main ProChip window menu...
Help Select Help > Prochip Designer Help.
Tutorials Select Help > Tutorials.
Known Problems and Solutions Select Help > Review KPS.
WinCUPL From the main WinCUPL window menu...
Help Select Help > Contents.
CUPL Programmers Reference Guide Select Help > CUPL Programmers Reference.
Tutorials Select Help > Atmel Info > Tutorial1.pdf.
Known Problems and Solutions Select Help > Atmel Info > CUPL_BUG.pdf.
ATMISP From the main ATMISP window menu...
Help Files Select Help > ISP Help.
Tutorials Select Help > ATMISP Tutorial.
Known Problems and Solutions Using the Windows Explorer browser, locate the ATMISP folder and
open the readme.txt file with an ASCII text editor.
POF2JED From the main POF2JED window menu...
ATF15xx Conversion Application Brief Select Help > Conversion Options.
ATF15xx-DK3 Development/Programmer Kit [USER GUIDE]
Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014
22
Technical Support
For technical support on any Atmel PLD related issues, contact the Atmel PLD Applications Group at:
Email pld@atmel.com
Hotline (+1)(408) 436-4333
Online Support Form http://support.atmel.com/bin/customer.exe
Revision History
Revision Date Description
3605C 06/2014 Update schematics, template, logos, and disclaimer page. Add the Revision
History section.
3605B 05/2008
X
XXX
XX
Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com
© 2014 Atmel Corporation. / Rev.: Atmel-3605C-CPLD-ATF15xx-DK3-Development-Kit-UserGuide_062014.
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