05/2005
ACD0900
VHF/UHF CA TV/TV Tuner
Downconverter
Data Sheet - Rev 2.2
Figure 1: Functional Block Diagram
FEATURES
• Integrated Monolithic Downconverter
• 8 dB Noise Figure
• 10 dB Conversion Gain
• High Linearity
• Small Size
• Low Cost
• High Reliability
• RoHS-Compliant Package Option
S3 Package
Modified 16 Pin SOIC
PRODUCT DESCRIPTION
The ACD0900 MMIC is a high performance
downconverter fabricated entirely in GaAs. It is
designed for use as the second conversion stage
in double-conversion tuners and cable modems,
downconverting 900 -1200 MHz RF inputs to a fixed
IF of 35 - 150 MHz (depending on LO frequency).
The IC incorporates a low noise amplifier, high
linearity double balanced mixer, phase splitter and
oscillator in a modified SOIC 16 lead surface mount
package. The high degree of functionality allows
tuner manufactures to reduce size and cost by
lowering the component count and decreasing the
amount of production alignment steps, while
significantly improving performance and reliability.
PHASE
8
5
6
7
SPLITTER
OSC
2
3
4
1
MXR
9
12
11
10
15
14
13
16
LOW NOISE
AMP.
I
F1,+5V
GND
N/C
GND
RFIN
ISET
GND N/C
+5V
TCKT
GND
OSCOUT
GND
IF2, +5
V
2Data Sheet - Rev 2.2
05/2005
ACD0900
* Do not connect pin 9 to GND
T able 1: Pin Description
NIP NOITPIRCSED NIP NOITPIRCSED
1FI
1
V,
FIDD
9*CN
2DNG01V
OLDD
3CN11T
TKC
4DNG21DNG
5DNG31DNG
6FR
NI
41TUOCSO
7I
TES
51DNG
8DNG61FI
2
V,
FIDD
Data Sheet - Rev 2.2
05/2005 3
ACD0900
ELECTRICAL CHARACTERISTICS
T able 2: Absolute Minimum and Maximum Ratings
Note:
(1) VTCKT : Maximum voltage that may be applied to pin 11 of the device without
damaging the IC. DC blocking capacitor (1500 pF) between pin 11 and the
external tuning circuit is mandatory.
Stresses in excess of the absolute ratings may cause permanent
damage. Functional operation is not implied under these conditions.
Exposure to absolute ratings for extended periods of time may
adversely affect reliability.
T able 3: Operating Ranges
The device may be operated safely over these conditions; however, parametric
performance is guaranteed only over the conditions defined in the electrical
specifications.
RETEMARAP NIM XAM TINU
V
FIDD
V,
OLDD
V,
CSO
-9 stloV
V
FR
V,
TKCT
)1(
-0 stloV
erutarepmeTegarotS55-002C°
erutarepmeTgniredloS-062C°
emiTgniredloS-5.ceS
rewoPtupnIFR-01+mBd
rewoPtupnIOL-71+mBd
ec
natsiseRlamrehT-52W/C°
RETEMARAP NIM PYT XAM TINU
ycneuqerF
FR
OL
FI
009
539
53
-
-
-
0021
0531
051
zHM
V
FIDD
V,
OLDD
57.40.552.5CDV
erutarepmeTesaC55--58C°
4Data Sheet - Rev 2.2
05/2005
ACD0900
T able 4: Electrical S pecifications
( TA = +25°C; VDDIF, VDDLO= +5V)
Notes:
(1) Combined output ( IF1 + IF2) using a balun. NOTE: Gain at either port (uncombined), with unused port
terminated in 50 W, is 3 dB lower
(2) Two tones @ -15 dBm per tone
RETEMARAP NIM PYT XAM TINU STNEMMOC
seicneuqerF FROL
FI
-
-
-
0711 5421 57
-
-
-zHM
tesffOzHK01@esioNesahP-98-5.58-zH/cBd
erugiFesioN-0.85.9Bd
)daoL002(n
iaG
)1(
8.75.9- Bd
)daoL002(DMIredrOdr3
)2(
-95-45-cBd
)daoL002(PItupnIredrOdr3
)2(
21+-- mBd
,zHK51@noitaludoMssorC
)2(
noitaludoMMA%99 -65-- cBd
noitpmusnoCtnerruC-08011Am
V0.5@noitpmusnoCrewoP-004-Wm
Ω
Ω
Ω
Data Sheet - Rev 2.2
05/2005 5
ACD0900
Figure 2: T est Circuit Schematic
1
2
4
5
98
7
6
3
10
16
15
14
13
12
11
PHASE
SPLITTER
LOW
NOISE
AMP OSC
5.6
Ω
0.001
µ
F
RF
IN
NC
IF
1
IF
2
0.001
µ
F
OSC Output
to Prescalar
+5V
IF
OUT
3.3 pF 2K
Ω
1SV245
L
12 K
Ω
0.01
µ
F
Vtune
0.01
µ
F
0.1
µ
F
+5V
330
µ
F100 pF
MIXER
NC
N:1
6Data Sheet - Rev 2.2
05/2005
ACD0900
PERFORMANCE DA TA
MEASUREDIN50
ΩSYSTEM
IMPEDANCE REFERENCE PLANE AT PIN 16
.5 5
2.2
.2
0
-.2
-.5
-1
-2
-5
5
2
1
.5
1
1
2
43
5
1: 50 MHz
251.64Ω
- 222.35
j
Ω
2: 150 MHz
60.89Ω
-144.22
j
Ω
3: 250 MH
z
26.32Ω
- 89.16
j
Ω
4: 400 MH
z
13.24Ω
- 49.55
j
Ω
5: 500MHz
10.08Ω
- 34.10
j
Ω
S
TART: 50 MHz
S
TOP: 500 MHz
Figure 4: IF Output Impedance
2000MHz
50MHz
.2
.2 5
2
1
.5
I
MPEDANCE REFERENCE PLANE AT PIN 6
MEASURED IN 50ΩSYSTEM
START:
STOP: 1: 50 MHz
183.00Ω
- 21.75 jΩ
2: 250 MHz
135.48Ω
-58.21 jΩ
3: 750 MHz
75.92Ω
- 43.12 jΩ
4: 1000 MH
z
64.93Ω
- 32.29
j
Ω
5: 2000MH
z
43.79Ω
-4.71 jΩ
0
-.2
-.5
-.1
-2
-5
.5 1251
2
3
4
5
Figure 3: RF Input Impedance
Data Sheet - Rev 2.2
05/2005 7
ACD0900
-5.8
MEASUREDIN50
ΩSYSTEM
IMPEDANCE REFERENCE PLANE AT PIN 11
-1
.5
5
2
1
.2
-
.17
-.2
-.5
-2
-5
5
4
3
2
1
START: 50 MHz
STOP: 2000 MHz 1: 50 MHz
259.67Ω
- 1200 jΩ
2: 612 MHz
- 20.97Ω
- 50.63 jΩ
3: 1000 MHz
-9.28
Ω
- 14.88 jΩ
4: 1500 MHz
-5.36
Ω
7.99 jΩ
5 : 2000 MH
z
0.64Ω
27.12 jΩ
Figure 5: LO Impedance
8Data Sheet - Rev 2.2
05/2005
ACD0900
P ACKAGE OUTLINE
Figure 6: S3 Package Outline - Modified 16 Pin SOIC
Data Sheet - Rev 2.2
05/2005 9
ACD0900
NOTES
10 Data Sheet - Rev 2.2
05/2005
ACD0900
NOTES
Data Sheet - Rev 2.2
05/2005 11
ACD0900
NOTES
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS
product in any such application without written consent is prohibited.
IMPORTANT NOTICE
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: Mktg@anadigics.com
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without
notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are
subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are
assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges
customers to verify that the information they are using is current before placing orders.
Data Sheet - Rev 2.2
05/2005
12
ACD0900
ORDERING INFORMA TION
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