R EG 103 REG REG103 103 REG 103 SBVS010D - JANUARY 2000 - REVISED SEPTEMBER 2005 DMOS 500mA Low-Dropout Regulator FEATURES DESCRIPTION NEW DMOS TOPOLOGY: Ultra Low Dropout Voltage: 115mV Typ at 500mA and 3.3V Output Output Capacitor NOT Required for Stability FAST TRANSIENT RESPONSE VERY LOW NOISE: 33Vrms HIGH ACCURACY: 2% max HIGH EFFICIENCY: IGND = 1mA at IOUT = 500mA Not Enabled: IGND = 0.5A 2.5V, 2.7V, 3.0V, 3.3V, 5.0V, AND ADJUSTABLE OUTPUT VERSIONS FOLDBACK CURRENT LIMIT THERMAL PROTECTION OUTPUT VOLTAGE ERROR INDICATOR(1) SMALL SURFACE-MOUNT PACKAGES: SOT223-5, DDPAK-5, SO-8 The REG103 is a family of low-noise, low-dropout, linear regulators with low ground pin current. Its new DMOS topology provides significant improvement over previous designs, including low-dropout voltage (only 115mV typ at full load), and better transient performance. In addition, no output capacitor is required for stability, unlike conventional low-dropout regulators that are difficult to compensate and require expensive low ESR capacitors greater than 1F. Typical ground pin current is only 1mA (at IOUT = 500mA) and drops to 0.5A in not enabled mode. Unlike regulators with PNP pass devices, quiescent current remains relatively constant over load variations and under dropout conditions. The REG103 has very low output noise (typically 33Vrms for VOUT = 3.3V with CNR = 0.01F), making it ideal for use in portable communications equipment. On-chip trimming results in high output voltage accuracy. Accuracy is maintained over temperature, line, and load variations. Key parameters are tested over the specified temperature range (-40C to +85C). The SO-8 version of the REG103 has an ERROR pin that provides a power good flag, indicating the regulator is in regulation. The REG103 is well protected--internal circuitry provides a current limit that protects the load from damage. Thermal protection circuitry keeps the chip from being damaged by excessive temperature. In addition to the SO-8 package, the REG103 is also available in the DDPAK and the SOT223-5. APPLICATIONS PORTABLE COMMUNICATION DEVICES BATTERY-POWERED EQUIPMENT PERSONAL DIGITAL ASSISTANTS MODEMS BAR-CODE SCANNERS BACKUP POWER SUPPLIES ENABLE ERROR(1) ENABLE VOUT VIN + 0.1F NR REG103 (Fixed Voltage Versions) + COUT (2) ERROR1) VIN VOUT + 0.1F REG103-A R1 + COUT(2) Adj Gnd Gnd R2 NR = Noise Reduction NOTE: (1) SO-8 Package Only. (2) Optional. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright (c) 2000-2005, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ABSOLUTE MAXIMUM RATINGS(1) Supply Input Voltage, VIN ....................................................... -0.3V to 16V Enable Input Voltage, VEN ....................................................... -0.3V to VIN Feedback Voltage, VFB ........................................................ -0.3V to 6.0V NR Pin Voltage, VNR ............................................................. -0.3V to 6.0V Error Flag Output ..................................................................... -0.3V to 6V Error Flag Current ............................................................................... 2mA Output Short-Circuit Duration ...................................................... Indefinite Operating Temperature Range ....................................... -55C to +125C Storage Temperature Range .......................................... -65C to +150C Junction Temperature ..................................................... -55C to +150C Lead Temperature (soldering, 3s, SO-8, SOT, and DDPAK) ........ +240C ESD Rating: HBM (VOUT to GND) ..................................................... 1.5kV HBM (All other pins) ........................................................ 2kV CDM .............................................................................. 500V ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. PACKAGE/ORDERING INFORMATION(1) PRODUCT VOUT REG103xx-yyyy/zzz XX is package designator. YYYY is typical output voltage (5 = 5.0V, 2.85 = 2.85V, A = Adjustable). ZZZ is package quantity. (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. PIN CONFIGURATIONS Top View SOT223-5 SO-8 DDPAK-5 Tab is GND 1 2 3 4 5 VOUT 1 8 VIN VOUT 2 7 VIN NR/Adjust(1) 3 6 ERROR GND 4 5 ENABLE Tab is GND 1 VO GND NR/Adjust(1) VIN 3 VIN ENABLE (F Package) 2 VOUT (U Package) 4 5 GND ENABLE NR/Adjust(1) (G Package) NOTE: (1) For REG103A-A: voltage setting resistor pin. All other models: noise reduction capacitor pin. 2 REG103 SBVS010D ELECTRICAL CHARACTERISTICS Boldface limits apply over the specified temperature range, TJ = -40C to +85C. At TJ = +25C, VIN = VOUT + 1V (VOUT = 3.0V for REG103-A), VENABLE = 2V, IOUT = 10mA, CNR = 0.01F, and COUT = 0.1F(1), unless otherwise noted. REG103GA, UA, FA PARAMETER OUTPUT VOLTAGE Output Voltage Range REG103-2.5 REG103-2.7 REG103-3.0 REG103-3.3 REG103-5 REG103-A Reference Voltage Adjust Pin Current Accuracy TJ = -40C to +85C vs Temperature vs Line and Load TJ = -40C to +85C DC DROPOUT VOLTAGE(2, 3) For all models except 5V For 5V model For all models except 5V TJ = -40C to +85C For 5V models TJ = -40C to +85C VOLTAGE NOISE f = 10Hz to 100kHz Without CNR (all models) With CNR (all fixed voltage models) OUTPUT CURRENT Current Limit(4) TJ = -40C to +85C CONDITION MIN 2.5 2.7 3.0 3.3 5 dVOUT/dT VDROP 1.295 0.2 0.5 TJ = -40C to +85C IOUT = 10mA to 500mA, VIN = (VOUT + 0.7V) to 15V VIN = (VOUT + 0.9V) to 15V 70 0.5 IOUT = 10mA IOUT = 500mA IOUT = 500mA IOUT = 500mA 3 115 160 IOUT = 500mA CNR = 0, COUT = 0 CNR = 0.01F, COUT = 10F 25 200 250 230 mV mV mV mV 280 mV 2.5 Vrms Vrms 30Vrms/V * VOUT 10Vrms/V * VOUT ICL 550 500 700 950 1000 65 VENABLE IENABLE 2 -0.2 VENABLE = 2V to VIN, VIN = 2.1V to VENABLE = 0V to 0.5V 6.5(5) 1 2 50 1.5 VIN = VERROR = VOUT + 1V Sinking 500A 0.1 0.2 IGND IOUT = 10mA IOUT = 500mA VENABLE 0.5V 0.5 1 0.5 mA mA dB VIN 0.5 100 100 V V nA nA s ms 10 0.4 A V C C 150 130 ENABLE Pin LOW TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance DDPAK-5 Surface-Mount SO-8 Surface-Mount SOT223-5 Surface-Mount 3.5 1 2 2.8 Vn THERMAL SHUTDOWN Junction Temperature Shutdown Reset from Shutdown INPUT VOLTAGE Operating Input Voltage Range(7) Specified Input Voltage Range TJ = -40C to +85C UNITS V V V V V V V A % % ppm/C % % 5.5 VREF VREF IADJ ERROR FLAG(6) Current, Logic HIGH (open drain)--Normal Operation Voltage, Logic LOW--On Error GROUND PIN CURRENT Ground Pin Current MAX VOUT RIPPLE REJECTION f = 120Hz ENABLE CONTROL VENABLE HIGH (output enabled) VENABLE LOW (output disabled) IENABLE HIGH (output enabled) IENABLE LOW (output disabled) Output Disable Time Output Enable Soft Start Time TYP 0.7 1.3 mA mA A 2.1 VOUT + 0.7 VOUT + 0.9 15 15 15 V V V -40 -55 -65 +85 +125 +150 C C C VIN VIN > 2.7V VIN > 2.9V TJ JC JA JC Junction-to-Case Junction-to-Ambient Junction-to-Case 4 150 15 C/W C/W C/W NOTES: (1) The REG103 does not require a minimum output capacitor for stability. However, transient response can be improved with proper capacitor selection. (2) Dropout voltage is defined as the input voltage minus the output voltage that produces a 2% change in the output voltage from the value at VIN = VOUT + 1V at fixed load. (3) Not applicable for VOUT less than 2.7V. (4) Current limit is the output current that produces a 10% change in output voltage from VIN = VOUT + 1V and IOUT = 10mA. (5) For VIN > 6.5V, see typical characteristic VENABLE vs IENABLE. (6) Logic low indicates out-of-regulation condition by approximately 10%, or thermal shutdown. (7) The REG103 no longer regulates when VIN < VOUT + VDROP (MAX). In drop-out or when the input voltage is between 2.7V and 2.1V, the impedance from VIN to VOUT is typically less than 1 at TJ = +25C. See typical characteristic. REG103 SBVS010D 3 TYPICAL CHARACTERISTICS For all models, at TJ = +25C and VENABLE = 2V, unless otherwise noted. OUTPUT VOLTAGE CHANGE vs IOUT (VIN = VOUT + 1V, Output Voltage % Change Referred to IOUT = 10mA at +25C) DC DROPOUT VOLTAGE vs OUTPUT CURRENT 180 0.5 DC Dropout Voltage (mV) Output Voltage Change (%) 160 0 -0.5 -1.0 = -55C = +25C = +125C 100 80 60 40 = -55C = +25C = +125C 0 0 100 200 300 400 0 500 100 200 300 400 500 IOUT (mA) Output Current (mA) OUTPUT VOLTAGE CHANGE vs VIN (Output Voltage % Change Referred to VIN = VOUT + 1V at IOUT = 10mA) OUTPUT VOLTAGE vs TEMPERATURE (Output Voltage % Change Referred to IOUT = 10mA at +25C) 0.5 0.1 Output Voltage Change (%) Output Voltage Change (%) 120 20 -1.5 0 -0.5 -1.0 = 10mA = 100mA = 500mA -1.5 0 2 4 6 8 0.5 0 -0.5 = 10mA = 100mA = 500mA -1 -1.5 -75 10 -50 -25 0 25 50 75 100 Input Voltage Above VOUT Temperature (C) DC DROPOUT VOLTAGE vs TEMPERATURE LINE REGULATION vs TEMPERATURE (VIN = VOUT + 1V to VIN = 15V ) 125 0.5 Output Voltage Change (%) 160 DC Dropout Voltage (mV) 140 120 = 10mA = 100mA = 500mA 80 40 0.4 0.3 0.2 0.1 = 10mA = 100mA 0 -75 -50 -25 0 25 50 Temperature (C) 4 75 100 125 0 -75 -50 -25 0 25 50 75 100 125 Temperature (C) REG103 SBVS010D TYPICAL CHARACTERISTICS (Cont.) For all models, at TJ = +25C and VENABLE = 2V, unless otherwise noted. COUT = 0 VOUT 50mV/div 200mV/div 200mV/div REG103-3.3 VIN = 4.3V LINE TRANSIENT RESPONSE COUT = 10F VOUT 50mV/div LOAD TRANSIENT RESPONSE COUT = 0 COUT = 10F 500mA IOUT VOUT VOUT 6V 10mA VIN 5V 10s/div 50s/div VOUT 50mV/div LINE TRANSIENT RESPONSE VOUT 50mV/div REG103-Adj. VOUT = 3.3V, VIN = 4.3V, CFB = 0.01F COUT = 0 200mV/div 200mV/div LOAD TRANSIENT RESPONSE COUT = 10F 500mA IOUT REG103-Adj. VOUT = 3.3V, CFB = 0.01F, IOUT = 100mA VOUT COUT = 10F VOUT VIN 5V 10s/div 50s/div LOAD REGULATION vs TEMPERATURE (VIN = VOUT + 1V and 10mA < IOUT < 500mA) OUTPUT NOISE DENSITY 10 0.4 Noise Density (V/Hz) Output Voltage Change (%) 0.5 0.3 0.2 0.1 0 -75 1 CNR = 0 COUT = 0 0.1 CNR = 0.01F COUT = 10F 0.01 -50 -25 0 25 50 Temperature (C) REG103 COUT = 0 6V 10mA SBVS010D REG103-3.3 Load = 100mA 75 100 125 10 100 1000 10000 100,000 Frequency (Hz) 5 TYPICAL CHARACTERISTICS (Cont.) For all models, at TJ = +25C and VENABLE = 2V, unless otherwise noted. GROUND PIN CURRENT, NOT ENABLED vs TEMPERATURE GROUND PIN CURRENT vs TEMPERATURE 3 1.2 VENABLE = 0V 1.1 2.5 2 = 10mA = 100mA = 500mA 0.9 0.8 IGND (A) IGND (mA) 1 0.7 1.5 1 0.6 0.5 0.5 0.4 -75 -50 -25 0 25 50 75 100 0 -75 125 -50 -25 0 GROUND PIN CURRENT vs IOUT 50 75 100 125 IADJUST vs TEMPERATURE 1.2 0.28 1.1 0.26 Adjust Pin Current (A) REG103-A 1 IGND (mA) 25 Temperature (C) Temperature (C) 0.9 0.8 0.7 0.6 0.24 0.22 0.20 0.18 0.16 0.5 0.4 1 10 100 1000 0.14 -60 -40 -20 IOUT (mA) 0 20 40 60 80 100 120 140 Temperature (C) CURRENT LIMIT vs TEMPERATURE RIPPLE REJECTION vs FREQUENCY 70 730 720 60 Ripple Rejection (dB) Current Limit (mA) 710 700 690 680 670 660 650 40 COUT = 0 VOUT = VOUT-NOMINAL * 0.90 VOUT = 1V 20 -50 -25 0 25 50 Temperature (C) 6 COUT = 10F 30 640 630 -75 50 75 100 125 10 100 1000 10000 100000 Frequency (Hz) REG103 SBVS010D TYPICAL CHARACTERISTICS (Cont.) For all models, at TJ = +25C and VENABLE = 2V, unless otherwise noted. RIPPLE REJECTION vs IOUT SOFT START 75 VRIPPLE = 3Vp-p, f = 120Hz No Load 1V/div Ripple Rejection (dB) 70 65 VOUT RLOAD = 6.8 60 55 50 45 VENABLE 2V 0 40 0 100 200 300 400 500 250s/div Load Current (mA) OUTPUT VOLTAGE DRIFT HISTOGRAM OUTPUT DISABLE TIME 45 40 RLOAD = 330 35 VOUT Percent of Units (%) 1V/div No Load RLOAD = 6.8 30 25 20 15 10 5 VENABLE 2V 0 0 40 10s/div 45 50 55 60 65 70 75 80 85 90 VOUT Drift (ppm/C) OUTPUT VOLTAGE ACCURACY HISTOGRAM 60 Percent of Units (%) 50 40 30 20 10 0 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 Error (%) REG103 SBVS010D 7 BASIC OPERATION The REG103 series is a family of LDO (Low Drop-Out) linear regulators. The family includes five fixed output versions (2.5V to 5.0V) and an adjustable output version. An internal DMOS power device provides low dropout regulation with near constant ground pin current (largely independent of load and drop-out conditions) and very fast line and load transient response. All versions include internal current limit and thermal shutdown circuitry. Figure 1 shows the basic circuit connections for the fixed voltage models. Figure 2 gives the connections for the adjustable output version (REG103A) and example resistor values for some commonly used output voltages. Values for other voltages can be calculated from the equation shown in Figure 2. The SO-8 package provides two pins each for VIN and VOUT. Both sets of pins MUST be used and connected adjacent to the device. ENABLE VIN In ERROR REG103 Gnd 0.1F VOUT Out NR COUT CNR 0.01F Optional FIGURE 1. Fixed Voltage Nominal Circuit for REG103. ENABLE INTERNAL CURRENT LIMIT The REG103 internal current limit has a typical value of 700mA. A fold-back feature limits the short-circuit current to a typical short-circuit value of 40mA. This circuit will protect the regulator from damage under all load conditions. A typical characteristic of VOUT versus IOUT is given in Figure 3a. Care should be taken in high current applications to avoid ground currents flowing in the circuit board traces causing voltage drops between points on the circuit. If voltage drops occur on the circuit board ground that causes the load ground voltage to be much lower than the ground voltage seen by the ground pin on the REG103, the foldback current may approach zero and the REG103 may not start up. In these types of applications, a large value resistor can be placed between VIN and VOUT to help "boost" up the output of the REG103 during start-up, see Figure 3b. The value for the "boost" resistor should be chosen so that the current through the "boost" resistor is less than the minimum load current: RBOOST > (VIN - VOUT)/ILOAD. Typically, a good value for a "boost" resistor is 5k. ERROR 5 VIN None of the versions require an output capacitor for regulator stability. The REG103 will accept any output capacitor type less than 1F. For capacitance values larger than 1F, the effective ESR should be greater than 0.1. This minimum ESR value includes parasitics such as printed circuit board traces, solder joints, and sockets. A minimum 0.1F low ESR capacitor connected to the input supply voltage is recommended. 6 8 1 7 2 REG103 3 0.1F VOUT IADJ 4 Gnd R1 CFB 0.01F EXAMPLE RESISTOR VALUES R1 ()(1) R2 ()(1) 1.295 Short Open 2.5 12.1k 1.21k 13k 1.3k 3 16.9k 1.69k 13k 1.3k 3.3 20k 2.0k 13k 1.3k 5 37.4k 3.74k 13k 1.3k VOUT (V) COUT Load Adj R2 Pin numbers for SO-8 package. Optional VOUT = (1 + R1/R2) * 1.295V To reduce current through divider, increase resistor values (see table at right). NOTE: (1) Resistors are standard 1% values. As the impedance of the resistor divider increases, IADJ (~200nA) may introduce an error. CFB improves noise and transient response. FIGURE 2. Adjustable Voltage Circuit for REG103A. 8 REG103 SBVS010D 3.5 100 2.5 10 Enable Current (A) Output Voltage (V) 3 2 1.5 1 0.5 1 0.1 0.01 0 0 100 200 300 400 500 600 700 800 Output Current (mA) 0.001 0 2 4 6 (a) Foldback Current Limit of the REG103-3.3 at 25C. 8 10 12 14 16 Enable Voltage RBOOST FIGURE 5. ENABLE Pin Current versus Applied Voltage. VIN VOUT REG103 + + 0.1F 0.1F(1) Load Gnd (1) Optional. (b) Foldback Current Boost Circuit. FIGURE 3. Foldback Current Limit and Boost Circuit. ENABLE The ENABLE pin allows the regulator to be turned on and off. This pin is active HIGH and compatible with standard TTL-CMOS levels. Inputs below 0.5V (max) turn the regulator off and all circuitry is disabled. Under this condition, ground pin current drops to approximately 0.5A. When not used, the ENABLE pin may be connected to VIN. Internal to the part, the ENABLE pin is connected to an input resistor-zener diode circuit, as shown in Figure 4, creating a nonlinear input impedance. The ENABLE Pin Current versus Applied Voltage relationship is shown in Figure 5. When the ENABLE pin is connected to a voltage greater than 10V, a series resistor may be used to limit the current. ERROR FLAG The error indication pin, only available on the SO-8 package version, provides a fault indication out-of-regulation condition. During a fault condition, ERROR is pulled LOW by an open drain output device. The pin voltage, in the fault state, is typically less than 0.2V at 500A. A fault condition is indicated when the output voltage differs (either above or below) from the specified value by approximately 10%. Figure 6 shows a typical fault-monitoring application. +5V 10k Pull-up P 6 ERROR 3 ENABLE Open Drain SO-8 Package Only REG103 FIGURE 6. ERROR Pin Typical Fault-Monitoring Circuit. ENABLE 175k VZ = 10V FIGURE 4. ENABLE Pin Equivalent Input Circuit. OUTPUT NOISE A precision band-gap reference is used for the internal reference voltage, VREF, for the REG103. This reference is the dominant noise source within the REG103. It generates approximately 45Vrms in the 10Hz to 100kHz bandwidth at the reference output. The regulator control loop gains up the reference noise, so that the noise voltage of the regulator is approximately given by: VN = 45Vrms REG103 SBVS010D V R1 + R 2 = 45Vrms * OUT R2 VREF 9 Since the value of VREF is 1.295V, this relationship reduces to: 10.0 Vrms * VOUT V Connecting a capacitor, CNR, from the Noise-Reduction (NR) pin to ground, can reduce the output noise voltage. Adding CNR, as shown in Figure 7, forms a low-pass filter for the voltage reference. For CNR = 10nF, the total noise in the 10Hz to 100kHz bandwidth is reduced by approximately a factor of 3.5, as shown in Figure 8. nV/Hz VN = 35 1.0 COUT = 0, CFB = 0 COUT = 0, CFB = 0.01F COUT = 10F, CFB = 0.01F 0.1 10 100 1000 Output Noise Voltage (VRMS 10Hz - 100kHz) 45 10000 100000 Frequency FIGURE 9. Output Noise Density on Adjustable Versions. The REG103 utilizes an internal charge pump to develop an internal supply voltage sufficient to drive the gate of the DMOS pass element above VIN. The charge-pump switching noise (nominal switching frequency = 2MHz) is not measurable at the output of the regulator. 35 25 0.001 COUT = 0 COUT = 10F 0.01 0.1 1 CNR (F) FIGURE 8. Output Noise versus Noise-Reduction Capacitor. The REG103 adjustable version does not have the noisereduction pin available, however, the adjust pin is the summing junction of the error amplifier. A capacitor, CFB, connected from the output to the adjust pin will reduce both the output noise and the peak error from a load transient. Figure 9 shows improved output noise performance for two capacitor combinations. DROP-OUT VOLTAGE The REG103 uses an N-channel DMOS as the "pass" element. When the input voltage is within a few hundred millivolts of the output voltage, the DMOS device behaves like a resistor. Therefore, for low values of VIN to VOUT, the regulator's input-to-output resistance is the RdsON of the DMOS pass element (typically 230m). For static (DC) loads, the REG103 will typically maintain regulation down to VIN to VOUT voltage drop of 115mV at full-rated output current. In Figure 10, the bottom line (DC dropout) shows the minimum VIN to VOUT voltage drop required to prevent drop-out under DC load conditions. VIN NR (fixed output versions only) Low Noise Charge Pump CNR (optional) VREF (1.295V) DMOS Output VOUT Over Current Over Temp Protection ENABLE R1 R2 Adj (Adjustable Versions) REG103 NOTE: R1 and R2 are internal on fixed output versions. ERROR FIGURE 7. Block Diagram. 10 REG103 SBVS010D For large step changes in load current, the REG103 requires a larger voltage drop across it to avoid degraded transient response. The boundary of this "transient drop-out" region is shown as the top line in Figure 10. Values of VIN to VOUT voltage drop above this line insure normal transient response. REG103-3.3 at 25C 250 200 150 100 50 0 0 100 200 300 400 500 IOUT (mA) FIGURE 10. Transient and DC Dropout. In the transient dropout region between "DC" and "Transient", transient response recovery time increases. The time required to recover from a load transient is a function of both the magnitude and rate of the step change in load current and the available "headroom" VIN to VOUT voltage drop. Under worst-case conditions (full-scale load change with VIN to VOUT voltage drop close to DC dropout levels), the REG103 can take several hundred microseconds to re-enter the specified window of regulation. TRANSIENT RESPONSE The REG103 response to transient line and load conditions improves at lower output voltages. The addition of a capacitor (nominal value 10nF) from the output pin to ground may improve the transient response. In the adjustable version, the addition of a capacitor, CFB (nominal value 10nF), from the output to the adjust pin will also improve the transient response. POWER DISSIPATION The REG103 is available in three different package configurations. The ability to remove heat from the die is different for each package type and, therefore, presents different considerations in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. While it is difficult to impossible to quantify all of the variables in a thermal design of this type, performance data for several configurations are shown in Figure 11. In all cases, the PCB copper area is bare copper, free of solder-resist mask, and not solder plated. All examples are for 1-ounce copper. Using heavier copper will increase the effectiveness in moving the heat from the device. In those examples where there is copper on both sides of the PCB, no connection has been provided between the two sides. The addition of plated through holes will improve the heat sink effectiveness. 6 CONDITIONS #1 #2 #3 #4 #5 5 Power Dissipation (W) Drop-Out Voltage (mV) DC Transient limited to 125C, maximum. To estimate the margin of safety in a complete design (including heat sink), increase the ambient temperature until the thermal protection is triggered. Use worst-case loads and signal conditions. For good reliability, thermal protection should trigger more than 35C above the maximum expected ambient condition of your application. This produces a worst-case junction temperature of 125C at the highest expected ambient temperature and worst-case load. The internal protection circuitry of the REG103 has been designed to protect against overload conditions. It was not intended to replace proper heat sinking. Continuously running the REG103 into thermal shutdown will degrade reliability. 4 3 2 1 THERMAL PROTECTION Power dissipated within the REG103 will cause the junction temperature to rise. The REG103 has thermal shutdown circuitry that protects the regulator from damage. The thermal protection circuitry disables the output when the junction temperature reaches approximately 150C, allowing the device to cool. When the junction temperature cools to approximately 130C, the output circuitry is again enabled. Depending on various conditions, the thermal protection circuit may cycle on and off. This limits the dissipation of the regulator, but may have an undesirable effect on the load. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heat sink. For reliable operation, junction temperature should be REG103 SBVS010D 0 0 25 50 75 100 125 150 Ambient Temperature (C) CONDITION PACKAGE PCB AREA JA 1 DDPAK 4in2 Top Side Only 27C/W 2 SOT-223 4in2 Top Side Only 53C/W 3 DDPAK None 65C/W 4 5 SOT-223 SO-8 0.5in2 Top Side Only None 110C/W 150C/W FIGURE 11. Maximum Power Dissipation versus Ambient Temperature for the Various Packages and PCB Heat Sink Configurations. 11 Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the average output current times the voltage across the output element, VIN to VOUT voltage drop. PD = (VIN - VOUT ) * I OUT ( AVG ) Power dissipation can be minimized by using the lowest possible input voltage necessary to assure the required output voltage. REGULATOR MOUNTING The tab of both packages is electrically connected to ground. For best thermal performance, the tab of the DDPAK surface-mount version should be soldered directly to a circuit- board copper area. Increasing the copper area improves heat dissipation. Figure 12 shows typical thermal resistance from junction to ambient as a function of the copper area for the DDPAK. Although the tabs of the DDPAK and the SOT-223 are electrically grounded, they are not intended to carry any current. The copper pad that acts as a heat sink should be isolated from the rest of the circuit to prevent current flow through the device from the tab to the ground pin. Solder pad footprint recommendations for the various REG103 devices are presented in the Application Bulletin "Solder Pad Recommendations for Surface-Mount Devices" (SBFA015), available from the Texas Instruments web site (www.ti.com). THERMAL RESISTANCE vs PCB COPPER AREA Thermal Resistance, JA (C/W) 50 Circuit-Board Copper Area REG103 Surface-Mount Package 1 oz. copper 40 30 20 10 REG103 DDPAK Surface-Mount Package 0 0 1 2 3 4 5 Copper Area (Inches2) FIGURE 12. Thermal Resistance versus PCB Area for the Five-Lead DDPAK. THERMAL RESISTANCE vs PCB COPPER AREA Thermal Resistance, JA (C/W) 180 Circuit-Board Copper Area REG103 Surface-Mount Package 1 oz. copper 160 140 120 100 80 60 40 20 REG103 SOT-223 Surface-Mount Package 0 0 1 2 3 4 5 Copper Area (Inches2) FIGURE 13. Thermal Resistance versus PCB Area for the Five-Lead SOT-223. 12 REG103 SBVS010D PACKAGE OPTION ADDENDUM www.ti.com 17-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins REG103FA-2.5 OBSOLETE DDPAK/ TO-263 KTT 5 REG103FA-2.5/500 NRND DDPAK/ TO-263 KTT 5 REG103FA-2.5/500G3 ACTIVE DDPAK/ TO-263 KTT REG103FA-2.5KTTT ACTIVE DDPAK/ TO-263 REG103FA-2.5KTTTG3 ACTIVE REG103FA-2.7 Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) (Requires Login) TBD Call TI Call TI 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR OBSOLETE DDPAK/ TO-263 KTT 5 TBD Call TI Call TI REG103FA-3.3 OBSOLETE DDPAK/ TO-263 KTT 5 TBD Call TI Call TI REG103FA-3.3/500 NRND DDPAK/ TO-263 KTT 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG103FA-3.3/500G3 ACTIVE DDPAK/ TO-263 KTT 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG103FA-3.3KTTT ACTIVE DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG103FA-3.3KTTTG3 ACTIVE DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG103FA-5 OBSOLETE DDPAK/ TO-263 KTT 5 TBD Call TI Call TI REG103FA-5/500 NRND DDPAK/ TO-263 KTT 5 TBD Call TI Call TI REG103FA-5/500G3 ACTIVE DDPAK/ TO-263 KTT 5 TBD Call TI Call TI REG103FA-5KTTT ACTIVE DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG103FA-5KTTTG3 ACTIVE DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG103FA-A OBSOLETE DDPAK/ TO-263 KTT 5 TBD Call TI Call TI Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 17-Aug-2012 Status (1) Package Type Package Drawing Pins REG103FA-A/500 NRND DDPAK/ TO-263 KTT 5 REG103FA-A/500E3 ACTIVE DDPAK/ TO-263 KTT 5 REG103FA-A/500G3 ACTIVE DDPAK/ TO-263 KTT 5 REG103FA-AKTTT ACTIVE DDPAK/ TO-263 KTT REG103FA-AKTTTG3 ACTIVE DDPAK/ TO-263 REG103GA-2.5 ACTIVE REG103GA-2.5/2K5 Package Qty 500 Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TBD Call TI Call TI 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-2.5/2K5G4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-2.5G4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-2.7 NRND SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-2.7G4 NRND SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-3 NRND SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-3.3 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-3.3/2K5 NRND SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-3.3/2K5G4 NRND SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-3.3G4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-3G4 NRND SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-5 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) Addendum-Page 2 CU SN Samples (Requires Login) Level-2-260C-1 YEAR PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 17-Aug-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) REG103GA-5/2K5 NRND SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG103GA-5/2K5G4 NRND SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG103GA-5G4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG103GA-A ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-A/2K5 NRND SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-A/2K5G4 NRND SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103GA-AG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-2.5 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-2.5/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-2.5/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-2.5G4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-2.7 NRND SOIC D 8 TBD Call TI Call TI REG103UA-2.7G4 NRND SOIC D 8 TBD Call TI Call TI REG103UA-3 NRND SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-3.3 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-3.3/2K5 NRND SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-3.3/2K5G4 NRND SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-3.3G4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-3G4 NRND SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Addendum-Page 3 Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 17-Aug-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) REG103UA-5 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-5/2K5 NRND SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-5/2K5G4 NRND SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-5G4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-A ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-A/2K5 NRND SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-A/2K5G4 NRND SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR REG103UA-AG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 4 PACKAGE OPTION ADDENDUM www.ti.com 17-Aug-2012 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 5 PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant REG103FA-2.5/500 DDPAK/ TO-263 KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 REG103FA-2.5KTTT DDPAK/ TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 REG103FA-3.3/500 DDPAK/ TO-263 KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 REG103FA-3.3KTTT DDPAK/ TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 REG103FA-5KTTT DDPAK/ TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 REG103FA-A/500 DDPAK/ TO-263 KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 REG103FA-AKTTT DDPAK/ TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 REG103GA-2.5/2K5 SOT-223 DCQ 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 REG103GA-3.3/2K5 SOT-223 DCQ 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 REG103GA-5/2K5 SOT-223 DCQ 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 REG103GA-A/2K5 SOT-223 DCQ 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 REG103UA-2.5/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REG103UA-3.3/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant REG103UA-5/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REG103UA-A/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) REG103FA-2.5/500 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 REG103FA-2.5KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0 REG103FA-3.3/500 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 REG103FA-3.3KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0 REG103FA-5KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0 REG103FA-A/500 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 REG103FA-AKTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0 REG103GA-2.5/2K5 SOT-223 DCQ 6 2500 358.0 335.0 35.0 REG103GA-3.3/2K5 SOT-223 DCQ 6 2500 358.0 335.0 35.0 REG103GA-5/2K5 SOT-223 DCQ 6 2500 358.0 335.0 35.0 REG103GA-A/2K5 SOT-223 DCQ 6 2500 358.0 335.0 35.0 REG103UA-2.5/2K5 SOIC D 8 2500 367.0 367.0 35.0 REG103UA-3.3/2K5 SOIC D 8 2500 367.0 367.0 35.0 REG103UA-5/2K5 SOIC D 8 2500 367.0 367.0 35.0 REG103UA-A/2K5 SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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