PD - 9.1231 IRFP450LC HEXFET (R) Power MOSFET Ultra Low Gate Charge Reduced Gate Drive Requirement Enhanced 30V V gs Rating Reduced C iss, Coss, Crss Isolated Central Mounting Hole Dynamic dv/dt Rated Repetitive Avalanche Rated VDSS = 500V RDS(on) = 0.40 ID = 14A Description This new series of Low Charge HEXFET Power MOSFETs achieve significantly lower gate charge over conventional MOSFETs. Utilizing advanced Hexfet technology the device improvements allow for reduced gate drive requirements, faster switching speeds and increased total system savings. These device improvements combined with the proven ruggedness and reliability of HEXFETs offer the designer a new standard in power transistors for switching applications. The TO-247 package is preferred for commercial-industrial applications where higher power levels preclude the use of TO-220 devices. The TO-247 is similar but superior to the earlier TO-218 package because of its isolated mounting hole. Absolute Maximum Ratings Parameter ID @ T C = 25C ID @ T C = 100C IDM PD @T C = 25C VGS EAS IAR EAR dv/dt TJ TSTG Max. Continuous Drain Current, V GS @ 10V Continuous Drain Current, V GS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw. Units 14 8.6 56 190 1.5 30 760 14 19 3.5 -55 to + 150 A W W/C V mJ A mJ V/ns C 300 (1.6mm from case) 10 lbf*in (1.1N*m) Thermal Resistance Parameter RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Min. Typ. Max. Units ---- ---- ---- ---- 0.24 ---- 0.65 ---- 40 C/W Revision 0 IRFP450LC Electrical Characteristics @ TJ = 25C (unless otherwise specified) RDS(ON) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current V(BR)DSS V(BR)DSS/TJ Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time LD Internal Drain Inductance LS Internal Source Inductance Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance IGSS Min. 500 --- --- 2.0 8.7 --- --- --- --- --- --- --- --- --- --- --- Typ. --- 0.59 --- --- --- --- --- --- --- --- --- --- 14 49 30 30 Max. Units Conditions --- V VGS = 0V, I D = 250A --- V/C Reference to 25C, I D = 1mA 0.40 VGS = 10V, I D = 8.4A 4.0 V VDS = VGS, ID = 250A --- S VDS = 50V, ID = 8.4A 25 VDS = 500V, VGS = 0V A 250 VDS = 400V, VGS = 0V, T J = 125C 100 VGS = 20V nA -100 VGS = -20V 74 ID = 14A 19 nC VDS = 400V 35 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 14A ns --- RG = 6.2 --- RD = 17, See Fig. 10 Between lead, --- 5.0 --- 6mm (0.25in.) nH from package --- 13 --- and center of die contact --- 2200 --- VGS = 0V --- 320 --- pF VDS = 25V --- 28 --- = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units --- --- 14 --- --- 56 --- --- --- --- 580 5.1 1.4 870 7.7 A V ns C Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, I S = 14A, V GS = 0V TJ = 25C, I F = 14A di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by L Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ISD 14A, di/dt 130A/s, V DD V(BR)DSS, T J 150C VDD = 25V, starting T J = 25C, L = 7.0mH R G = 25, IAS = 14A. (See Figure 12) Pulse width 300s; duty cycle 2%. S+LD) IRFP450LC 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 1 4.5V 0.1 20s PULSE WIDTH TC = 25C 0.01 0.01 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I , Drain-to-Source Current (A) D I , Drain-to-Source Current (A) D TOP 0.1 1 10 A 100 10 4.5V 1 0.1 20s PULSE WIDTH TC = 150C 0.01 0.01 0.1 VDS , Drain-to-Source Voltage (V) R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 150C TJ = 25C 1 0.1 VDS = 50V 20s PULSE WIDTH 4 5 6 7 8 9 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics A 100 Fig 2. Typical Output Characteristics, TC = 150oC 100 0.01 10 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics, TC = 25oC 10 1 10 A 3.0 I D = 14A 2.5 2.0 1.5 1.0 0.5 VGS = 10V 0.0 -60 -40 -20 0 20 40 60 80 A 100 120 140 160 TJ , Junction Temperature (C) Fig 4. Normalized On-Resistance Vs. Temperature IRFP450LC 20 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = Cds + C gd V GS , Gate-to-Source Voltage (V) C, Capacitance (pF) 4000 3000 Ciss 2000 1000 Coss Crss 0 10 V DS = 400V V DS = 250V V DS = 100V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 A 1 I D = 14A 100 0 V DS , Drain-to-Source Voltage (V) 40 60 A 80 Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 100 OPERATION IN THIS AREA LIMITED BY R DS(on) ID , Drain Current (A) ISD , Reverse Drain Current (A) 20 10 TJ = 150C TJ = 25C 1 100 10s 10 100s 1ms 1 VGS = 0V 0.1 0.0 0.4 0.8 1.2 1.6 VSD , Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage A 2.0 10ms T C = 25C T J = 150C Single Pulse 0.1 1 A 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 1000 IRFP450LC RD VDS VGS 14 D.U.T. RG VDD ID, Drain Current (Amps) 12 10 V 10 Pulse Width 1 s Duty Factor 0.1 % 8 Fig 10a. Switching Time Test Circuit 6 4 2 A 0 25 50 75 100 125 150 TC , Case Temperature (C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t t N o te s : 1 . D u ty fa c to r D = t 0.001 0.00001 1 1 / t 2 2 2 . P e a k TJ = P D M x Z th J C + T C 0.0001 0.001 0.01 0.1 1 t 1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case A 10 10 V Fig 12a. Unclamped Inductive Test Circuit EAS , Single Pulse Avalanche Energy (mJ) IRFP450LC 1600 ID 6.3A 8.9A BOTTOM 14A TOP 1200 800 400 0 VDD = 50V 25 50 A 75 100 125 Starting TJ , Juntion Temperature (C) Fig 12b. Unclamped Inductive Waveforms Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 150 IRFP450LC Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer D.U.T RG * * * * dv/dt controlled by R G Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD * * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS IRF450LC Package Outline TO-247AC Part Marking Information TO-247AC EXAMPLE : THIS IS AN IRFPE30 WITH ASSEMBLY LOT CODE 3A1Q A PART NUMBER INTERNATIONAL RECTIFIER LOGO IRFPE30 3A1Q 9302 ASSEMBLY LOT CODE DATE CODE (YYWW) YY = YEAR WW WEEK WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145 10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371 Data and specifications subject to change without notice.