CYPRESS SEMICONDUCTOR Features e Automatic power-down when deselected CMOS for optimum speed/power e High speed tag = 25 ns Transparent Write (7C171) @ Low active power 385 mW e Low standby power 8 mW TTL-compatible inputs and outputs Capable of withstanding greater than 2001V electrostatic discharge ULE D MM 258%bb2 0006533 4 Eacyp| TU6-23-O8% CY7C171 _CY7C172 Functional Description The CY7CI71 and CY7C172 are high- performance CMOS static RAMs orga- nized as 4096 by 4 bits with separate YO. Easy memoty expansion is rovided by an active LOW chip enable and three- state drivers. They have an automatic pow- er-down feature, reducing the power con- sumption by 77% when deselected. Writing to the device is accomplished when the chip enable (CE) and write enable (WE) inputs are both LOW. Data on the four input pins (Ip through Is) is written into the memory location specified on the address pins (Ag through Aj1). 4096 x 4 Static R/(W RAM Separate I/O Reading the device isaccomplishedby tak- ing chip enable (CE) LOW, while write en- able remains HIGH. Under thesecon- ditions, the contents of the memory location specified on the address pins will appear on the four data output pins (Op through Os). The output pinsstay in high-impedancestate when write enable (WE) is LOW (7C171 only), or chip enable is HIGH. Adie coat is used to insure alpha immunity. Logic Block Diagram Pin Configurations DIP/SOJ Top View Aq 2aQ Veco as G2 2a As Ag G3 42 a7Q4 21) As MGs 20[) Ao Ag Che 76171 19h] ly 76172 eh} INPUT BUFFER Aio7 An Qe Oo Ao fe tel) O% [i 10 ish) Ay Oo ot Ci 17 Os Aa enn Tj 12 We Ag bd ot7i-2 Ay O2 As Ag Q 5 ce 7 8 3 ve % 19 4219 14151617 18 won. MESES S aeons 9 o171-3 ci7i-1 Selection Guide 7C171-25 7CI71-35 7qC171-45 7C17225 9C172~35 1C172--45 Maximum Access Time (ns) 25 35 45 Maximum Operating Commercial 90 90 70 Current (mA) Military 00 70 2-271 SRAMs [*|CYPRESS SEMICONDUCTOR 4BE D MM 258%b6e 0006534 O EACYP _s 1-46 23 03 - CY7CI71 = CYPRESS ~eNn CY7C172 SSF SEMICONDUCTOR Maximum Ratings (Above which the useful life may be impaired. Foruser guidelines, Static Discharge Voltage ........0-.-eeeeeeveee + >2001V not tested.) (per MIL-STD-883, Method 3015) Storage Temperature ..........005 seve 65Cto +150C Latch-Up Current .....-.ssceeeeesereceeeseee >200 mA Ambient Temperature with Operating Range Power Applied ....csccsceccccoeesees 55C to +125C Ambient Supply Voltage to Ground Potential . Range Temperature Vcc (Pin 24 to Pin 12) ...... veeeene secveseee = 05V to +7.0V Commercial Cw are SVE 10% DC Voltage Applied to Outputs : = in High Z State .......ceeeee tannevowcee ~ 0.5V to +7.0V Miltaryl!] 55C to +125C 5V + 10% DC Input Voltage ..........6.- sevnences =~ 3.0V to +7.0V Output Current into Outputs (Low) .......ceeeeees 20 mA Electrical Characteristics Over the Operating Rangel] 7C17125 7C171-35 7C171-45 7C172~25 7C172-35 7C172-45 Parameters Description Test Conditions Min. | Max. | Min, | Max, | Min, | Max. | Units Vou Output HIGH Voltage | Voc = Min., Ion = 4.0mA 2.4 24 2.4 Vv VoL Output LOW Voltage | Voc = Min., Ior, = 8.0 mA. 0.4 0.4 0.4 Vv Vir Input HIGH Voltage 22 2.2 2.2 Vv Vi. Input LOW Voltage -30] 08 [-30] 08 |-3.0] 08 Vv lx Input Load Current GND < V1 < Voc -10 | +10 |}-10] +10 |-10} +10 | pA Toz Output Leakage GND < Vo < Vcc, ~50 | +50 |-50] +50 | -50j +50 | pA Current Output Disabled Tos Output Short Vcc = Max, Vout = GND - 350 350 ~ 350] mA Circuit Currentl? Toc Voc Operating Voc = Max. Coml 90 90 70_ | mA Supply Current Tour = 0 mA Mil 90 90 70 | mA Isnt Automatic CE Max. Vcc, Com'l 20 20 15 | mA Power-Down Current | CE > Virz Mil 40 20 20 mA Isp2 Automatic CE Max. Vcc, Com'l 15 15 1S | mA Power-Down Current | CE > Vcc 0.3V Mil 40 20 20 | mA Capacitancel4l Parameters Description Test Conditions Max, Units Cn Input Capacitance Ta = 25C, f = 1 MHz, 10 pF Cout Output Capacitance Voc = 5.0V 10 pF Notes: 1. Ta is the instant on case temperature. 2. See the last page of this specification for Group Asubgroup testing in- 3. Notmorethan 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. 4, Tested initially and after any design or process changes that may affect formation. these parameters -AC Test Loads and Waveforms A1481a At 4s1a 8v SV Or ee ome gov Re Re SOF 2550 Ser 25a ono INCLUDING: INCLUDING Sn WGAND TS WGAND SCOPE = SCOPE = = (a) b) Equivalent to: THEVENIN EQUIVALENT 1670 OUTPUT 0A 01,781 CI7t-4 2-272 ALL INPUT PULSES 90% ct7i-5CYPRESS SEMICONDUCTOR ULE D MM 2548%bbe 0006535 2 WECYP ; CY7C171 a Sires: T-46-23-08 CY7C172 = SEMICONDUCTOR Switching Characteristics Over the Operating Rangel? 5] 7C171-25 7C171-35 7C171-45 7C11225 7C112-35 1C17245 Parameters Description Min, | Max. | Min. | Max. | Min. ] Max. | Units READ CYCLE tro Read Cycle Time 25 35 45 ns taa Address ta Data Valid 25 35 45 ns toHA Output Hold from Address Change 3 3 3 ns tAcE CE LOW to Data Valid 25 35 45 ns tyzcr CE LOW to Low Zil 5 5 5 ns tHZCE CE HIGH to High Z1 7] 10 20 20 ns tpu CE LOW to Power-Up 0 0 0 ns tpp CE HIGH to Power-Down 25 25 30 ns tres Read Command Set-Up 0 ns tro Read Command Hold ns WRITE CYCLE! twe Write Cycle Time 25 35 40 ns tscR CE LOW to Write End 25 30 35 ns taw Address Set-Up to Write End 20 30 35 ns tHa Address Hold from Write End 0 0 0 ns tsa Address Set-Up to Write Start 0 0 0 ns tpwe WE Pulse Width 20 25 30 nis tsp Data Set-Up to Write End 10 15 15 ns typ Data Hold from Write End 0 ns tLZWE WE HIGH to Low ZI6l (7C172) 0 ns tuzwe WE LOW to High 216 41 (7C172) 10 5 20 ns tawE WE LOW to Data Valid (7C171) 25 30 35 ns tapv Data Valid to Output Valid (7C171) 25 30 35 ns Notes: 5, Test conditions assume signa reference levels of 1.5V, input pu loading of the specified Ioy/fory, and 30-pF load capacitance. 6. Atany given temperature and voltage condition, tyzz is less than t,z, for any given device. 7. tazceand tazwe are tested Loads. Transition is measure: L transition times of 5 ns or less, timing tse levels of 0 to 3.0V and output with Cy = SpF as in part (b) of AC Test d +500 mV from steady state voltage. 8. Theinternal write time of LOW and WELOW. Both signals either signal can terminate up and hold timing should that terminates the write. 9, WEis HIGH for read cycle. 10. Device is continuously selected, CE = Vit. awrite the memory is defined by the overlap of CE mustbe LOW to initiate awrite and by going HIGH. The data inputset- e referencd to the rising edge of the signal Switching Waveforms Read Cycle No. 11 101 y' tre _,! ADDRESS XK > mA ; tom | DATA OUT PREVIOUS DATA VALID KX DATA VALID 2-273 171-6 SRAMs "CYPRESS SEMICONDUCTOR WBE D ME 2545662 0006536 4 EBCYP S ; CY7C171 SS 5 ~16.92. CY7C172 SSF Siawuctor 1-46 -23-08 Switching Waveforms Read Cycle No, 21. 11) tac a i 7 tace > ti7 i 17 DANCE | wii HIGH HIGH IMPEDANCE L777 IMPEDANCE DATA OUT ANA DATA VALID M tpy }+ trp oy Veg SUPPLY 1 _ CURRENT 50% ok wi }t tacs Write Cycle No. 1 (WE Controllea)[8) ADDRESS CE WE DATA IN DATA OUT (7C172} tewe tsp DATA-IN VALID tuzwe DATA UNDEFINED j+ tack 171-7 tup tiawe HIGH IMPEDANCE DATA OUT - (70171) tapv DATA UNDEFINED * Write Cycle No. 2 (CE Controlled)[& 12] ADDRESS CE tsa WE tsp DATA IN DATA-IN VALID oar ae) DATA UNDEFINED DATA OUT HIGH IMPEDANCE DATA VALID C171-8 (70171) DATA UNDEFINED 11. Address valid prior to or coincident with CE transition LOW. we DATA VALID 12, IfCE goes HIGH simultaneously with WE HIGH, the output remains C171-9 in a high-impedance state (7C172). 2-274CYPRESS SEMICONDUCTOR NORMALIZED fog, = T-46-23-08 cy7ci7y Ss oF ores CY7C172 - SEMICONDUCTOR Typical DC and AC Characteristics NORMALIZED SUPPLY CURRENT NORMALIZED SUPPLY CURRENT OUTPUT SOURCE CURRENT vs. SUPPLY VOLTAGE vs. AMBIENT TEMPERATURE => vs. OUTPUT VOLTAGE 1.4 12 = 120 B12 2 10 2 100 1.0 8 ee & o 08 = 80 08 wy 3 0.6 3 06 Z 5 6 c 0.4 40 04 8 a 0.2 5 Isp . E 0.0 40 45 5.0 5.6 6.0 -55 25 1.0 2.0 3.0 40 SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE (C) OUTPUT VOLTAGE (V) NORMALIZED ACCESS TIME NORMALIZED ACCESS TIME OUTPUT SINK CURRENT ys. SUPPLY VOLTAGE ys, AMBIENT TEMPERATURE vs. OUTPUT VOLTAGE 1.4 1.6 @ 140 E 120 3 1.3 514 5 5 Gi 100 @ 12 a M1 & S| N 12 A 3 80 < i4 x = 3 1 Z 60 x & 10 a g 10 2 a Veo = 6.0V 5 40 08 E 3 0.6 45 5.0 6.0 55 25 125 0.0 1.0 2.0 3.0 40 SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE (C) OUTPUT VOLTAGE (V) TYPICAL POWER-ON CURRENT TYPICAL ACCESS TIME CHANGE vs. SUPPLY YOLTAGE ys, OUTPUT LOADING NORMALIZED Icc vs. CYCLE TIME 3.0 30.0 WW T Yoo = 5.0y 25 . A= 25 _ 25.0 8 Vin = O.5V 8 20 20.0 Qa 10 N < N a 2 a = 15 < 15.0 = 8 10 # 100 Vee = S a9 Z 2 ; Ta = 25C < LY 0.0 08 00 10 20 40 5.0 Qo 200 800 1000 10 20 30 40 SUPPLY VOLTAGE (V) CAPACITANCE (pF) CYCLE FREQUENCY (MHz) 2-275 WEE D 254%bb2 0006537 & EMCYP SRAMs mI _CYPRESS SEMICONDUCTOR WBE D MM 258%bbe 0006538 4 ENCYP =, CY7C171 SSS SEMICONDUCTOR Ordering Information Speed Ordering Code Payee Ores i. Ordering Code ee ed 25 CY7C17125PC P13 Commercial 25 CY7C17225PC P13 Commercial CY7C171-25DC Di4 CY7C17225DC Di4 CY7C17125LC L64 : CY7C172~25LC L64 CY7C17125VC vi13 CY7C1722-25VC vi3 35 CY7C171-35PC P13 Commercial 35 CY7C17235PC P13 Commercial CY7C171-35DC D14 CY7C17235DC Di4 CY7C171-35LC L64 , CY7C172~35LC L64 CY7C171-35VC vi3 CY7C172-35VC V13 CY7C171-35DMB Di4 Military CY7C172-35DMB D114 Military CY7C171-35LMB L64 CY7C172-35LMB L64 45 CY7C171~45PC Pi3 Commercial 45 CY7C17245PC Pi3 Commercial CY7C171~45DC Di CY7C172-45DC D14 CY7C171~45LC L64 CY7C17245LC L64 CY7Ci7145VC v13 CY7C172-45VC Vi3 CY7C171-45DMB Di4 Military CY7C17245DMB D114 Military CY7C17145LMB 164 CY7C172-45LMB L64 MILITARY SPECIFICATIONS Switching Characteristics Group A Subgroup Testing Parameters | Subgroups DC Characteristics READ CYCLE : Parameters Subgroups tac 7,8, 9, 10, 11 Vou 1,2,3 taa 7, 8, 9, 10, 14 VoL 1,23 toHa 7, 8, 9, 10, 11 Vin 123 tace T, 8, 9, 10, 11 Vin Max. 1,23 trcs 7, 8, 9, 10, 11 Tix 123 trcH 7, 8, 9, 10, 11 jos 123 WRITE CYCLE Too 123 two 7, 8, 9, 10, 11 Tso 23 tsce, 7, 8, 9, 10, 11 taw 7, 8, 9, 10, 11 spa 1,213 tHA 7,8,9, 10, 11 tsa 7, 8, 9, 10, 11 tpwe 7, 8, 9, 10, 11 tsp 7, 8, 9, 10, 11 tup 7, 8, 9, 10, 11 tawElsl 7,8, 9, 10, 11 tapyetl 7, 8, 9, 10, 11 Note: 13, 7C171 only. Document #: 38-00036-E | | 2-276 | | | |