FPF1320 / FPF1321 IntelliMAXTM Dual-Input Single-Output Advanced Power Switch with True Reverse-Current Blocking Features Description DISO Load Switches ESD Protected: - Human Body Model: >6 kV Input Supply Operating Range: 1.5 V ~ 5.5 V RON 50 m at VIN=3.3 V Per Channel (Typical) True Reverse-Current Blocking (TRCB) Fixed Slew Rate Controlled 130 s for < 1 F COUT ISW: 1.5 A Per Channel (Maximum) Quick Discharge Feature on FPF1321 Logic CMOS IO Meets JESD76 Standard for GPIO Interface and Related Power Supply Requirements - Charged Device Model: >1.5 kV - IEC 61000-4-2 Air Discharge: >15 kV - IEC 61000-4-2 Contact Discharge: >8 kV Applications The FPF1320/21 is a Dual-Input Single-Output (DISO) load switch consisting of two sets of slew-rate controlled, low on-resistance, P-channel MOSFET switches and integrated analog features. The slew-ratecontrolled turn-on characteristic prevents inrush current and the resulting excessive voltage droop on the power rails. The input voltage range operates from 1.5 V to 5.5 V to align with the requirements of low-voltage portable device power rails. FPF1320/21 performs seamless power-source transitions between two input power rails using the SEL pin with advanced breakbefore-make operation. FPF1320/21 has a TRCB function to block unwanted reverse current from output to input during ON/OFF states. The switch is controlled by logic inputs of the SEL and EN pins, which are capable of interfacing directly with low-voltage control signals (GPIO). FPF1321 has 65 on-chip load resistor for output quick discharge when EN is LOW. FPF1320/21 is available in 1.0 mm x 1.5 mm WLCSP, 6-bump, with 0.5 mm pitch. FPF1321B is available in 1.0 mm x 1.5 mm WLCSP, 6-bump, 0.5 mm pitch with backside laminate. Smart phones / Tablet PCs Portable Devices Near Field Communication (NFC) Capable SIM Card Power Supply Ordering Information Part Number Switch Per Reverse Output Rise Top Channel Channel (Typ.) Current Discharge Time (tR) Mark at 3.3 VIN Blocking FPF1320UCX QS DISO 50 m Yes NA 130 s FPF1321UCX QT DISO 50 m Yes 65 130 s FPF1321BUCX QT DISO (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 50 m Yes 65 130 s Package 1.0 mm X 1.5 mm Wafer-Level ChipScale Package (WLCSP) 6-Bumps, 0.5 mm Pitch 1.0 mm X 1.5 mm Wafer-Level ChipScale Package (WLCSP) 6-Bumps, 0.5 mm Pitch with Backside Laminate www.fairchildsemi.com FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch September 2013 Figure 1. Typical Application Block Diagram Figure 2. FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Application Diagram Functional Block Diagram (Output Discharge Path for FPF1321 Only) (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 www.fairchildsemi.com 2 Figure 3. Pin Configuration in Package View with Pin 1 Indicator EN VIN A VIN A EN A1 A2 A2 A1 SEL VOUT VOUT SEL B1 B2 B2 B1 GND VIN B VIN B GND C1 C2 C2 C1 Top View Figure 4. Bottom View Pin Assignments Pin Description Pin # Name A1 EN Enable input. Active HIGH. There is an internal pull-down resistor at the EN pin. SEL Input power selection inputs. See Table 1. There are internal pull-down resistors at the SEL pins. A2 VINA Supply Input. Input to the power switch A. B2 VOUT Switch output C1 GND Ground C2 VINB Supply Input. Input to power switch B. B1 Table 1. Description FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Pin Configuration Truth Table SEL EN Switch A Switch B VOUT Status LOW HIGH ON OFF VINA VINA Selected HIGH HIGH OFF ON VINB VINB Selected X LOW OFF OFF Floating for FPF1320 GND for FPF1321 Both Switches are OFF (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 www.fairchildsemi.com 3 Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameters VIN VINA, VINB, VSEL, VEN, VOUT to GND ISW Maximum Continuous Switch Current per Channel PD Total Power Dissipation at TA=25C TSTG Operating and Storage Junction Temperature JA Thermal Resistance, Junction-to-Ambient (1 in.2 Pad of 2-oz. Copper) ESD Electrostatic Discharge Capability Min. Max. Unit -0.3 6 V 1.5 A -65 1.2 W 150 C (1) 85 110(2) Human Body Model, JESD22-A114 6.0 Charged Device Model, JESD22-C101 1.5 Air Discharge (VINA, VINB to GND), IEC61000-4-2 System Level 15.0 Contact Discharge (VINA, VINB to GND), IEC61000-4-2 System Level 8.0 C/W kV Notes: 1. Measured using 2S2P JEDEC std. PCB. 2. Measured using 2S2P JEDEC PCB cold-plate method. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameters Min. Max. Unit VIN Input Voltage on VINA, VINB 1.5 5.5 V TA Ambient Operating Temperature -40 85 C (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Absolute Maximum Ratings www.fairchildsemi.com 4 VINA=VINB=1.5 to 5.5 V, TA=-40 to 85C unless otherwise noted. Typical values are at VINA=VINB=3.3 V and TA=25C. Symbol Parameters Condition Min. Typ. Max. Unit 1.5 5.5 V 5 A A Basic Operation VINA, VINB Input Voltage ISD Shutdown Current SEL=HIGH or LOW, EN=GND, VOUT=GND, VINA=VINB=5.5 V IQ Quiescent Current IOUT=0mA, SEL=HIGH or LOW, EN=HIGH, VINA=VINB=5.5 V 12 22 VINA=VINB=5.5 V, IOUT=200 mA, TA=25C 42 60 VINA=VINB=3.3 V, IOUT=200 mA, TA=25C 50 VINA=VINB=1.8 V, IOUT=200 mA, TA=25C to 85C 80 RON On-Resistance m VINA=VINB=1.5 V, IOUT=200 mA, TA=25C VIH VIL VDROOP_OUT ISEL/IEN RSEL_PD/REN_PD RPD 170 SEL, EN Input Logic High Voltage VINA, VINB=1.5 V - 5.5 V SEL, EN Input Logic Low Voltage VINA, VINB=1.8 V - 5.5 V 0.65 SEL, EN Input Logic Low Voltage VINA, VINB=1.5 V - 1.8 V 0.60 1.15 V V Output Voltage Droop while VINA=3.3 V, VINB=5 V, Switching from Channel Switching from Higher Input Voltage Lower VINA VINB, RL=150 , COUT=1 F Input Voltage(3) 100 mV Input Leakage at SEL and EN Pin 1.2 A Pull-Down Resistance at SEL or EN Pin Output Pull-Down Resistance 7 M SEL=HIGH or LOW, EN=GND, IFORCE=20 mA, TA=25C, FPF1321 65 True Reverse Current Blocking VT_RCB RCB Protection Trip Point VOUT - VINA or VINB 45 mV VR_RCB RCB Protection Release Trip Point VINA or VINB -VOUT 25 mV IRCB tRCB_ON VINA or VINB Current During VOUT=5.5 V, VINA or VINB=Short to RCB GND 9 RCB Response Time when Device is ON(3) 5 VINA or VINB=5 V, VOUTVINA,B=100 mV 15 FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Electrical Characteristics A s Continued on the following page... (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 www.fairchildsemi.com 5 VINA=VINB=1.5 to 5.5 V, TA=-40 to 85C unless otherwise noted. Typical values are at VINA=VINB=3.3 V and TA=25C. Symbol Parameters Condition Min. Typ. Max. Unit Dynamic Characteristics tDON Turn-On Delay(4) (4) tR VOUT Rise Time tON Turn-On Time(6) tDOFF Turn-Off Delay(4) tF (4) VOUT Fall Time (7) tOFF Turn-Off Time tDOFF Turn-Off Delay(4,5) tF tOFF tTRANR tSLH tTRANF tSHL (4,5) VOUT Fall Time (5,7) Turn-Off Time Transition Time LOW HIGH(4) Switch-Over Rising Delay(4) Transition Time HIGH LOW(4) Switch-Over Falling Delay(4) VINA or VINB=3.3 V, RL=150 , CL=1 F, TA=25C, SEL: HIGH, EN: LOW HIGH 120 130 s 250 s VINA or VINB=3.3 V, RL=150 , CL=1 F, TA=25C, SEL: HIGH, EN: HIGH LOW 15 s 320 s 335 s 6 s 110 s 116 s 3 s 1 s 45 s 5 s VINA or VINB =3.3 V, RL=150 , CL=1 F, TA=25C, SEL: HIGH, EN: HIGH LOW, Output Discharge Mode, FPF1321 VINA=3.3 V, VINB=5 V, Switching from VINA VINB, SEL: LOW HIGH, EN: HIGH, RL=150 , CL=1 F, TA=25C VINA=3.3 V, VINB=5 V, Switching from VINB VINA, SEL: HIGH LOW, EN: HIGH, RL=150 , C=1 F, TA=25C Notes: 3. This parameter is guaranteed by design and characterization; not production tested. 4. tDON/tDOFF/tR/tF/tTRANR/tTRANF/tSLH/tSHL are defined in Figure 5. 5. FPF1321 output discharge is enabled during off. 6. tON=tR + tDON. 7. tOFF=tF + tDOFF. (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 s FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Electrical Characteristics (Continued) www.fairchildsemi.com 6 Figure 5. (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 Dynamic Behavior Timing Diagram FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Timing Diagram www.fairchildsemi.com 7 Figure 6. Figure 8. Supply Current vs. Temperature Figure 7. Shutdown Current vs. Temperature Figure 9. Figure 10. RON vs. Temperature Supply Current vs. Supply Voltage Shutdown Current vs. Supply Voltage FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Typical Characteristics Figure 11. RON vs. Supply Voltage Continued on the following page... (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 www.fairchildsemi.com 8 Figure 12. VIL vs. Temperature Figure 13. VIL vs. Supply Voltage Figure 14. VIH vs. Temperature Figure 15. VIH vs. Supply Voltage Figure 16. VIH / VIL vs. Supply Voltage Figure 17. RSEL_PD and REN_PD vs. Temperature FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Typical Characteristics Continued on the following page... (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 www.fairchildsemi.com 9 Figure 18. RSEL_PD and REN_PD vs. Supply Voltage Figure 19. tDON and tDOFF vs. Temperature Figure 20. tR and tF with FPF1320 vs. Temperature Figure 21. tR and tF with FPF1321 vs. Temperature Figure 22. Transition Time vs. Temperature Figure 23. Switch Over Time vs. Temperature FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Typical Characteristics Continued on the following page... (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 www.fairchildsemi.com 10 Figure 25. IRCB vs. Temperature Figure 24. TRCB Trip and Release vs. Temperature Figure 26. RPD with FPF1321 vs. Temperature Figure 27. Turn-On Response (VINA=3.3 V, CIN=1 F, COUT=1 F, RL=150 , SEL=LOW) FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Typical Characteristics Figure 29. Turn-Off Response with FPF1321 (VINA=3.3 V, CIN=1 F, COUT=1 F, RL=150 , SEL=LOW) Figure 28. Turn-Off Response with FPF1320 (VINA=3.3 V, CIN=1 F, COUT=1 F, RL=150 , SEL=LOW) Continued on the following page... (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 www.fairchildsemi.com 11 Figure 30. Power Source Transition from 3.3 V to 5 V Figure 31. Power Source Transition from 5 V to 3.3 V (VINA=3.3 V, VINB=5 V, CIN=1 F, COUT=1 F, (VINA=3.3 V, VINB=5 V, CIN=1 F, COUT=1 F, RL=150 ) RL=150 ) Figure 33. TRCB During On (VINA=5 V, VOUT=6 V, CIN=1 F, COUT=1 F, EN=HIGH, No RL) Figure 32. TRCB During Off (VINA=VINB=Floating, VOUT=5V, CIN=1 F, COUT=1 F, EN=LOW, No RL) (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Typical Characteristics www.fairchildsemi.com 12 The FPF1320 and FPF1321 are dual-input single-output power multiplexer switches with controlled turn-on and seamless power source transition. The core is a 50 m P-channel MOSFET and controller capable of functioning over a wide input operating range of 1.5 V to 5.5 V per channel. The EN and SEL pins are activeHIGH, GPIO/CMOS-compatible input. They control the state of the switch and input power source selection, respectively. TRCB functionality blocks unwanted reverse current during both ON and OFF states when higher VOUT than VINA or VINB is applied. FPF1321 has a 65 output discharge path during off. Power Source Selection Input Capacitor FPF1320/1 adopts an advanced break-before-make control, which can result in minimized output voltage drop during the transition time. Input power source selection can be controlled by the SEL pin. When SEL is LOW, output is powered from VINA while SEL is HIGH, VINB is powering output. The SEL signal is ignored during device OFF. Output Voltage Drop during Transition Output voltage drop usually occurs during input power source transition period from low voltage to high voltage. The drop is highly dependent on output capacitance and load current. To limit the voltage drop on the input supply caused by transient inrush current when the switch turns on into a discharged load capacitor; a capacitor must be placed between the VINA or VINB pins to the GND pin. At least 1 F ceramic capacitor, CIN, placed close to the pins, is usually sufficient. Higher-value CIN can be used to reduce more the voltage drop. Output Capacitor Capacitor COUT of at least 1 F is highly recommended between the VOUT and GND pins to achieve minimized output voltage drop during input power source transition. This capacitor also prevents parasitic board inductance. Inrush Current True Reverse-Current Blocking Inrush current occurs when the device is turned on. Inrush current is dependent on output capacitance and slew rate control capability, as expressed by: The true reverse-current blocking feature protects the input source against current flow from output to input regardless of whether the load switch is on or off. I INRUSH = COUT x VIN - VINITIAL + I LOAD tR Board Layout (1) For best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effect that parasitic trace inductance on normal and short-circuit operation. Wide traces or large copper planes for power pins (VINA, VINB, VOUT and GND) minimize the parasitic electrical effects and the thermal impedance. where: COUT: Output capacitance; tR: Slew rate or rise time at VOUT; VIN: Input voltage, VINA or VINB; VINITIAL: Initial voltage at COUT, usually GND; and ILOAD: Load current. Higher inrush current causes higher input voltage drop, depending on the distributed input resistance and input capacitance. High inrush current can cause problems. FPF1320/1 has a 130 s of slew rate capability under 3.3 VIN at 1 F of COUT and 150 of RL so inrush current and input voltage drop can be minimized. (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Operation and Application Description www.fairchildsemi.com 13 0.03 C E 2X F A (O0.350) SOLDER MASK OPENING B (O0.250) Cu Pad A1 (1.00) BALL A1 INDEX AREA D (0.50) 0.03 C 2X TOP VIEW RECOMMENDED LAND PATTERN (NSMD PAD TYPE) 0.06 C 0.625 0.539 0.05 C C 0.3320.018 0.2500.025 E SEATING PLANE D SIDE VIEWS NOTES: A. NO JEDEC REGISTRATION APPLIES. 0.005 O0.315 +/- .025 6X 0.50 C 1.00 B A 0.50 (Y) 0.018 1 2 F (X) 0.018 BOTTOM VIEW C A B B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCE PER ASMEY14.5M, 1994. D. DATUM C IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E. PACKAGE NOMINAL HEIGHT IS 582 MICRONS 43 MICRONS (539-625 MICRONS). F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. DRAWING FILNAME: MKT-UC006AFrev2. Figure 34. 6-Ball, 1.0 x 1.5 mm, Wafer-Level Chip-Scale Package (WLCSP) FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch Physical Dimensions Product-Specific Dimensions Product D E X Y FPF1320UCX 1460 m 30 m 960 m 30 m 230 m 230 m FPF1321UCX 1460 m 30 m 960 m 30 m 230 m 230 m FPF1321BUCX 1460 m 30 m 960 m 30 m 230 m 230 m Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. http://www.fairchildsemi.com/dwg/UC/UC006AF.pdf (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 www.fairchildsemi.com 14 FPF1320 / FPF1321 -- IntelliMAXTM Dual-Input Single-Output Advanced Power Switch (c) 2011 Fairchild Semiconductor Corporation FPF1320 / FPF1321 * Rev. 1.0.2 www.fairchildsemi.com 15