Data Sheet V1.0 1 2003-01-10
Smart Lowside Power Switch
HITFETâ BSP 75N
Data Sheet V1.0
Features
Logic Level Input
Input protection (ESD)
Thermal shutdown with auto restart
Overload protection
Short circuit protection
Overvoltage protection
Current limitation
Application
All kinds of resistive, inductive and capacitive loads in switching applications
µC compatible power switch for 12 V and 24 V DC applications and for 42 Volt
Powernet
Replaces electromechanical relays and discrete circuits
General Description
N channel vertical power FET in Smart Power Technology. Fully protected by embedded
protection functions.
Type Ordering Code Package
HITFETâ BSP 75N Q67060-S7215 P-SOT223-4
Product Summary
Parameter Symbol Value Unit
Continuous drain source voltage VDS 60 V
On-state resistance RDS(ON) 550 m
Current limitation ID(lim) 1A
Nominal load current ID(Nom) 0.7 A
Clamping energy EAS 550 mJ
HITFETâ BSP 75N
Data Sheet V1.0 2 2003-01-10
Figure 1 Block Diagram
Figure 2 Pin Configuration
Pin Definitions and Functions
Pin No. Symbol Function
1IN Input; activates output and supplies internal logic
2 DRAIN Output to the load
3 + TAB SOURCE Ground; pin3 and TAB are internally connected
HITFET
Logic OUTPUT
Stage
Over voltage
Protection
IN
DRAIN
V
bb
dV/dt
limitation
SOURCE
ESD
Short circuit
Protection
Current
Limitation
Over
temperature
Protection
M
1
2
3
TAB
IN
DRAIN
SOURCE
SOURCE
Data Sheet V1.0 3 2003-01-10
HITFETâ BSP 75N
Circuit Description
The BSP 75N is a monolithic power switch in Smart Power Technology (SPT) with a
logic level input, an open drain DMOS output stage and integrated protection functions.
It is designed for all kind of resistive and inductive loads (relays, solenoid) in automotive
and industrial applications.
Protection Functions
Over voltage protection: An internal clamp limits the output voltage at VDS(AZ) (min.
60V) when inductive loads are switched off.
Current limitation: By means of an internal current measurement the drain current is
limited at ID(lim) (1.4 - 1.5 A typ.). If the current limitation is active the device operates
in the linear region, so power dissipation may exceed the capability of the heatsink.
This operation leads to an increasing junction temperature until the over temperature
threshold is reached.
Over temperature and short circuit protection: This protection is based on sensing
the chip temperature. The location of the sensor ensures a fast and accurate junction
temperature detection. Over temperature shutdown occurs at minimum 150 °C. A
hysteresis of typ. 10 K enables an automatic restart by cooling.
The device is ESD protected according Human Body Model (4 kV) and load dump
protected (see Maximum Ratings).
HITFETâ BSP 75N
Data Sheet V1.0 4 2003-01-10
Absolute Maximum Ratings
Tj = 25 °C, unless otherwise specified
Parameter Symbol Values Unit Remarks
Continuous drain source voltage 1) VDS 60 V
Drain source voltage for
short circuit protection
VDS 36 V
Continuous input voltage VIN -0.2 … +10 V
Peak input voltage VIN -0.2 … +20 V
Continuous Input Current
-0.2V VIN 10V
VIN<-0.2V or VIN>10V
IIN
no limit
| IIN |≤ 2mA
mA
Operating temperature range
Storage temperature range
Tj
Tstg
-40 … +150
-55 … +150
°C
°C
Power dissipation (DC) Ptot 1.8 W
Unclamped single pulse inductive energy EAS 550 mJ ID(ISO) = 0.7 A;
Vbb =32V
Load dump protection 2)
IN = low or high (8 V); RL = 50
IN = high (8 V); RL = 22
VLoadDump
80
47
VVLoadDump =
VP + VS;
VP = 13.5 V
RI3) = 2 ;
td = 400 ms;
Electrostatic discharge voltage (Human
Body Model)
according to MIL STD 883D, method
3015.7 and EOS/ESD assn. standard
S5.1 - 1993
VESD 4000 V
DIN humidity category, DIN 40 040 E
IEC climatic category, DIN IEC 68-1 40/150/56
Thermal Resistance
Junction soldering point RthJS 10 K/W
Junction - ambient4) RthJA 70 K/W
1) See also Figure 7 and Figure 10.
2) VLoadDump is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839. See also page 7.
3) RI = internal resistance of the load dump test pulse generator LD200.
4) Device on epoxy pcb 40 mm × 40 mm × 1.5 mm with 6 cm2 copper area for pin 4 connection.
Data Sheet V1.0 5 2003-01-10
HITFETâ BSP 75N
Electrical Characteristics
Tj = 25 °C, unless otherwise specified
Parameter Sym-
bol
Limit Values Unit Test Conditions
min. typ. max.
Static Characteristics
Drain source clamp voltage VDS(AZ) 60 75 V ID = 10 mA,
Tj = -40 +150 °C
Off state drain current IDSS ––5µAVIN = 0 V,
VDS = 32 V,
Tj = -40 +150 °C
Input threshold voltage VIN(th) 11.82.5VID = 10 mA
Input current:
normal operation, ID < ID(lim):
current limitation mode, ID = ID(lim):
After thermal shutdown, ID = 0 A:
IIN(1)
IIN(2)
IIN(3)
1000
100
250
1500
200
400
2000
µAVIN = 5 V
On-state resistance
Tj = 25 °C
Tj = 150 °C
RDS(on)
490
850
675
1350
mID = 0.7 A,
VIN = 5 V
On-state resistance
Tj = 25 °C
Tj = 150 °C
RDS(on)
430
750
550
1000
mID = 0.7 A,
VIN = 10 V
Nominal load current ID(Nom) 0.7 ––AVBB = 12 V,
VDS = 0.5 V,
TS = 85 °C,
Tj < 150 °C
Current limit ID(lim) 11.51.9AVIN = 10 V,
VDS = 12 V
Dynamic Characteristics 1)
Turn-on time VIN to 90% ID:ton 10 20 µsRL = 22 ,
VIN = 0 to 10 V,
VBB = 12 V
Turn-off time VIN to 10% ID:toff 10 20 µsRL = 22 ,
VIN = 10 to 0 V,
VBB = 12 V
HITFETâ BSP 75N
Data Sheet V1.0 6 2003-01-10
Slew rate on 70 to 50% VBB:-dVDS/
dton
510V/
µs
RL = 22 ,
VIN = 0 to 10 V,
VBB = 12 V
Slew rate off 50 to 70% VBB:dVDS/
dtoff
10 15 V/
µs
RL = 22 ,
VIN = 10 to 0 V,
VBB = 12 V
Protection Functions2)
Thermal overload trip
temperature
Tjt 150 165 180 °C
Thermal hysteresis
Tjt 10 Κ
Unclamped single pulse inductive
energy Tj = 25 °C
Tj = 150 °C
EAS
550
200
mJ ID(ISO) = 0.7 A,
VBB = 32 V
Inverse Diode
Continuous source drain voltage VSD 1VVIN = 0 V,
-ID = 2 × 0.7 A
1) See also Figure 9.
2) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
datasheet. Fault conditions are considered as outside normal operating range. Protection functions are not
designed for continuous, repetitive operation.
Electrical Characteristics (contd)
Tj = 25 °C, unless otherwise specified
Parameter Sym-
bol
Limit Values Unit Test Conditions
min. typ. max.
Data Sheet V1.0 7 2003-01-10
HITFETâ BSP 75N
EMC-Characteristics
The following EMC-Characteristics outline the behavior of typical devices. They are not
part of any production test.
Table 1 Test Conditions
Parameter Symbol Value Unit Remark
Temperature TA23 ±5 °C
Supply Voltage VS13.5 V
Load RL27 ohmic
Operation mode PWM
DC
fINx=100Hz, D=0.5
ON / OFF
DUT specific VIN(HIGH)=5V
Fast electrical transients
acc. to ISO 7637
Test1)
Pulse
1) The test pulses are applied at VS
Max.
Test
Level
Test Result Pulse Cycle Time
and Generator
Impedance
ON OFF
1 -200V C C 500ms ; 10
2 +200V C C 500ms ; 10
3a -200V C C 100ms ; 50
3b +200V C C 100ms ; 50
4 -7V C C 0.01
5 175V E(65V) E(75V) 400ms ; 2
Definition of functional status
Class Content
C All functions of the device are performed as designed after exposure to
disturbance.
E One or more function of a device does not perform as designed after
exposure and can not be returned to proper operation without repairing
or replacing the device. The value after the character shows the limit.
HITFETâ BSP 75N
Data Sheet V1.0 8 2003-01-10
Figure 3 Test circuit for ISO pulse
Conducted Emissions
Acc. IEC 61967-4 (1/150 method)
Typ. Vbb Emissions at PWM-mode with
150-matching network
Figure 4 Test circuit for conducted
emission 1)
Conducted Susceptibility
Acc. 47A/658/CD IEC 62132-4 (Direct
Power Injection)
Direct Power Injection: Forward Power
CW
Failure Criteria: Amplitude or frequency
variation max. 10% at OUT
Typ. Vbb Susceptibility at DC-ON/OFF
and at PWM
Test circuit for conducted susceptibility
2)
BSP75N
SOURCE
DRAININ
V
BB
R
L
PULSE
-20
-10
0
10
20
30
40
50
60
70
80
90
100
0,1 1 10 100 1000
f / MHz
dBµV
Noise level
BSP75N
150ohm Class6
150ohm Class1
150Ω / 8-H
150Ω / 13-N
150
-Network
BSP75N
SOURCE
DRAININ
V
BB
R
L
1) For defined de coupling and high reproducibility a
defined choke (5µH at 1MHz) is inserted in the
Vbb-Line.
2) Broadband Artificial Network (short: BAN) consists
of the same choke (5µH at 1MHz) and the same
150 Ohm-matching network as for emission
measurement for defined de coupling and high
reproducibility.
0
5
10
15
20
25
30
35
40
1 10 100 1000
f / MHz
dBm
Limit
OUT, ON
OUT, OFF
OUT, PWM
HF
BSP75N
SOURCE
DRAININ
V
BB
R
L
B A N
HITFETâ BSP 75N
Data Sheet V1.0 9 2003-01-10
Block diagram
Figure 5 Terms
Figure 6 Input Circuit (ESD
protection)
ESD zener diodes are not designed for DC
current.
Figure 7 Inductive and Over
voltage Output Clamp
Figure 8 Application Circuit
I
IN
V
IN
V
bb
I
D
HITFET
SOURCE
DRAININ
V
DS
IN
SOURCE
Source
Drain
V
DS
I
D
V
AZ
Power
DMOS
LOAD
BSP75N
SOURCE
DIN
V
BB
uC
V
cc
GND
Px.1
HITFETâ BSP 75N
Data Sheet V1.0 10 2003-01-10
Timing diagrams
Figure 9 Switching a Resistive
Load
Figure 10 Switching an Inducitve
Load
Figure 11 Short circuit
t
V
DS
t
I
D
t
on
t
off
0.9*I
D
0.1*I
D
V
IN
t
t
V
DS
t
I
D
V
BB
V
DS(AZ)
V
IN
t
t
ϑ
ϑϑ
ϑ
j
I
D
t
thermal hysteresis
V
IN
t
I
D(lim)
HITFETâ BSP 75N
Data Sheet V1.0 11 2003-01-10
1 Max. allowable power dissipation
Ptot = f(TAmb)
3 On-state resistance RON = f(Tj);
ID = 0.7 A; VIN = 5 V
2 On-state resistance RON = f(Tj);
ID = 0.7 A; VIN = 10 V
4 Typ. input threshold voltage
VIN(th) = f(Tj); ID = 10 mA; VDS = 12 V
0
0,4
0,8
1,2
1,6
2
0 25 50 75 100 125 150
Ptot
W
TAmb
°C
max.
0
200
400
600
800
1000
1200
1400
-50 -25 0 25 50 75 100 125 150
RON
m
Tj
°C
max.
typ.
0
100
200
300
400
500
600
700
800
900
1000
-50 -25 0 25 50 75 100 125 150
RON
m
Tj
°C
max.
typ.
0
0,5
1
1,5
2
2,5
-50 -25 0 25 50 75 100 125 150
VIN(th)
V
Tj
°C
typ.
HITFETâ BSP 75N
Data Sheet V1.0 12 2003-01-10
5 Typ. on-state resistance RON = f(VIN);
ID = 0.7 A; Tj = 25 °C
7 Typ. short circuit current
ID(SC) = f(VIN); VDS = 12 V, Tj = 25 °C
6 Typ. current limitation ID(lim) = f(Tj);
VDS = 12 V, VIN = 10 V
8 Max. transient thermal impedance
ZthJA = f(tp) @ 6cm²; Parameter: D = tp/T
0
500
1000
1500
2000
0246810
VIN
V
typ.
RON
m
0
0,5
1
1,5
2
0246810
ID(SC)
A
VIN
V
typ.
0
0,5
1
1,5
2
-50 -25 0 25 50 75 100 125 150
ID(lim)
A
Tj
°C
typ.
0,1
1
10
100
0,00001 0,001 0,1 10 1000 10000
0
0
0.01
0.02
0.05
0.1
0.2
0.5
D=
Zth(JA)
K/W
tP
s
Data Sheet V1.0 13 2003-01-10
HITFETâ BSP 75N
Package Outlines
±0.1
±0.2
±0.1
0.7
4
3
21
6.5
3
acc. to
+0.2
DIN 6784
1.6
±0.1
15˚max
±0.04
0.28
7±0.3
±0.2
3.5
0.5
0.1 max
min
B
M
0.25
B
A
2.3
4.6
A
M
0.25
P-SOT223-4
(Small Outline Transistor)
GPS05560
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”
Dimensions in mm
SMD = Surface Mounted Device
HITFETâ BSP 75N
Data Sheet V1.0 14 2003-01-10
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Infineon Technologies AG,
Bereichs Kommunikation
St.-Martin-Strasse 76,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
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