ACS710KLATR-12CB-NL-T - ALLEGRO MICROSYSTEMS

DESCRIPTION

The Allegro™ ACS710 current sensor provides economical and

precise means for current sensing applications in industrial,

commercial, and communications systems. The device is offered

in a small footprint surface-mount package that allows easy

implementation in customer applications.

The ACS710 consists of a precision linear Hall sensor integrated

circuit with a copper conduction path located near the surface

of the silicon die. Applied current flows through the copper

conduction path, and the analog output voltage from the Hall

sensor linearly tracks the magnetic field generated by the

applied current. The accuracy of the ACS710 is maximized

with this patented packaging configuration because the Hall

element is situated in extremely close proximity to the current

to be measured.

High-level immunity to current conductor dV/dt and stray

electric fields, offered by Allegro proprietary integrated shield

technology, results in low ripple on the output and low offset

drift in high-side, high-voltage applications.

The voltage on the Overcurrent Input (VOC pin) allows

customers to define an overcurrent fault threshold for the device.

When the current flowing through the copper conduction path

(between the IP+ and IP– pins) exceeds this threshold, the open

drain Overcurrent Fault pin will transition to a logic low state.

Factory programming of the linear Hall sensor inside of the

ACS710 results in exceptional accuracy in both analog and

digital output signals.

The internal resistance of the copper path used for current

sensing is typically 1 mΩ, for low power loss. Also, the current

conduction path is electrically isolated from the low-voltage

ACS710-DS, Rev. 16

MCO-0000196

FEATURES AND BENEFITS

▪ Industry-leading noise performance with greatly improved

bandwidth through proprietary amplifier and filter design

techniques

▪ Small footprint package suitable for space-constrained

applications

▪ 1 mΩ primary conductor resistance for low power loss

▪ High isolation voltage, suitable for line-powered

applications

▪ User-adjustable Overcurrent Fault level

▪ Overcurrent Fault signal typically responds to an

overcurrent condition in < 2 μs

▪ Integrated shield virtually eliminates capacitive coupling

from current conductor to die due to high dV/dt voltage

transients

▪ Filter pin capacitor improves resolution in low bandwidth

applications

▪ 3 to 5.5 V single supply operation

▪ Factory-trimmed sensitivity and quiescent output voltage

▪ Chopper stabilization results in extremely stable quiescent

output voltage

▪ Ratiometric output from supply voltage

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

Continued on the next page…

PACKAGE: 16-Pin SOIC Hall-Effect IC

Package (suffix LA)

IP+

IP–

FAULT_EN

VOC

VCC

FAULT

VIOUT

FILTER

VZCR

GND

ACS710

0.1 µF

COC

1 nF

VIOUT

Fault_EN

VCC

RPU

IPB

RH, RLSets resistor divider reference for VOC

CFNoise and bandwidth limiting filter capacitor

COC Fault delay setting capacitor, 22 nF maximum

AUse of capacitor required

Use of resistor optional, 330 kΩ recommended.

If used, resistor must be connected between

U ¯¯L

pin and VCC.

Typical Application Circuit

Not to scale

CB Certicate Number:

US-23711-A2-UL

ACS710

January 30, 2020

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

sensor inputs and outputs. This allows the ACS710 family of sensors

to be used in applications requiring electrical isolation, without the

use of opto-isolators or other costly isolation techniques.

The ACS710 is provided in a small, surface-mount SOIC16 package.

The leadframe is plated with 100% matte tin, which is compatible

with standard lead (Pb) free printed circuit board assembly processes.

Internally, the device is Pb-free, except for flip-chip high-temperature

Pb-based solder balls, currently exempt from RoHS. The device is

fully calibrated prior to shipment from the factory.

Applications include:

• Motor control and protection

• Load management and overcurrent detection

• Power conversion and battery monitoring / UPS systems

DESCRIPTION (continued)

SELECTION GUIDE

Part Number IP

(A)

Sens (typ)

at VCC = 5 V

(mV/A)

Latched

Fault

(°C) Packing [1]

ACS710KLATR-6BB-T [2][3] ±6 151

Yes –40 to 125 Tape and Reel, 1000 pieces per reel

ACS710KLATR-10BB-T [2] ±10 85

ACS710KLATR-12CB-T [2] ±12.5 56

ACS710KLATR-25CB-T [2] ±25 28

ACS710KLATR-6BB-NL-T [2] ±6 151

No –40 to 125 Tape and Reel, 1000 pieces per reel

ACS710KLATR-10BB-NL-T [2] ±10 85

ACS710KLATR-12CB-NL-T [2] ±12.5 56

ACS710KLATR-25CB-NL-T [2] ±25 28

[1] Contact Allegro for packing options.

[2] Variant not intended for automotive applications.

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

ABSOLUTE MAXIMUM RATINGS

Characteristic Symbol Notes Rating Unit

Supply Voltage VCC 8 V

Filter Pin VFILTER 8 V

Analog Output Pin VIOUT 32 V

Overcurrent Input Pin VOC 8 V

Overcurrent ¯

U ¯¯L

Pin V ¯

U ¯¯L

¯ 8 V

Fault Enable (FAULT_EN) Pin VFAULTEN 8 V

Voltage Reference Output Pin VZCR 8 V

DC Reverse Voltage: VCC, FILTER, VIOUT, VOC,

U ¯¯L

, FAULT_EN, and VZCR Pins VRdcx –0.5 V

Excess to Supply Voltage: FILTER, VIOUT, VOC,

U ¯¯L

, FAULT_EN, and VZCR Pins VEX

Voltage by which pin voltage can exceed the VCC pin

voltage 0.3 V

Output Current Source IIOUT(Source) 3 mA

Output Current Sink IIOUT(Sink) 1 mA

Operating Ambient Temperature TARange K –40 to 125 °C

Junction Temperature TJ(max) 165 °C

Storage Temperature Tstg –65 to 170 °C

THERMAL CHARACTERISTICS

Characteristic Symbol Test Conditions Value Unit

Package Thermal Resistance RθJA

When mounted on Allegro demo board with 1332 mm2 (654 mm2 on com-

ponent side and 678 mm2 on opposite side) of 2 oz. copper connected to

the primary leadframe and with thermal vias connecting the copper layers.

Performance is based on current flowing through the primary leadframe

and includes the power consumed by the PCB.

17 °C/W

ISOLATION CHARACTERISTICS

Characteristic Symbol Notes Rating Unit

Dielectric Surge Strength Test Voltage VSURGE

Tested ±5 pulses at 2/minute in compliance to IEC 61000-4-5

1.2 µs (rise) / 50 µs (width). 6000 V

Dielectric Strength Test Voltage* VISO

Agency type-tested for 60 seconds per IEC/UL 60950-1 (2nd Edition). 3600 VRMS

Agency type-tested for 60 seconds per UL 1577. 3000 VRMS

Working Voltage for Basic Isolation VWVBI

Maximum approved working voltage for basic (single) isolation

according to IEC/UL 60950-1 (2nd Edition).

870 VPK or VDC

616 VRMS

Clearance DCL Minimum distance through air from IP leads to signal leads. 7.5 mm

Creepage DCR Minimum distance along package body from IP leads to signal leads. 7.5 mm

*Production tested for 1 second at 3600 VRMS in accordance with both UL 1577 and IEC/UL 60950-1 (edition 2).

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

IP–

VZCR

FILTERGND

VIOUT

Drain

IP+

FAULT

Signal

Recovery

OUT(Q)

Trim

Sensitivity

Trim

CLK

VOC

VCC

POR Fault Latch

OC Fault

FAULT Reset

3 mA

REF

POR

Hall

Bias

Control

Logic

FAULT_EN

–

Fault

Comparator

Hall

Amplifier

F(INT)

Functional Block Diagram

Latching Version

IP+

IP–

FAULT_EN

VOC

VCC

FAULT

VIOUT

FILTER

VZCR

GND

Terminal List Table, Latching Version

Number Name Description

1,2,3,4 IP+ Sensed current copper conduction path pins. Terminals for current being sensed;

fused internally, loop to IP– pins; unidirectional or bidirectional current flow.

5,6,7,8 IP– Sensed current copper conduction path pins. Terminals for current being sensed;

fused internally, loop to IP+ pins; unidirectional or bidirectional current flow.

9 GND Device ground connection.

10 VZCR Voltage Reference Output pin. Zero current (0 A) reference; output voltage on this

pin scales with VCC

. (Not a highly accurate reference.)

11 FILTER Filter pin. Terminal for an external capacitor connected from this pin to GND to set

the device bandwidth.

12 VIOUT Analog Output pin. Output voltage on this pin is proportional to current flowing

through the loop between the IP+ pins and IP– pins.

13 ¯

U ¯¯L

¯ Overcurrent Fault pin. When current flowing between IP+ pins and IP– pins

exceeds the overcurrent fault threshold, this pin transitions to a logic low state.

14 VCC Supply voltage.

15 VOC Overcurrent Input pin. Analog input voltage on this pin sets the overcurrent fault

threshold.

16 FAULT_EN Enables overcurrent faulting when high. Resets ¯

U ¯¯L

when low.

Pinout Diagram

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

IP–

VZCR

FILTERGND

VIOUT

Drain

IP+

FAULT

Signal

Recovery

OUT(Q)

Trim

Sensitivity

Trim

VOC

VCC

OC Fault

FAULT Reset

3 mA

REF

POR

Hall

Bias

FAULT_EN

–

Fault

Comparator

Hall

Amplifier

F(INT)

Functional Block Diagram

Non-Latching Version

IP+

IP–

FAULT_EN

VOC

VCC

FAULT

VIOUT

FILTER

VZCR

GND

Terminal List Table, Non-Latching Version

Number Name Description

1,2,3,4 IP+ Sensed current copper conduction path pins. Terminals for current being sensed;

fused internally, loop to IP– pins; unidirectional or bidirectional current flow.

5,6,7,8 IP– Sensed current copper conduction path pins. Terminals for current being sensed;

fused internally, loop to IP+ pins; unidirectional or bidirectional current flow.

9 GND Device ground connection.

10 VZCR Voltage Reference Output pin. Zero current (0 A) reference; output voltage on this

pin scales with VCC

. (Not a highly accurate reference.)

11 FILTER Filter pin. Terminal for an external capacitor connected from this pin to GND to set

the device bandwidth.

12 VIOUT Analog Output pin. Output voltage on this pin is proportional to current flowing

through the loop between the IP+ pins and IP– pins.

13 ¯

U ¯¯L

¯ Overcurrent Fault pin. When current flowing between IP+ pins and IP– pins

exceeds the overcurrent fault threshold, this pin transitions to a logic low state.

14 VCC Supply voltage.

15 VOC Overcurrent Input pin. Analog input voltage on this pin sets the overcurrent fault

threshold.

16 FAULT_EN Enables overcurrent faulting when high.

Pinout Diagram

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

COMMON OPERATING CHARACTERISTICS: Valid at TA = –40°C to 125°C, VCC

= 5 V, unless otherwise specified

Characteristic Symbol Test Conditions Min. Typ. Max. Units

ELECTRICAL CHARACTERISTICS

Supply Voltage [1] VCC 3 – 5.5 V

Nominal Supply Voltage VCCN – 5 – V

Supply Current ICC VIOUT open, ¯

U ¯¯L

pin high – 11 14.5 mA

Output Capacitance Load CLOAD VIOUT pin to GND – – 10 nF

Output Resistive Load RLOAD VIOUT pin to GND 10 – – kΩ

Magnetic Coupling from Device Conductor

to Hall Element MCHALL Current flowing from IP+ to IP– pins – 9.5 – G/A

Internal Filter Resistance [2] RF(INT) – 1.7 – kΩ

Primary Conductor Resistance RPRIMARY TA = 25°C – 1 – mΩ

ANALOG OUTPUT SIGNAL CHARACTERISTICS

Full Range Linearity [3] ELIN IP = ±IP0A –0.75 ±0.25 0.75 %

Symmetry [4] ESYM IP = ±IP0A 99.1 100 100.9 %

Bidirectional Quiescent Output VOUT(QBI) IP = 0 A, TA = 25°C – VCC×0.5 – V

Noise Density IND

Input-referenced noise density; TA = 25°C,

CL = 4.7 nF – 400 – µA

/√(Hz)

Noise IN

Input referenced noise at 120 kHz

Bandwidth; TA = 25°C,CL = 4.7 nF – 170 – mArms

TIMING PERFORMANCE CHARACTERISTICS

VIOUT Signal Rise Time tr

TA = 25°C, Swing IP from 0 A to IP0A,

no capacitor on FILTER pin, 100 pF from

VIOUT to GND

–3–μs

VIOUT Signal Propagation Time tPROP

TA = 25°C, no capacitor on FILTER pin,

100 pF from VIOUT to GND –1–μs

VIOUT Signal Response Time tRESPONSE

TA = 25°C, Swing IP from 0 A to IP0A,

no capacitor on FILTER pin, 100 pF from

VIOUT to GND

–4–μs

VIOUT Large Signal Bandwidth f3dB

–3 dB, Apply IP such that VIOUT =

1 Vpk-pk, no capacitor on FILTER pin,

100 pF from VIOUT to GND

– 120 – kHz

Power-On Time tPO

Output reaches 90% of steady-state level,

no capacitor on FILTER pin, TA = 25°C – 35 – μs

OVERCURRENT CHARACTERISTICS

Setting Voltage for Overcurrent Switch Point [5] VOC VCC × 0.25 – VCC × 0.4 V

Signal Noise at Overcurrent Comparator Input INCOMP – ±1 – A

Overcurrent Fault Switch Point Error [6][7] EOC

Switch point in VOC safe operating area;

assumes INCOMP = 0 A – ±5 – %

Overcurrent ¯

U ¯¯L

Pin Output Voltage V ¯

U ¯¯L

¯ 1 mA sink current at ¯

U ¯¯L

pin – – 0.4 V

Fault Enable (FAULT_EN Pin) Input Low

Voltage Threshold VIL – – 0.1 × VCC V

Fault Enable (FAULT_EN Pin) Input High

Voltage Threshold VIH 0.8 × VCC – – V

Fault Enable (FAULT_EN Pin) Input

Resistance RFEI –1–MΩ

Continued on the next page…

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

COMMON OPERATING CHARACTERISTICS (continued): Valid at TA = –40°C to 125°C, VCC

= 5 V, unless otherwise specified

Characteristic Symbol Test Conditions Min. Typ. Max. Units

OVERCURRENT CHARACTERISTICS (continued)

Fault Enable (FAULT_EN Pin) Delay [8] tFED

Set FAULT_EN to low, VOC = 0.25 × VCC

COC = 0 F; then run a DC IP exceeding the

corresponding overcurrent threshold; then

reset FAULT_EN from low to high and

measure the delay from the rising edge of

FAULT_EN to the falling edge of ¯

U ¯¯L

– 15 – µs

Fault Enable (FAULT_EN Pin) Delay

(Non-Latching versions) [9] tFED(NL)

Set FAULT_EN to low, VOC = 0.25 × VCC

COC = 0 F; then run a DC IP exceeding the

corresponding overcurrent threshold; then

reset FAULT_EN from low to high and

measure the delay from the rising edge of

FAULT_EN to the falling edge of ¯

U ¯¯L

– 150 – ns

Overcurrent Fault Response Time tOC

FAULT_EN set to high for a minimum

of 20 µs before the overcurrent event;

switch point set at VOC = 0.25 × VCC

;

delay from IP exceeding overcurrent

fault threshold to V ¯

U ¯¯L

< 0.4 V, without

external COC capacitor

– 1.9 – µs

Undercurrent Fault Response Time

(Non-Latching versions) tUC

FAULT_EN set to high for a minimum

of 20 µs before the undercurrent

event; switch point set at VOC = 0.25

× VCC

; delay from IP falling below the

overcurrent fault threshold to

V ¯

U ¯¯L

> 0.8 × VCC

, without external COC

capacitor, RPU = 330 kΩ

– 3 – µs

Overcurrent Fault Reset Delay tOCR

Time from VFAULTEN < VIL to

V ¯

U ¯¯L

> 0.8 × VCC , RPU = 330 kΩ – 500 – ns

Overcurrent Fault Reset Hold Time tOCH

Time from VFAULTEN < VIL to rising edge

of V ¯

U ¯¯L

– 250 – ns

Overcurrent Input Pin Resistance ROC TA = 25°C, VOC pin to GND 2 – – MΩ

VOLTAGE REFERENCE CHARACTERISTICS

Voltage Reference Output VZCR TA = 25 °C (Not a highly accurate reference) 0.48 x VCC 0.5 × VCC 0.51 x VCC V

Voltage Reference Output Load Current IZCR

Source current 3 – – mA

Sink current 50 – – µA

Voltage Reference Output Drift ∆VZCR – ±10 – mV

[1] Devices are programmed for maximum accuracy at VCC = 5 V. The device contains ratiometry circuits that accurately alter the 0 A Output Voltage and

Sensitivity level of the device in proportion to the applied VCC level. However, as a result of minor nonlinearities in the ratiometry circuit, additional output

error will result when VCC varies from the VCC level at which the device was programmed. Customers that plan to operate the device at a VCC level other

than the VCC level at which the device was programmed should contact their local Allegro sales representative regarding expected device accuracy levels

under these bias conditions.

[2] RF(INT) forms an RC circuit via the FILTER pin.

[3] This parameter can drift by as much as 0.8% over the lifetime of this product.

[4] This parameter can drift by as much as 1% over the lifetime of this product.

[5] See page 8 on how to set overcurrent fault switch point.

[6] Switch point can be lower at the expense of switch point accuracy.

[7] This error specification does not include the effect of noise. See the INCOMP specification in order to factor in the additional influence of noise on the

fault switch point.

[8] Fault Enable Delay is designed to avoid false tripping of an Overcurrent (OC) fault at power-up. A 15 µs (typical) delay will always be needed, every

time FAULT_EN is raised from low to high, before the device is ready for responding to any overcurrent event.

[9] During power-up, this delay is 15 µs in order to avoid false tripping of an Overcurrent (OC) fault.

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

PERFORMANCE CHARACTERISTICS: TA Range K, valid at TA = – 40°C to 125°C, VCC = 5 V, unless otherwise specified

Characteristic Symbol Test Conditions Min. Typ. Max. Units

X6BB CHARACTERISTICS

Optimized Accuracy Range [1] IPOA –7.5 – 7.5 A

Linear Sensing Range IR–14 – 14 A

Noise [2] VNOISE(rms) TA = 25°C, Sens = 100 mV/A, Cf = 0, CLOAD = 4.7 nF, RLOAD open – 4.05 – mV

Sensitivity [3] Sens

IP = 6.5 A, TA = 25°C – 151 – mV/A

IP = 6.5 A, TA = 25°C to 125°C – 151 – mV/A

IP = 6.5 A, TA = – 40°C to 25°C – 152 – mV/A

Electrical Offset Voltage

Variation Relative to

VOUT(QBI) [4]

VOE

IP = 0 A, TA = 25°C – ±10 – mV

IP = 0 A, TA = 25°C to 125°C – ±11 – mV

IP = 0 A, TA = – 40°C to 25°C – ±40 – mV

Total Output Error [5] ETOT

Over full scale of IPOA , IP applied for 5 ms, TA = 25°C to 125°C – ±1.6 – %

Over full scale of IPOA , IP applied for 5 ms, TA = – 40°C to 25°C – ±5.6 – %

X10BB CHARACTERISTICS

Optimized Accuracy Range [1] IPOA –10 – 10 A

Linear Sensing Range IR–24 – 24 A

Noise [2] VNOISE(rms) TA = 25°C, Sens = 85 mV/A, Cf = 0, CLOAD = 4.7 nF, RLOAD open – 2.3 – mV

Sensitivity [3] Sens

IP = 10 A, TA = 25°C – 85 – mV/A

IP = 10 A, TA = 25°C to 125°C – 85 – mV/A

IP = 10 A, TA = – 40°C to 25°C – 85 – mV/A

Electrical Offset Voltage

Variation Relative to

VOUT(QBI) [4]

VOE

IP = 0 A, TA = 25°C – ±5 – mV

IP = 0 A, TA = 25°C to 125°C – ±12 – mV

IP = 0 A, TA = – 40°C to 25°C – ±22 – mV

Total Output Error [5] ETOT

Over full scale of IPOA , IP applied for 5 ms, TA = 25°C to 125°C – ±1.8 – %

Over full scale of IPOA , IP applied for 5 ms, TA = – 40°C to 25°C – ±5 – %

Continued on the next page…

X12CB CHARACTERISTICS

Optimized Accuracy Range [1] IPOA –12.5 – 12.5 A

Linear Sensing Range IR–37.5 – 37.5 A

Noise [2] VNOISE(rms) TA = 25°C, Sens = 56 mV/A, Cf = 0, CLOAD = 4.7 nF, RLOAD open – 1.50 – mV

Sensitivity [3] Sens

IP = 12.5 A, TA = 25°C – 56 – mV/A

IP = 12.5 A, TA = 25°C to 125°C – 56 – mV/A

IP = 12.5 A, TA = – 40°C to 25°C – 57 – mV/A

Electrical Offset Voltage

Variation Relative to

VOUT(QBI) [4]

VOE

IP = 0 A, TA = 25°C – ±4 – mV

IP = 0 A, TA = 25°C to 125°C – ±14 – mV

IP = 0 A, TA = – 40°C to 25°C – ±23 – mV

Total Output Error [5] ETOT

Over full scale of IPOA , IP applied for 5 ms, TA = 25°C to 125°C – ±2.2 – %

Over full scale of IPOA , IP applied for 5 ms, TA = – 40°C to 25°C – ±3.9 – %

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Characteristic Symbol Test Conditions Min. Typ. Max. Units

X25CB CHARACTERISTICS

Optimized Accuracy Range [1] IPOA –25 – 25 A

Linear Sensing Range IR–75 – 75 A

Noise [2] VNOISE(rms) TA = 25°C, Sens = 28 mV/A, Cf = 0, CLOAD = 4.7 nF, RLOAD open – 1 – mV

Sensitivity [3] Sens

IP = 25 A, TA = 25°C – 28 – mV/A

IP = 25 A, TA = 25°C to 125°C – 27.9 – mV/A

IP = 25 A, TA = – 40°C to 25°C – 28.5 – mV/A

Electrical Offset Voltage

Variation Relative to

VOUT(QBI) [4]

VOE

IP = 0 A, TA = 25°C – ±3 – mV

IP = 0 A, TA = 25°C to 125°C – ±12 – mV

IP = 0 A, TA = – 40°C to 25°C – ±18 – mV

Total Output Error [5] ETOT

Over full scale of IP OA, IP applied for 5 ms, TA = 25°C to 125°C – ±2.9 – %

Over full scale of IP OA, IP applied for 5 ms, TA = – 40°C to 25°C – ±5.2 – %

[1] Although the device is accurate over the entire linear range, the device is programmed for maximum accuracy over the range defined by IPOA

. The

reason for this is that in many applications, such as motor control, the start-up current of the motor is approximately three times higher than the

running current.

[2] Vpk-pk noise (6 sigma noise) is equal to 6 × VNOISE(rms). Lower noise levels than this can be achieved by using Cf for applications requiring narrower

bandwidth. See Characteristic Performance page for graphs of noise versus Cf and bandwidth versus Cf.

[3] This parameter can drift by as much as 2.4% over the lifetime of this product.

[4] This parameter can drift by as much as 13 mV over the lifetime of this product.

[5] This parameter can drift by as much as 2.5% over the lifetime of this product.

PERFORMANCE CHARACTERISTICS (continued): TA Range K, valid at TA = – 40°C to 125°C, VCC = 5 V, unless otherwise specified

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

ACS710 Bandwidth versus External Capacitor Value, CF

Capacitor connected between FILTER pin and GND

1000

100

0.1

0.01 0.1 1 10 100 1000

Bandwidth (kHz)

Capacitance (nF)

CHARACTERISTIC PERFORMANCE

ACS710x-25C

= 5 V

ACS710x-25C

= 3.3 V

ACS710x-12C

= 5 V

ACS710x-12C

= 3.3 V

Capacitance (nF)

RMS Noise (µV)

400

500

600

700

800

900

1000

0 10 20 30 40 50

300

400

500

600

700

800

900

0 10 20 30 40 50

200

400

600

800

1000

1200

1400

1600

0 10 20 30 40 50

200

400

600

800

1000

1200

1400

1600

0 10 20 30 40 50

ACS710 Noise versus External Capacitor Value, CF

Capacitor connected between FILTER pin and GND

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

CHARACTERISTIC PERFORMANCE DATA

Data taken using the ACS710-6BB

Accuracy Data

Mean

Typical Maximum Limit Typical Minimum Limit

0.4

0.3

0.2

0.1

-0.1

-0.2

-0.3

-0.4

160.0

157.5

155.0

152.5

150.0

147.5

145.0

142.5

140.0

101.00

100.75

100.50

100.25

100.00

99.75

99.50

99.25

99.00

6.0

4.5

3.0

1.5

-1.5

-3.0

-4.5

-6.0

VOE (mV)ELIN (%)

Sens (mV/A)

ESYM (%)

ETOT (%)

(°C)T

(°C)

(°C)T

(°C)

–50 100 125 150500-25 25 75

-10

-20

-30

-40

-50

Electrical Offset Voltage versus Ambient Temperature

Nonlinearity versus Ambient Temperature

Sensitivity versus Ambient Temperature

Total Output Error versus Ambient Temperature

Symmetry versus Ambient Temperature

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

CHARACTERISTIC PERFORMANCE DATA

Data taken using the ACS710-10BB

Accuracy Data

Mean

Typical Maximum Limit Typical Minimum Limit

0.30

0.20

0.10

-0.10

-0.20

-0.30

-0.40

-0.50

88.00

87.00

86.00

85.00

84.00

83.00

82.00

81.00

100.30

100.20

100.10

100.00

99.90

99.80

99.70

99.60

99.50

99.40

VOE (mV)ELIN (%)

Sens (mV/A)

ESYM (%)

(°C)T

(°C)

(°C)T

(°C)

–50 100 125 150500-25 25 75

4.00

3.00

2.00

1.00

-1.00

-2.00

-3.00

-4.00

-5.00

ETOT (%)

(°C)

–50 100 125 150500-25 25 75

-10

-20

-30

Electrical Offset Voltage versus Ambient Temperature

Nonlinearity versus Ambient Temperature

Sensitivity versus Ambient Temperature

Symmetry versus Ambient Temperature

Total Output Error versus Ambient Temperature

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

CHARACTERISTIC PERFORMANCE DATA

Data taken using the ACS710-12CB

Accuracy Data

Mean

Typical Maximum Limit Typical Minimum Limit

-5

-10

-15

-20

-25

0.10

0.05

-0.05

-0.10

-0.15

-0.20

-0.25

-0.30

-0.35

-0.40

-0.45

58.5

58.0

57.5

57.0

56.5

56.0

55.5

55.0

100.1

100.0

99.9

99.8

99.7

99.6

99.5

-1

-2

-3

VOE (mV)ELIN (%)

Sens (mV/A)ESYM (%)

ETOT (%)

(°C)T

(°C)

(°C)T

(°C)

–50 100 125 150500-25 25 75

Electrical Offset Voltage versus Ambient Temperature

Nonlinearity versus Ambient Temperature

Sensitivity versus Ambient Temperature

Total Output Error versus Ambient Temperature

Symmetry versus Ambient Temperature

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

CHARACTERISTIC PERFORMANCE DATA

Data taken using the ACS710-25CB

Accuracy Data

Mean

Typical Maximum Limit Typical Minimum Limit

-5

-10

-15

-20

-25

0.10

0.05

-0.05

-0.10

-0.15

-0.20

-0.25

-0.30

-0.35

29.6

29.4

29.2

29.0

28.8

28.6

28.4

28.2

28.0

27.8

27.6

100.1

100.0

99.9

99.8

99.7

99.6

99.5

-1

-2

-3

VOE (mV)ELIN (%)

Sens (mV/A)ESYM (%)

ETOT (%)

(°C)T

(°C)

(°C)T

(°C)

–50 100 125 150500-25 25 75

Electrical Offset Voltage versus Ambient Temperature

Nonlinearity versus Ambient Temperature

Sensitivity versus Ambient Temperature

Total Output Error versus Ambient Temperature

Symmetry versus Ambient Temperature

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Setting 12CB and 25CB Versions

The VOC needed for setting the overcurrent fault switch point can

be calculated as follows:

VOC = Sens × | IOC | ,

where VOC is in mV, Sens in mV/A, and IOC (overcurrent fault

switch point) in A.

SETTING OVERCURRENT FAULT SWITCH POINT

IOC

VOC

4 VCC

–

0.25 VCC / Sens

–

0.4 VCC / Sens

0.25 VCC / Sens

0.4 VCC / Sens Not Valid Range

Valid Range

VCC

IOC versus VOC

(12CB and 25CB Versions)

Example: For ACS710KLATR-25CB-T, if required overcurrent fault switch point is 50 A, and VCC = 5 V, then the

required VOC can be calculated as follows:

VOC = Sens × IOC = 28 × 50 = 1400 (mV)

| Ioc | is the overcurrent fault switch point for a bidirectional (AC)

current, which means a bidirectional sensor will have two sym-

metrical overcurrent fault switch points, +IOC and –IOC

See the following graph for IOC and VOC ranges.

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Setting 6BB and 10BB Versions

The VOC needed for setting the overcurrent fault switch point can

be calculated as follows:

VOC = 1.17 × Sens × | IOC | ,

where VOC is in mV, Sens in mV/A, and IOC (overcurrent fault

switch point) in A.

IOC

VOC

0.4 VCC

–

0.25 VCC /

(1.17 × Sens)

–

0.4 VCC /

(1.17 × Sens)

0.25 VCC /

(1.17 × Sens)

0.4 VCC /

(1.17 × Sens)

Not Valid Range

Valid Range

0.25 VCC

IOC versus VOC

(6BB and 10BB Versions)

Example: For ACS710KLATR-6BB-T, if required overcurrent fault switch point is 10 A, and VCC = 5 V, then the

required VOC can be calculated as follows:

VOC = 1.17 × Sens × IOC = 1.17 × 151 × 10 = 1767 (mV)

| Ioc | is the overcurrent fault switch point for a bidirectional (AC)

current, which means a bidirectional sensor will have two sym-

metrical overcurrent fault switch points, +IOC and –IOC

See the following graph for IOC and VOC ranges.

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Overcurrent Fault Operation

The primary concern with high-speed fault detection is that noise

may cause false tripping. Various applications have or need to

be able to ignore certain faults that are due to switching noise or

other parasitic phenomena, which are application dependant. The

problem with simply trying to filter out this noise in the main

signal path is that in high-speed applications, with asymmetric

noise, the act of filtering introduces an error into the measure-

ment. To get around this issue, and allow the user to prevent the

fault signal from being latched by noise, a circuit was designed to

slew the ¯

pin voltage based on the value of the capacitor

from that pin to ground. Once the voltage on the pin falls below

2 V, as established by an internal reference, the fault output is

latched and pulled to ground quickly with an internal N-channel

MOSFET.

Fault Walkthrough

The following walkthrough references various sections and

attributes in the figure below. This figure shows different

fault set/reset scenarios and how they relate to the voltages on

the ¯

pin, FAULT_EN pin, and the internal Overcurrent

(OC) Fault node, which is invisible to the customer.

1. Because the device is enabled (FAULT_EN is high for a

minimum period of time, the Fault Enable Delay, tFED

, 15 µs

typical) and there is an OC fault condition, the device ¯

pin starts discharging.

2. When the ¯

pin voltage reaches approximately 2 V, the

fault is latched, and an internal NMOS device pulls the ¯

pin voltage to approximately 0 V. The rate at which the ¯

pin slews downward (see [4] in the figure) is dependent on the

external capacitor, COC, on the ¯

pin.

3. When the FAULT_EN pin is brought low, the ¯

pin starts resetting if no OC fault condition exists, and if

FAULT_EN is low for a time period greater than tOCH

. The

internal NMOS pull-down turns off and an internal PMOS pull-

up turns on (see [7] if the OC fault condition still exists).

4. The slope, and thus the delay to latch the fault is controlled by

the capacitor, COC, placed on the ¯

pin to ground. Dur-

ing this portion of the fault (when the ¯

pin is between

VCC and 2 V), there is a 3 mA constant current sink, which

discharges COC. The length of the fault delay, t, is equal to:

(

– 2 V )

3 mA

(1)

where VCC is the device power supply voltage in volts, t is in

seconds and COC is in Farads. This formula is valid for RPU

equal to or greater than 330 kΩ. For lower-value resistors,

the current flowing through the RPU resistor during a fault

event, IPU , will be larger. Therefore, the current discharging

the capacitor would be 3 mA – IPU and equation 1 may not be

valid.

5. The ¯

pin did not reach the 2 V latch point before the

OC fault condition cleared. Because of this, the fixed 3 mA

current sink turns off, and the internal PMOS pull-up turns on

to recharge COC through the ¯

pin.

6. This curve shows VCC charging external capacitor COC

through the internal PMOS pull-up. The slope is determined

by COC.

7. When the FAULT_EN pin is brought low, if the fault condition

still exists, the latched ¯

pin will be pulled low by the

internal 3mA current source. When fault condition is removed

then the Fault pin charges as shown in step 6.

8. At this point there is a fault condition, and the part is enabled

before the ¯

pin can charge to VCC. This shortens the

user-set delay, so the fault is latched earlier. The new delay

time can be calculated by equation 1, after substituting the

voltage seen on the ¯

pin for VCC.

FUNCTIONAL DESCRIPTION (Latching Versions)

VCC

2 V

0 V

Time

tFED

FAULT

(Output)

FAULT_EN

(Input)

OC Fault

Condition

(Active High)

1 1 1

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Overcurrent Fault Operation

The primary concern with high-speed fault detection is that noise

may cause false tripping. Various applications have or need to

be able to ignore certain faults that are due to switching noise or

other parasitic phenomena, which are application dependant. The

problem with simply trying to filter out this noise in the main sig-

nal path is that in high-speed applications, with asymmetric noise,

the act of filtering introduces an error into the measurement.

To get around this issue, and allow the user to prevent the fault

signal from going low due to noise, a circuit was designed to slew

the ¯

pin voltage based on the value of the capacitor from

that pin to ground. Once the voltage on the pin falls below 2 V, as

established by an internal reference, the fault output is pulled to

ground quickly with an internal N-channel MOSFET.

Fault Walkthrough

The following walkthrough references various sections and

attributes in the figure below. This figure shows different

fault set/reset scenarios and how they relate to the voltages on

the ¯

pin, FAULT_EN pin, and the internal Overcurrent

(OC) Fault node, which is invisible to the customer.

1. Because the device is enabled (FAULT_EN is high for a mini-

mum period of time, the Fault Enable Delay, tFED

, and there is

an OC fault condition, the device ¯

pin starts discharging.

2. When the ¯

pin voltage reaches approximately 2 V, an

internal NMOS device pulls the ¯

pin voltage to approx-

imately 0 V. The rate at which the ¯

pin slews downward

(see [4] in the figure) is dependent on the external capacitor,

COC, on the ¯

pin.

3. When the FAULT_EN pin is brought low, the ¯

starts resetting if FAULT_EN is low for a time period greater

than tOCH

. The internal NMOS pull-down turns off and an

internal PMOS pull-up turns on.

4. The slope, and thus the delay to pull the fault low is controlled

by the capacitor, COC, placed on the ¯

pin to ground.

During this portion of the fault (when the ¯

pin is

between VCC and 2 V), there is a 3 mA constant current sink,

which discharges COC. The length of the fault delay, t, is equal

to:

(

– 2 V )

3 mA

(2)

where VCC is the device power supply voltage in volts, t is in

seconds and COC is in Farads. This formula is valid for RPU

equal to or greater than 330 kΩ. For lower-value resistors,

the current flowing through the RPU resistor during a fault

event, IPU , will be larger. Therefore, the current discharging

the capacitor would be 3 mA – IPU and equation 1 may not be

valid.

5. The ¯

pin did not reach the 2 V latch point before the

OC fault condition cleared. Because of this, the fixed 3 mA

current sink turns off, and the internal PMOS pull-up turns on

to recharge COC through the ¯

pin.

6. This curve shows VCC charging external capacitor COC

through the internal PMOS pull-up. The slope is determined

by COC.

7. At this point there is a fault condition, and the part is enabled

before the ¯

pin can charge to VCC. This shortens the

user-set delay, so the fault gets pulled low earlier. The new

delay time can be calculated by equation 1, after substituting

the voltage seen on the ¯

pin for VCC.

FUNCTIONAL DESCRIPTION (Non-Latching Versions)

VCC

2 V

0 V

Time

tFED

FAULT

(Output)

FAULT_EN

(Input)

OC Fault

Condition

(Active High)

1 1 1

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Chopper stabilization is an innovative circuit technique that is

used to minimize the offset voltage of a Hall element and an

associated on-chip amplifier. This chopper stabilization technique

nearly eliminates Hall IC output drift induced by temperature or

package stress effects. This offset reduction technique is based on

a signal modulation-demodulation process. Modulation is used

to separate the undesired DC offset signal from the magnetically

induced signal in the frequency domain. Then, using a low-pass

filter, the modulated DC offset is suppressed while the magneti-

cally induced signal passes through the filter. As a result of this

chopper stabilization approach, the output voltage from the Hall

Amp

Regulator

Clock/Logic

Hall Element

Sample and

Hold

Low-Pass

Filter

Concept of Chopper Stabilization Technique

Chopper Stabilization Technique

IC is desensitized to the effects of temperature and mechanical

stress. This technique produces devices that have an extremely

stable electrical offset voltage, are immune to thermal stress, and

have precise recoverability after temperature cycling.

This technique is made possible through the use of a BiCMOS

process that allows the use of low-offset and low-noise amplifiers

in combination with high-density logic integration and sample-

and-hold circuits.

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Sensitivity (Sens). The change in sensor output in response to a

1 A change through the primary conductor. The sensitivity is the

product of the magnetic circuit sensitivity (G / A) and the linear

IC amplifier gain (mV/G). The linear IC amplifier gain is pro-

grammed at the factory to optimize the sensitivity (mV/A) for the

full-scale current of the device.

Noise (VNOISE). The product of the linear IC amplifier gain

(mV/G) and the noise floor for the Allegro Hall-effect linear

IC. The noise floor is derived from the thermal and shot noise

observed in Hall elements. Dividing the noise (mV) by the sensi-

tivity (mV/A) provides the smallest current that the device is able

to resolve.

Linearity (ELIN). The degree to which the voltage output from

the sensor varies in direct proportion to the primary current

through its full-scale amplitude. Nonlinearity in the output can be

attributed to the saturation of the flux concentrator approaching

the full-scale current. The following equation is used to derive the

linearity:

where VIOUT_full-scale amperes = the output voltage (V) when the

sensed current approximates full-scale ±IP .

Symmetry (ESYM). The degree to which the absolute voltage

output from the sensor varies in proportion to either a positive

or negative full-scale primary current. The following formula is

used to derive symmetry:

Quiescent output voltage (VIOUT(Q)). The output of the sensor

when the primary current is zero. For a unipolar supply voltage,

it nominally remains at 0.5 × VCC. For example, in the case of a

bidirectional output device, VCC = 5 V translates into VIOUT(Q) =

2.5 V. Variation in VIOUT(Q) can be attributed to the resolution of

the Allegro linear IC quiescent voltage trim and thermal drift.

Electrical offset voltage (VOE). The deviation of the device out-

put from its ideal quiescent voltage due to nonmagnetic causes.

To convert this voltage to amperes, divide by the device sensitiv-

ity, Sens.

Accuracy (ETOT). The accuracy represents the maximum devia-

tion of the actual output from its ideal value. This is also known

as the total ouput error. The accuracy is illustrated graphically in

the output voltage versus current chart at right. Note that error is

directly measured during final test at Allegro.

Accuracy is divided into four areas:

• 0 A at 25°C. Accuracy of sensing zero current flow at 25°C,

without the effects of temperature.

• 0 A over Δ temperature. Accuracy of sensing zero current

flow including temperature effects.

• Full-scale current at 25°C. Accuracy of sensing the full-scale

current at 25°C, without the effects of temperature.

• Full-scale current over Δ temperature. Accuracy of sensing full-

scale current flow including temperature effects.

Ratiometry. The ratiometric feature means that its 0 A output,

VIOUT(Q), (nominally equal to VCC/2) and sensitivity, Sens, are

proportional to its supply voltage, VCC

. The following formula is

used to derive the ratiometric change in 0 A output voltage,

ΔVIOUT(Q)RAT (%).

The ratiometric change in sensitivity, ΔSensRAT (%), is defined as:

DEFINITIONS OF ACCURACY CHARACTERISTICS

100 1–

[{

VIOUT_full-scale amperes – VIOUT(Q)

2 (VIOUT_1/2 full-scale amperes – VIOUT(Q) )

100

IOUT_+ full-scale amperes –

IOUT(Q)

VIOUT(Q) – VIOUT_–full-scale amperes



100

VIOUT(Q)VCC /VIOUT(Q)5V

/5 V



100

SensVCC /Sens5V

VCC /5 V



Output Voltage versus Sensed Current

Accuracy at 0 A and at Full-Scale Current

Increasing VIOUT

(V)

+IP (A)

Accuracy

25°C Only

Accuracy

25°C Only

Accuracy

25°C Only

Accuracy

0 A

v rO e ∆Temp erature

Average

VIOUT

–IP (A)

v rO e ∆Temp erature

Decreasing VIOUT

(V)

IP(min)

IP(max)

Full Scale

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

DEFINITIONS OF DYNAMIC RESPONSE CHARACTERISTICS

Propagation delay (tPROP). The time required for the sensor

output to reflect a change in the primary current signal. Propaga-

tion delay is attributed to inductive loading within the linear IC

package, as well as in the inductive loop formed by the primary

conductor geometry. Propagation delay can be considered as a

fixed-time offset and may be compensated.

Primary Current

Transducer Output

I (%)

Propagation Time, tPROP

Primary Current

Transducer Output

I (%)

Response Time, tRESPONSE

Primary Current

Transducer Output

I (%)

Rise Time, tr

Rise time (tr). The time interval between a) when the sensor

reaches 10% of its full-scale value, and b) when it reaches 90%

of its full-scale value. The rise time to a step response is used to

derive the bandwidth of the current sensor, in which ƒ(–3 dB) =

0.35 / tr. Both tr and tRESPONSE are detrimentally affected by eddy

current losses observed in the conductive IC ground plane.

Response time (tRESPONSE). The time interval between a) when

the primary current signal reaches 90% of its final value, and b)

when the sensor reaches 90% of its output corresponding to the

applied current.

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Package LA, 16-Pin SOICW

SEATING

PLANE

1.27 BSC

GAUGE PLANE

SEATING PLANE

ATerminal #1 mark area

Reference land pattern layout (reference IPC7351

SOIC127P600X175-8M); all pads a minimum of 0.20 mm from all

adjacent pads; adjust as necessary to meet application process

requirements and PCB layout tolerances

PCB Layout Reference View

Branding scale and appearance at supplier discretion

SEATING

PLANE

C0.10

16X

0.25 BSC

1.40 REF

2.65 MAX

For Reference Only; not for tooling use (reference MS-013AA)

Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

10.30 ±0.20

7.50 ±0.10 10.30 ±0.33

0.51

0.31 0.30

0.10

0.33

0.20

1.27

0.40

8°

0°

N = Device part number

T = Temperature range, package - amperage

L = Lot number

NNNNNNNNNNN

LLLLLLLLL

TTT-TTT

Standard Branding Reference View

16 0.65 1.27

9.50

2.25

Branded Face

120 kHz Bandwidth, High-Voltage Isolation

Current Sensor with Integrated Overcurrent Detection

ACS710

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

For the latest version of this document, visit our website:

www.allegromicro.com

The products described herein are protected by U.S. patents: 7,166,807; 7,425,821; 7,573,393; and 7,598,601.

REVISION HISTORY

Number Date Description

9 June 17, 2013 Add 10BB variant

10 August 19, 2015 Added certificate number under UL stamp on page 1; updated Isolation Characteristics table.

11 June 5, 2017 Updated product status

12 August 31, 2017 Added Dielectric Surge Strength Test Voltage to Isolation Characteristics table (p. 3), and Noise and

Noise Density characteristics to Common Operating Characteristics table (p. 6).

13 November 13, 2017 Corrected typo in Dielectric Surge Strength Test Voltage notes of Isolation Characteristics table (p. 3)

14 December 6, 2018 Updated UL certificate number and minor editorial updates

15 February 1, 2019 Updated product status to Pre-End-of-Life

16 January 30, 2020 Updated product status and minor editorial updates

Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit

improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the

information being relied upon is current.

Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of

Allegro’s product can reasonably be expected to cause bodily harm.

The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor

for any infringement of patents or other rights of third parties which may result from its use.

Copies of this document are considered uncontrolled documents.