1
File Number
3284.6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
DG401, DG403, DG405
Monolithic CMOS Analog Switches
The DG401, DG403 and DG405 monolithic CMOS analog
switches have TTL and CMOS compatible digital inputs.
These switches feature low analog ON resistance (<45Ω)
and fast switch time (tON < 150ns). Low charge injection
simplifies sample and hold applications.
The improvements in the DG401/403/405 series are made
possible by using a high voltage silicon-gate process. An
epitaxial la yer pre vents the latch-up associated with older
CMOS technologies. The 44V maximum voltage range
permits controlling 30VP-P signals. Power supplies may be
single-ended from +5V to +34V, or split from ±5V to ±17V.
The analog s witches are bilater al, equally matched for AC or
bidirectional signals. The ON resistance variation with analog
signals is quite low over a ±15V analog input range. The three
different devices provide the equivalent of two SPST (DG401),
two SPDT (DG403) or two DPST (DG405) relay switch
contacts with CMOS or TTL le vel activ ation. The pinout is
similar, permitting a standard lay out to be used, choosing the
s witch function as needed.
Pinouts
DG401 (PDIP, SOIC)
TOP VIEW
DG403, DG405 (SOIC)
TOP VIEW
NOTE: (NC) No Connection.
Features
• ON Resistance (Max). . . . . . . . . . . . . . . . . . . . . . . . . 45Ω
• Low P o w er Consumption (PD) . . . . . . . . . . . . . . . . . . <35µW
• Fast Switching Action
-t
ON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150ns
-t
OFF (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100ns
• Low Charge Injection
• DG401 Dual SPST; Same Pinout as HI-5041
• DG403 Dual SPDT; DG190, IH5043, IH5151, HI-5051
• DG405 Dual DPST; DG184, HI-5045, IH5145
• TTL, CMOS Compatible
• Single or Split Supply Operation
Applications
• Audio Switching
• Battery Operated Systems
• Data Acquisition
• Hi-Rel Systems
• Sample and Hold Circuits
• Communication Systems
• Automatic Test Equipment
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
D1
NC
NC
NC
NC
NC
D2
NC
S1
V-
GND
VL
V+
IN2
S2
IN1
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
D1
NC
D3
S3
S4
D4
D2
NC
S1
V-
GND
VL
V+
IN2
S2
IN1
Ordering Information
PART NUMBER TEMP. RANGE
(oC) PACKAGE PKG. NO.
DG401DJ -40 to 85 16 Ld PDIP E16.3
DG401DY -40 to 85 16 Ld SOIC M16.15
DG403DJ -40 to 85 16 Ld PDIP E16.3
DG403DY -40 to 85 16 Ld SOIC M16.15
DG405DY -40 to 85 16 Ld SOIC M16.15
TRUTH TABLE
LOGIC
DG401 DG403 DG405
SWITCH SWITCH 1, 2 SWITCH 3, 4 SWITCH
0 OFF OFF ON OFF
1 ON ON OFF ON
NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V.
Data Sheet June 1999
2
Schematic Diagram
Functional Diagrams
DG401 DG403 DG405
SWITCHES SHOWN FOR LOGIC “1” INPUT
15
10
9
16
8
1
S1
IN1
IN2
S2
D1
D2
VLV+
GND V-
12 11
13 14
15
10
9
4
16
5
8
3
1
6
S1
S3
IN1
IN2
S2
S4
D1
D3
D2
D4
VLV+
GND V-
12 11
13 14
15
10
9
4
16
5
8
3
1
6
S1
S3
IN1
IN2
S2
S4
D1
D3
D2
D4
VLV+
GND V-
12 11
13 14
V-
V+
V+
VL
VIN
GND
V-
DRAIN
SOURCE
DG401, DG403, DG405
3
Absolute Maximum Ratings Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44.0V
GND to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
VL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND - 0.3V) to (V+) +0.3V
Digital Inputs VS, VD (Note 1) . . . . . (V-) -2V to (V+) + 2V or 30mA,
Whichever Occurs First
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle, Max). . 100mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V (Max)
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V (Max)
Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (Min)
Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤20ns
Thermal Resistance (Typical, Note 2) θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Maximum Junction Temperature (Plastic Package). . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Test Conditions: V+ = +15V, V- = -15V, VIN = 2.4V, 0.8V (Note 3), VL= 5V,
Unless Otherwise Specified
PARAMETER TEST CONDITIONS TEMP
(oC) (NO TE 4)
MIN (NOTE5)
TYP (NOTE4)
MAX UNITS
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON RL = 300Ω, CL = 35pF 25 - 100 150 ns
Turn-OFF Time, tOFF 25 - 60 100 ns
Break-Before-Make Time Delay (DG403), tDRL = 300Ω, CL = 35pF 25 5 12 - ns
Charge Injection, Q (Figure 3) CL = 10nF, VG = 0V, RG = 0Ω25 - 60 - pC
OFF Isolation (Figure 4) RL = 100Ω, CL = 5pF, f = 1MHz 25 - 72 - dB
Crosstalk (Channel-to-Channel) (Figure 6) 25 - -90 - dB
Source OFF Capacitance, CS(OFF) f = 1MHz, VS = VD = 0V (Figure 7) 25 - 12 - pF
Drain OFF Capacitance, CD(OFF) 25 - 12 - pF
Channel ON Capacitance, CD(ON) + CS(ON) 25 - 39 - pF
DIGITAL INPUT CHARACTERISTICS
Input Current with VIN Low, IIL VIN Under Test = 0.8V, All Others = 2.4V Full -1 0.005 1 µA
Input Current with VIN High, IIH VIN Under Test = 2.4V, All Others = 0.8V Full -1 0.005 1 µA
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG Full -15 - 15 V
Drain-Source ON Resistance, rDS(ON) V+ = 13.5V, V- = -13.5V,
IS = 10mA, VD = ±10V 25 - 20 45 Ω
Full - - 55 Ω
rDS(ON) Matching Between Channels, ∆rDS(ON) V+ = 16.5V, V- = -16.5V,
IS = -10mA, VD = 5, 0, -5V 25 - 3 3 Ω
Full - - 5 Ω
Source OFF Leakage Current, IS(OFF) V+ = 16.5V, V- = -16.5
VD = ±15.5V, VS = 15.5V 25 -0.5 -0.01 0.5 nA
Full -5 - 5 nA
Drain OFF Leakage Current, ID(OFF) 25 -0.5 -0.01 0.5 nA
Full -5 - 5 nA
Channel ON Leakage Current, ID(ON) +I
S(ON) V± = ±16.5V, VD = VS = ±15.5V 25 -1 -0.04 1 nA
Full -10 - 10 nA
DG401, DG403, DG405
4
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+ V+ = 16.5V, V- = -16.5V,
VIN = 0V or 5V 25 - 0.01 1 µA
Full - - 5 µA
Negative Supply Current, I- 25 -1 -0.01 - µA
Full -5 - - µA
Logic Supply Current, IL25 - 0.01 1 µA
Full - - 5 µA
Ground Current, IGND 25 -1 -0.01 - µA
Full -5 - - µA
NOTES:
3. VIN = input voltage to perform proper function.
4. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
5. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Electrical Specifications Test Conditions: V+ = +15V, V- = -15V, VIN = 2.4V, 0.8V (Note 3), VL= 5V,
Unless Otherwise Specified (Continued)
PARAMETER TEST CONDITIONS TEMP
(oC) (NO TE 4)
MIN (NOTE5)
TYP (NOTE4)
MAX UNITS
Test Circuits and Waveforms
NOTES:
6. Logic input waveform is inverted for switches that have the
opposite logic sense.
7. VS = 10V for tON, VS = -10V for tOFF.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for IN2 and S2.
For load conditions, see Specifications. CLincludes fixture and stray
capacitance.
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
FIGURE 2A. MEASUREMENT POINTS
CL includes fixture and stray capacitance.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. BREAK-BEFORE-MAKE TIME
50%
tr < 20ns
tf < 20ns
tOFF
90%
3V
0V
VS
0V
tON
VO
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
90%
-VS
SWITCH
INPUT 10%
(NOTE 7)
VOVSRL
RLrDS ON()
+
------------------------------------
=
SWITCH
INPUT
LOGIC
INPUT
S1
IN1
V+
D1
RLCL
VO
GND V-
VL
0V -15V
5V +15V RL = 300Ω
CL = 35pF
90%
3V
0V
tD
0V
LOGIC
INPUT
SWITCH
OUTPUT
SWITCH
OUTPUT
VS1
VS2
90%
tD
0V
(VO1)
(VO2)
LOGIC
INPUT
VS1 = 10V
IN1
V+
D1
RL1 CL1
VO1
GND V-
VL
0V -15V
5V +15V RL = 300Ω
CL = 35pF
D2
RL2 CL2
VO2
VS2 = 10V
DG401, DG403, DG405
5
FIGURE 3A. MEASUREMENT POINTS FIGURE 3B. TEST CIRCUIT
FIGURE 3. CHARGE INJECTION
FIGURE 4. OFF ISOLATION TEST CIRCUIT FIGURE 5. INSERTION LOSS TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT FIGURE 7. CAPACITANCES TEST CIRCUIT
Test Circuits and Waveforms
(Continued)
VO
∆VO
INXON OFF ON
Q = ∆VO x CL
SWITCH
OUTPUT
V+
D1
CL
VO
V-
RG
VG
VL
0V -15V
5V +15V
GND
ANALYZER
RL
+15V
SIGNAL
GENERATOR
V+
C
V-
-15V
C
0V, 2.4V
VS
VD
INX
GND
+5V VLC
ANALYZER
RL
+15V
SIGNAL
GENERATOR
V+
C
V-
-15V
C
0V, 2.4V
VS
VD
INX
GND
+5V VLC
0V, 2.4V
ANALYZER
+15V
V+
C
VS1
SIGNAL
GENERATOR
RLGND
IN1
VD1
IN2
50Ω
0V, 2.4V
NC
V-
-15V
C
VD2
+5V VLC
VS2
+15V
V+
C
GND
VS
VD
INX
V-
-15V
C
IMPEDANCE
ANALYZER
0V, 2.4V
+5V VLC
AS REQUIRED
DG401, DG403, DG405
6
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Application Information
Dual Slope Integrators
The DG403 is well suited to configure a selectable slope
integrator. One control signal selects the timing capacitor C1
or C2. Another one selects eIN or discharges the capacitor in
preparation for the next integration cycle.
Peak Detector
A3 acting as a comparator provides the logic drive for
operating SW1. The output of A2 is fed back to A3 and
compared to the analog input eIN. If eIN > eOUT the output
of A3 is high keeping SW1 closed. This allows C1 to charge
up to the analog input voltage. When eIN goes below eOUT,
A3goes negative, turning SW1off. The system will therefore
store the most positive analog input experienced.
V-
GND
-15V
IN2
IN1
S3
S1
S2
S4
D1
D2
D3
D4
+15V+5V
VLV+
DG403
C1
C2
eOUT
eIN
INTEGRATE/
SCOPE
TTL RESET
SELECT
FIGURE 8. DUAL SLOPE INTEGRATOR
eOUT
eIN C1
R1
SW2
SW1
RESET
+
-
+
-
+
-
DG401
A1
A3
FIGURE 9. POSITIVE PEAK DETECTOR
A2
Typical Performance Curves
FIGURE 10. INPUT SWITCHING THRESHOLD vs LOGIC
SUPPLY VOLTAGE FIGURE 11. INPUT SWITCHING THRESHOLD vs
POWER SUPPLY VOLTAGE
VT (V)
VL (V)
10
8
6
4
2
00 2 4 6 8101214161820
V+ = 15V
V- = -15V
TA = 20oC
DG403
SW3, 4
VT (V)
SUPPLY VOLTAGE (±V)
4
3
2
1
002 4 6 8101214161820
VL = 5V
TA = 25oC
DG401, DG403, DG405
7
FIGURE 12. rDS(ON) vs VD AND TEMPERATURE FIGURE 13. rDS(ON) vs VD AND POWER SUPPLY VOLTAGE
FIGURE 14. rDS(ON) vs VD AND SINGLE SUPPLY VOLTAGE FIGURE 15. CHARGE INJECTION vs SOURCE VOLTAGE
FIGURE 16. INSERTION LOSS vs FREQUENCY FIGURE 17. IS(OFF) vs TEMPERATURE
Typical Performance Curves
(Continued)
0oC
rDS(ON) (Ω)
VD (V)
40
35
30
25
20
15
10-15 -10 -5 0 5 10 15
V+ = 15V
V- = -15V
VL = 5V
25oC
125oC
85oC
-40oC-55oC
rDS(ON) (Ω)
VD (V)
-15-25 -5 5 2515
60
50
40
30
20
10
TA = 25oC
V+ = 6V, V- = -6V
V+ = 10V, V- = -10V
V+ = 22V, V- = -22V
V+ = 12V, V - = -12V
V+ = 15V, V - = -15V
V+ = 20V, V - = -20V
rDS(ON) (Ω)
VD (V)
5010152520
60
50
40
30
20
10
70
V+ = 7.5V
V+ = 10V
V+ = 15V
TA = 25oC
V+ = 20V
V+ = 22V
V+ = 12V
V- = 0V
Q (pC)
VS (V)
200
180
160
140
120
100
80
60
40
20
0-15 -10 -5 5 10 15
V+ = 15V
V- = -15V
VL = 5V
CL = 1nF
0
CL = 10nF
CL = 100pF
FREQUENCY (Hz)
LOSS (dB)
0.0
-0.5
-1.0
-1.5
-2.0
10K 100K 1M 10M
RL = 600Ω
RL = 75Ω
RL = 50Ω
V+ = 15V, V- = -15V
VL = 5V, VS = 1VRMS
SEE INSERTION LOSS TEST SETUP
(FIGURE 5)
TEMPERATURE (oC)
-55 -35 -15 5 25 45 65
IS(OFF) (nA)
85 105 125
100.0
10.0
1.0
0.1
0.01
0.001
0.0001
V+ = 15V
V- = -15V
VL = 5V
VD = ±14V
TYPICAL
DG401, DG403, DG405
8
FIGURE 18. ID(OFF) vs TEMPERATURE FIGURE 19. ID(ON) + IS(ON) vs TEMPERATURE
FIGURE 20. LEAKAGE CURRENTS vs ANALOG VOLTAGE FIGURE 21. SUPPLY CURRENT vs TEMPERATURE
FIGURE 22. BREAK-BEFORE-MAKE vs ANALOG VOLTAGE FIGURE 23. BREAK-BEFORE-MAKE vs POWER
SUPPLY VOLTAGE
Typical Performance Curves
(Continued)
TEMPERATURE (oC)
-55 -35 -15 5 25 45 65
ID(OFF) (nA)
85 105 125
100.0
10.0
1.0
0.1
0.01
0.001
0.0001
V+ = 15V
V- = -15V
VL = 5V
VD = ±14V
TYPICAL
TEMPERATURE (oC)
-55 -35 -15 5 25 45 65
ID(ON) + IS(ON) (nA)
85 105 125
100.0
10.0
1.0
0.1
0.01
0.001
0.0001
V+ = 15V
V- = -15V
VL = 5V
VD = ±14V
TYPICAL
90
60
30
0
-30
-90
-150 -15 -10 -5 0 5 10 15
VS, VD (V)
IS, ID (pA)
-20 20
-120
-60
V+ = 15V, V- = -15V
VL = 5V, TA = 25oC
ID(OFF), VS = 0V
IS(OFF), VD = 0V
ID(ON) + IS(ON)
ID(OFF), IS(OFF)
WHEN VANALOG EXCEEDS POWER
SUPPLY, SWITCH SUBSTRATE
DIODES BEGIN TO CONDUCT IL
I+, I -, IL, (µA)
TEMPERATURE (oC)
-55 -35 -15 5 25 45 65 85 105 125
10.0
1.0
0.1
0.01
0.001
0.0001
V+ = 15V
V- = -15V
VL = 5V
I-
I+
IL
I-
BREAK-BEFORE-MAKE TIME (ns)
-15
-10
-5
0
5
10
15
-20
20
VS (V)
05040302010
NOT MEASURABLE DUE TO
CAPACITIVE FEEDTHROUGH
SEE BBM TEST SETUP
V+ = 15V
V- = -15V
VL = 5V
(FIGURE 2)
SUPPLY VOLTAGE (±V)
5
10
15
20
25
30
35
0
40
0252015105
tON, tOFF (ns)
SEE BBM TEST SETUP
VS = 10V
VS = -10V
VL = 5V
(FIGURE 2)
DG401, DG403, DG405
9
FIGURE 24. SWITCHING TIME vs INPUT LOGIC VOLTAGE
(NOTE 8) FIGURE 25. SWITCHING TIME vs TEMPERATURE (NOTE 8)
FIGURE 26. SWITCHING TIME vs POWER SUPPLY VOLTAGE
(NOTE 8) FIGURE27. SWITCHINGTIMEvs POSITIVESUPPLYVOLTAGE
(NOTE 8)
FIGURE 28. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE (NOTE 8)
NOTE:
8. Refer to Figure 1 for test conditions.
Typical Performance Curves
(Continued)
VIN (V)
60
120
180
240
300
360
420
0
480
054321
tON, tOFF (ns)
6
540
600
VL = 5V
V+ = 15V
V- = -15V
tON, VS = 10V
tOFF, VS = -10V
tOFF, VS = 10V
tON, VS = -10V
TEMPERATURE (oC)
-55 -35 -15 5 25 45 65 85 105 125
180
150
120
90
60
30
0
tON, tOFF (ns)
210
240
VL = 5V
V+ = 15V
V- = -15V
tON, VS = 10V
tON, VS = -10V tOFF, VS = -10V
tOFF, VS = 10V
SUPPLY VOLTAGE (±V)
0252015105
120
100
80
60
40
20
0
tON, tOFF (ns)
140
160
180
200 VL = 5V
VS = -5V
VS = -5V
tON
tOFF
tOFF
VS = 5V
tON
VS = 5V
180
150
120
90
60
30
0
tON, tOFF (ns)
210
240
POSITIVE SUPPLY (V)
0252015105
270
300
V- = -15
V- = 0V
V- = -5V
V- = -15V
V- = -5V V- = 0V
VS = 5V
tON
tON
tON
tOFF
V- = 0V
V+ = -15V
180
150
120
90
60
30
0
tON, tOFF (ns)
210
240
POSITIVE SUPPLY (V)
0252015105
270
300 VS = -5V
tON
tON
tOFF
V- = -15V
V- = -5V
V- = -15V
V- = -5V
tOFF
DG401, DG403, DG405