Ordering number : ENA0989 Bi-CMOS IC LV4920H Class-D Audio Power Amplifier Power Cell BTL 15Wx2CH, 10Wx2CH Overview The LV4920H is a 2-channel BTL full-bridge driver for digital power amplifiers. It requires a PWM modulator IC in the previous stage. This IC is a power cell that takes in PWM signals as an input and is used to form a digital amplifier system for TVs, amusement equipment, and other such systems. Application * TV sets (PDP/LCD) * Amusement equipment (pinball or pinball-slot-machines) * Home audio equipment (mini-/micro-audio systems) * Home theater equipment Features * BTL output, class D amplifier system * High-efficiency class D amplifier * Muting function reduces impulse noise at power on/off * Full complement of built-in protection circuits: overcurrent protection, thermal protection, and low power supply voltage protection circuits * Built-in bootstrap diodes Specification * Output 1=10W/ch, THD+N=10%, 8 Load, 1kHz, AES17, VD=13V * Output 2=15W/ch, THD+N=10%, 8 Load, 1kHz, AES17, VD=16V * High efficiency 85% or larger (Condition: 8 Load) * THD+N<0.1% 1W/1kHz/8 Load (Filter: AES17) * Package: HSOP36 Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. D0507 TI IM 20071022-S00006 No.A0989-1/12 LV4920H Specifications Maximum Ratings at Ta = 25C Parameter Symbol Ratings Conditions min Maximum supply voltage VD max Externally applied voltage Maximum output current IO peak Per channel Maximum pull-up pin voltage Vpup max typ Nch open drain terminal 16 pin, 17 pin applied voltage Allowable power dissipation Pd max Maximum junction temperature Tj max Unit max Mounted on a specified board* 24 V 6 A/ch 20 V 3.95 W +150 C C Operating temperature Topr -25 +75 Storage temperature Tstg -50 +150 Package thermal resistance jc 2.5 C C/W * Mounted on a specified board: 80.0mmx63.0mmx1.5mm, glass epoxy (two-layer). Recommended Operating Condtions at Ta = 25C Parameter Symbol Ratings Conditions min Recommended supply voltage Recommended pull-up supply voltage Recommended load resistance VD Vpup RL Externally applied voltage typ 8 Nch open drain supply voltage Speaker load Unit max 13 20 V 16 18 V 4 8 Electrical Characteristics at Ta = 25C, VD = 13V, LC less filter and no load Parameter Symbol Ratings Conditions min Quiescent current ICCO MUTEB=L Standby current Ist STBYB=L H input voltage VIH PWM_A, PWM_B typ 1.0 Unit max 3.0 mA 1 A 2.5 5.5 V 0 1.0 V 20 A MUTEB, STBYB L input voltage VIL PWM_A, PWM_B STBYB, MUTEB H input current IIH VIN=5.0V L input current IIL VIN=0V Output pin leakage current IOFF A -10 Nch open drain output 1 A OFF-stage 5.0V pull-up Output pin current IOL Nch open drain output 0.15 mA ON-stage, VOL=0.4V Power Tr ON resistance *2 RdsON ID=1A 300 m Turn ON delay time td ON fin=384kHz 40 70 ns Turn OFF delay time td OFF fin=384kHz 40 70 ns Rise-up time tr fin=384kHz 20 40 ns Fall time tf fin=384kHz 20 40 Minimum output pulse range VOPW 100 ns ns *2: Design guaranteed maximum ON resistance of power Tr (RdsON): 360m. No.A0989-2/12 LV4920H Electrical Characteristics / Operating Conditions (Reference values) Ta = 25C, VD = 13V, RL = 8, filter: 20kHz AES17 Given below are reference characteristic values of a digital amplifier system shown in the recommended application circuit (on page 10) in which the SANYO reference model of PWM modulator (BD-mode) is used. Parameter Symbol Ratings Conditions min typ Unit max Output 1 Po1 THD+N=10% 10 W Output 2 Po2 VD=16V, THD+N=10% 15 W Po=1W 0.1 % Total harmonic distortion THD+N@1W Output Noise Vno 50 Vrms SN-ration S/N 100 dB Dynamic range DNR 100 dB Note: The values of these characteristics were measured in SANYO test environment. The actual values in an end system will vary depending on the printed circuit board pattern, the external components actually used, and other factors. Package Dimensions unit : mm (typ) 3235A 0.65 17.8 (6.2) 2.7 1 0.25 0.8 2.0 0.3 0.1 2.45max (2.25) (0.5) 10.5 7.9 (4.9) 36 SANYO : HSOP36(375mil) Test Circuit and Block Diagram PWM BD-mode MCLK PWM_A1 BCLK PWM_B1 Audio data I2S PWM Modulator LV4920H LRCLK PWM_B2 SDATA PWM_A2 No.A0989-3/12 LV4920H Block Diagram LV4920H STBY 1 36 PVD1 NC1 2 35 PVD1 MUTE 33 OUTPUTSTAGE CH1+ PWM_RECEIVER NC2 4 CONTROL DELAY 4 PWM_A1 5 33 BOOT_CH1_P 32 VDDA1 NC3 6 4 31 BOOT_CH1_N OUTPUTSTAGE CH1- PWM_RECEIVER 4 PWM_B1 7 NC4 8 4 30 OUT_CH1_N 29 PGND1 4 VREG5 9 THERMAL POWER SUPPLY 28 PGND1 SEQUENCE OVER CURRENT 4 GND 10 4 NC5 11 27 PGND2 26 PGND2 4 PWM_B2 12 25 OUT_CH2_N OUTPUTSTAGE CH2- PWM_RECEIVER 4 NC6 13 CONTROL DELAY 4 PWM_A2 14 24 BOOT_CH2_N 23 VDDA2 22 BOOT_CH2_P 4 NC7 15 PWM_RECEIVER 4 NOD_THERM 16 34 OUT_CH1_P OUTPUTSTAGE CH2+ 21 OUT_CH2_P 4 NOD_OUTSHDN 17 20 PVD2 4 NC8 18 19 PVD2 No.A0989-4/12 LV4920H Pin Functions Pin No Pin name I/O Pin explanation 1 STBY I Standby mode control 2 NC1 - Non connection 3 MUTE I Muting control Internal equivalent circuit VD 3 VDDA 10k GND NC2 - Non connection 5 PWM_A1 I PWM input (plus input) of OUT_CH1_P 6 NC3 - Non connection 7 PWM_B1 I PWM input (negative input) of 500k 4 500k OUT_CH1_N 8 NC4 - 9 VREG5 O Non connection Smoothing capacitor connection pin for internal 5V power supply. Continued on next page. No.A0989-5/12 LV4920H Continued from preceding page. Pin No Pin name I/O Pin explanation 10 GND - 11 NC5 - Non connection 12 PWM_B2 I PWM input (negative input) of Internal equivalent circuit Analog ground OUT_CH2_N NC6 - Non connection 14 PWM_A2 I PWM input (plus input) of OUT_CH2_P 15 NC7 - Non connection 16 NOD_THERM O 500k 13 Thermal detector circuit for output (N-ch open drain) 17 NOD_OUTSHDN O Output shutdown monitor output (N-ch open drain) (when thermal protection circuit is activated, when low power supply voltage protection circuit is activated, or when in mute mode) 18 NC8 - Non connection 19 PVD2 - Channel 2 power system power supply 20 PVD2 - Channel 2 power system power supply 21 OUT_CH2_P O Channel 2 high side output Continued on next page. No.A0989-6/12 LV4920H Continued from preceding page. Pin No 22 Pin name BOOT_CH2_P I/O I/O Pin explanation Internal equivalent circuit Bootstrap I/O pin, channel 2 power supply high side 23 VDDA2 O Internal power supply decoupling capacitor connection 24 BOOT_CH2_N I/O Bootstrap I/O pin, channel 2 power supply low side 25 OUT_CH2_N O Channel 2 low side output 26 PGND2 - Channel 2 power system ground 27 PGND2 - Channel 2 power system ground 28 PGND1 - Channel 1 power system ground 29 PGND1 - Channel 1 power system ground 30 OUT_CH1_N O Channel 1 low side output 31 BOOT_CH1_N I/O Bootstrap I/O pin, channel 1 power supply low side 32 VDDA1 O Internal power supply decoupling capacitor connection 33 BOOT_CH1_P I/O Bootstrap I/O pin, channel 1 power supply high side 34 OUT_CH1_P O Channel 1 low side output 35 PVD1 - Channel 1 power system power supply 36 PVD1 - Channel 1 power system power supply No.A0989-7/12 LV4920H Functional Descriptions 1. System Standby The built-in 5V regulator is turned on and off under control of the high/low state of the STBYB pin. When the STBYB pin is low, the regulator will be turned off, and when that pin is high, the regulator will be turned on. Also, the signal initializes the internal logic of the IC. When the STBYB pin is low, the internal logic is initialized, and when the STBYB pin is high, the IC is put into normal operation. 2. Mute Function The mute function is provided mainly to mute the output so that impulse noise will not appear in the output when the power supply is being turned on. 2.1 Output muting The PWM output signal can be turned on or off by setting the MUTEB pin high or low. When the MUTEB pin is low, the PWM output is stopped (all PWM output signals are set in the high-impedance state) and when the MUTEB pin is high, the IC is placed in normal operation mode. Also the NOD_OUTSHDNB (Nch open drain) signal is output for an external monitor pin. 2.2 Power-on sequence The power-on sequence must be controlled by timing as shown below (PWM=BD mode) to minimize impulse noise. Note that when MUTE is released, all PWM input signals must be held low. The NOD_OUTSHDNB (Nch open drain) output signal is generated (Nch open drain output is turned on) when output is shut down (except when the overcurrent protection circuit is activated). This operating condition is established when either one of the following conditions occurs: (1) Thermal shutdown circuit is activated. (2) Low power voltage protection circuit is activated. (3) MUTEB set low (all outputs muted) No.A0989-8/12 LV4920H 2.3 Power Down Sequence The power shut-down sequence must be controlled by timing as shown below (PWM=BD mode) to minimize impulse noise. 3. Protection Circuits The LV4920H has full complement of built-in protection circuits: overcurrent protection, thermal protection, and low power supply voltage protection circuits. 3.1 Overcurrent protection circuit The overcurrent protection circuit protects the output transistors by detecting current that exceeds a predetermined value due to load shorting, shorting to power, shorting to ground, etc. When the protection circuit is activated, both the high- and low-side output transistors are turned off and the output is placed in a high-impedance state. The figure below shows the waveform of current that flows when load shorting (1) occurs. +3.8A -3.8A Overcurrent hold time (approx. 20s) No.A0989-9/12 LV4920H 3.2 Thermal protection circuit The thermal protection circuit detects the temperature (150C or higher) inside the IC and protects the IC from thermal damage. When the protection circuit is activated, both the high- and low-side output transistors are turned off, placing the output into the high-impedance state. This protective operation is given a hysteresis. Also, NOD_OUTSHDNB (Nch open drain) signal is output for an external monitor pin. 3.3 Low power supply voltage protection circuit The low power supply voltage protection circuit turns off both of the high- and low-side output transistors to place the output into the high-impedance state when the power supply voltage (PVD) falls below a predetermined value (6.7V or lower). This operation (activating the protective circuit when VD rises beyond 7.5V) is given a hysteresis (0.8V or greater). Also, NOD_OUTSHDNB (Nch open drain) signal is output for an external monitor pin. Application Circuit Example 0-5V NC1 PVD1 2 0-5V PWM_RECEIVER NC2 4 4 5 PWM_A1 NC3 BOOT_CH1_N 4 6 OUTPUTSTAGE CH1- PWM_RECEIVER or PWM_B1 (BD-mode) VDDA1 CONTROL DELAY 4 7 (AD-mode) NC4 4 9 VREG5 32 0.1 F 22 H PGND1 RL 31 0.33 F 22 H 30 29 28 THERMAL 1 F POWER SUPPLY OVER CURRENT (BD-mode) (AD-mode) OUT_CH2_N PWM_A2 4 13 NC7 NOD_THERM NOD_OUTSHDN R1 BOOT_CH2_P 4 15 3-12V PWM_RECEIVER 4 16 R2 4 17 NC8 4 18 VDDA2 CONTROL DELAY 4 14 VD 27 26 25 OUTPUTSTAGE BOOT_CH2_N CH224 PWM_RECEIVER NC6 PGND2 PGND2 4 11 4 12 or PWM_B2 1000 F SEQUENCE 4 GND 10 NC5 0.33 F 1 F 0.1 F OUT_CH1_N PGND1 4 8 1 F 35 OUT_CH1_P 34 OUTPUTSTAGE BOOT_CH1_P CH1+ 33 33 MUTE PVD1 36 LV4920H(HSOP36) 1 STBY OUTPUTSTAGE CH2+ OUT_CH2_P PVD2 PVD2 0.1 F 22 H 0.33 F 1 F 23 RL 22 0.33 F 22 H 0.1 F 21 20 1 F 19 R1,R2=Pull-Up Registor * NOD_THERM at pin 16 and NOD_OUTSHDN at pin 17 are outputs of N-ch open-drain type. When CPU or other device monitors these outputs, it is necessary to connect pull-up resistors to a power supply for the CPU and other device. The pull-up resistors are not required if they are not to be used (not monitored). No.A0989-10/12 LV4920H Characteristic Data Icc - VD Imute - VD 50 1.5 RL=8 STBY B=H , MUTEB=H 40 1 Icc [mA] Imute [mA] RL=8 STBY B=H , MUTEB=L 0.5 30 20 10 0 0 0 2 4 6 8 10 12 14 16 18 0 20 2 4 6 8 VD [V] 14 16 18 20 Power - VD 24 RL=8, STBY B=H, MUTEB=H f in=1kHz THD+N=10% RL=8 2CH-Driv e AES17 20 4 Power [W] VREG5 [V] 12 VD [V] VREG5 - VD 6 10 2 16 12 8 4 0 0 0 2 4 6 8 10 12 14 16 18 20 8 10 12 VD [V] THD+N - Frequency 18 20 1 VD=13V RL=8 Po=1W/ch 2CH-Driv e AES17 0.1 THD+N [%] THD+N [%] 16 THD+N - Frequency 1 0.01 VD=16V RL=8 Po=1W/ch 2CH-Driv e AES17 0.1 0.01 10 100 1000 10000 100000 10 100 1000 10000 100000 Frequency [Hz] Frequency [Hz] Frequency - Response Frequency - Response 10 10 Response [dB] Response [dB] 14 VD [V] 0 -10 VD=13V RL=8 Po=1W/ch 0 -10 VD=16V RL=8 Po=1W/ch -20 -20 10 100 1000 Frequency [Hz] 10000 100000 10 100 1000 10000 100000 Frequency [Hz] No.A0989-11/12 LV4920H Efficiency - Power Efficiency - Power 100 100 80 RL=8 Efficiency [%] Efficiency [%] 80 60 40 VD=13V f in=1kHz 2CH-Driv e AES17 20 RL=8 60 40 VD=16V f in=1kHz 2CH-Driv e AES17 20 0 0 0 2 4 6 8 10 0 2 4 6 Power [W] 12 14 100 100 VD=13V, RL=8 2CH-Driv e, AES17 100Hz, 1kHz 6.67kHz, 10kHz 1 THD+N [%] THD+N [%] 10 Power - THD+N Power - THD+N 10 8 Power [W] 10kHz 6.67kH 1kHz 0.1 10 VD=16V, RL=8 2CH-Driv e, AES17 100Hz, 1kHz 6.67kHz, 10kHz 1 100Hz 6.67kH 0.1 1kHz 10kHz 0.01 0.001 0.01 0.1 1 Power [W] 10 10kHz 100 0.01 0.001 0.01 0.1 1 10 100 Power [W] SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of December, 2007. Specifications and information herein are subject to change without notice. PS No.A0989-12/12