Product Specification PE4257 50 SPDT Absorptive UltraCMOSTM DC - 3.0 GHz RF Switch Product Description The PE4257 is a high-isolation UltraCMOSTM Switch designed for wireless applications, covering a broad frequency range from near DC up to 3000 MHz. This single-supply SPDT switch integrates a two-pin CMOS control interface. It also provides low insertion loss with extremely low bias requirements while operating on a single 3-volt supply. In a typical wireless application, the PE4257 provides unprecedented isolation and integration. Features * 50 characteristic impedance * Integrated 50 0.25 watt terminations * High input IP3 > +55 dBm * High isolation 64 dB at 1000 MHz * Low insertion loss: typically 0.75 dB at 1000 MHz and 0.95 dB at 2000 MHz * LV CMOS two-pin control The PE4257 is manufactured on Peregrine's UltraCMOSTM process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram * Single +3 volt supply operation * Low current consumption: 8 A Figure 2. Package Type RFC ESD 20-Lead 4x4 mm QFN 50 RF2 RF1 ESD ESD 50 CMOS Control Driver 50 CTRL CTRL2 Table 1. Electrical Specifications @ +25 C, VDD = 3.0 V (ZS = ZL = 50 ) Parameter Condition 1 Operating Frequency Minimum Typical DC 0.75 0.95 1.2 Maximum Units 3000 MHz 0.95 1.15 1.4 dB Insertion Loss 1000 MHz 2000 MHz 3000 MHz Isolation Input to Output 1000 MHz 2000 MHz 3000 MHz 61 46 40 64 50 44 dB Isolation Output to Output 1000 MHz 2000 MHz 3000 MHz 57 54 42 63 60 48 dB 80 dBm Input IP2 5 MHz - 1000 MHz Input IP3 5 MHz - 1000 MHz 50 55 dBm 1000 MHz 29 31 dBm Input 1dB Compression2 Switching Time Video Feedthrough3 50% CTRL to 10 / 90 RF 5 MHz - 1000 MHz 2 s 15 mVpp Notes: 1. Device linearity will begin to degrade below 5 MHz. 2. Note Absolute Maximum ratings in Table 3. 3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth Document No. 70-0166-06 www.psemi.com (c)2004-2009 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 7 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4257 Product Specification CTRL2 Table 3. Absolute Maximum Ratings Symbol 16 CTRL1 17 18 VSS/GND 19 GND 20 VDD Figure 3. Pin Configuration (Top View) VI VDD Min Max Units Power supply voltage Parameter/Condition -0.3 4.0 V Voltage on any DC input -0.3 VDD + 0.3 V 33/24 dBm PRF RF power on RFC, RF1, RF2 On Port/ Terminated Port TST Storage temperature -65 +150 C TOP Operating temperature -40 +85 C GND 1 GND 2 14 GND RF1 3 13 VESD ESD voltage (Human Body Model) GND, RF1 Term. 4 12 GND, RF2 Term. GND 5 11 GND 15 GND 7 8 9 GND RFC GND RF2 GND 10 6 GND GND 4x4mm 20-Lead QFN Table 4. Operating Ranges @ 25 C VDD Power Supply Description Min Typ Max Unit 2.7 3.0 3.3 V 8 20 A No. Name 1 GND RF Ground IDD Power Supply Current (VDD = 3V, VCNTL = 3V) 2 GND RF Ground Control Voltage High 0.70 VDD 31 RF1 RF I/O Control Voltage Low 0 4 GND RF Ground 5 GND RF Ground 6 GND RF Ground 7 GND RF Ground 81 RFC RF Common 9 GND RF Ground 10 GND RF Ground 11 GND RF Ground V Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Parameter Table 2. Pin Descriptions 1000 V 0.30 VDD V Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Electrostatic Discharge (ESD) Precautions 12 GND RF Ground 131 RF2 RF I/O 14 GND RF Ground When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESDsensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified. RF Ground Switching Frequency 15 GND 162 CTRL2 Control 2 172 CTRL1 Control 1 183 VSS / GND 19 GND Digital Ground 20 VDD Supply Pad GND RF Ground Pad Negative Supply Option Notes: 1. RF pins 3, 8, and 13 must be at 0 VDC. The RF pins do not require DC blocking capacitors for proper operation if the 0 VDC requirement is met. 2. Pins 16 and 17 are the CMOS controls that set the four operating states. 3. Connect pin 18 to GND to enable the negative voltage generator. Connect pin 18 to VSS (-3 V) to bypass and disable internal -3 V supply generator. See paragraph "Switching Frequency." (c)2004-2009 Peregrine Semiconductor Corp. All rights reserved. The PE4257 has a maximum 25 kHz switching rate when the internal negative voltage generator is used (pin 18=GND). The rate at which the PE4257 can be switched is only limited to the switching time if an external -3 V supply is provided at (pin18=VSS ). Table 5. Truth Table CTRL1 CTRL2 RFC - RF1 RFC - RF2 Low Low OFF OFF Low High OFF ON High Low ON OFF High High N/A1 N/A1 Notes: 1. The operation of the PE4257 is not supported or characterized in the C1=VDD and C2=VDD state. Document No. 70-0166-06 UltraCMOSTM RFIC Solutions Page 2 of 7 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4257 Product Specification Typical Performance Data @ 25C (Unless Otherwise Noted) (50-ohm impedance) Figure 4. Insertion Loss - Input - Output Figure 5. RF1 to RF2 Isolation Figure 6. Isolation - RFC to RF1/RF2 Figure 7. Return Loss Document No. 70-0166-06 www.psemi.com (c)2004-2009 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 7 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4257 Product Specification Figure 8. Evaluation Board Layouts Evaluation Kit Peregrine Specification 101/0151 The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4257 SPDT switch. The RF common port is connected through a 50 transmission line to J2. Port 1 and Port 2 are connected through 50 transmission lines to J1 and J3. A through transmission line connects SMA connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The board is constructed of a four metal layer FR4 material with a total thickness of 0.031". The transmission lines were designed using a coplanar waveguide with ground plane (28 mil core, 47.6 mil width, 30mil gap). Note the number of vias surrounding the device in the layout shown in Figure 8. These vias are critical for obtaining the specified isolation performance for the device shown in this datasheet. J6 provides a means for controlling DC and digital inputs to the device. The provided jumpers short the package pin to ground for logic low. When the jumper is removed, the pin is pulled up to VDD for logic high. When the jumper is in place, 3 A of current will flow through the 1 M pull up resistor. This extra current should not be attributed to the requirements of the device. Figure 9. Evaluation Board Schematic Peregrine Specification 102/0198 J6 HEADER 7X2 1 3 5 7 9 11 13 U1 PE4255/PE4257/PE42551 14 RF2 13 12 GND 11 50 OHM T-Line J3 1 10 9 C3 DNI GND GND GND GND GND 5 RFC 4 8 C2 DNI 15 GND RF1 GND R2 1M 2 4 6 8 10 12 14 16 C2 18 19 17 C1 GND 3 6 R1 1M 2 4 6 8 10 12 14 2 GND VSS/GND VDD GND 2 GND 2 1 1 7 50 OHM T-Line J1 GND 20 C1 DNI 1 3 5 7 9 11 13 50 OHM T-Line J2 1 50 OHM T-Line J5 2 J4 (c)2004-2009 Peregrine Semiconductor Corp. All rights reserved. 1 2 2 1 Document No. 70-0166-06 UltraCMOSTM RFIC Solutions Page 4 of 7 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4257 Product Specification Figure 10. Package Drawing 20-Lead 4x4 QFN Document No. 70-0166-06 www.psemi.com (c)2004-2009 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 7 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4257 Product Specification Figure 11. Tape and Reel Drawing Tape Feed Direction Pin 1 Top of Device Device Orientation in Tape Figure 12. Marking Specifications 4257 YYWW ZZZZZ YYWW = Date Code ZZZZZ = Last five digits of PSC Lot Number Table 6. Ordering Information Order Code Part Marking Description Package Shipping Method 4257-00 PE4257-EK PE4257-20QFN 4x4mm-EK Evaluation Kit 1 / Box 4257-51 4257 PE4257G-20QFN 4x4mm-75A Green 20-lead 4x4mm QFN 75 units / cut tape from reel 4257-52 4257 PE4257G-20QFN 4x4mm-3000C Green 20-lead 4x4mm QFN 3000 units / T&R (c)2004-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0166-06 UltraCMOSTM RFIC Solutions Page 6 of 7 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4257 Product Specification Sales Offices The Americas Peregrine Semiconductor Corporation Peregrine Semiconductor, Asia Pacific (APAC) 9380 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Europe Peregrine Semiconductor Europe Batiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 Hi-Rel and Defense Products Peregrine Semiconductor, Korea #B-2607, Kolon Tripolis, 210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Tel: +82-31-728-3939 Fax: +82-31-728-3940 Peregrine Semiconductor K.K., Japan Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). Document No. 70-0166-06 www.psemi.com The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. (c)2004-2009 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 7 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com