AN1669
9
Motorola Applications Data
IV — APPLICATION 2: 220 V INPUT VOLTAGE
IV–1 — Choice of the transformer:
One way to use the above design equations, consists of
drawing up a table showing how the main SMPS parameters
vary with the value of the turn ratio.
To calculate these values, it is necessary to know the input
power level. This value is taken equal to (135W) in our
application (135W corresponds to an efficiency equal to about
80%. The application results will show that this assumption
ensures a desirable margin with the nominal input voltage).
On the other hand, the parameters calculation shows that
(L x fosc)max is the (L x fosc) value that results in the lowest
(Ipk)max and (pon)max ones (refer to Ipk or pon expressions).
This (L x fosc) value is the maximum one that guarantees a
fixed frequency working for any working point (refer to section
II–1). The SMPS parameters given in the following table are
calculated using this threshold value.
Choice criteria and definition of the transformer:
As shown by the following table, the higher the turn ratio (N)
is, the lower the peak current is. Now, the (ni)max is propor-
tional to N and the voltage the transistor must face, increases
when N rises. That is why an optimal N value must be chosen.
MOSFET case:
T o perform a low cost SMPS, it is required to use a MOSFET
600 V . It is necessary to have a safety voltage margin, to avoid
the need to incorporate a lossy and costly clamping network
that would cut the voltage spikes due to the leakage inductor
at the power switch turning off (refer to Figure 1 in section
III–1).
Practically, about 550 V is acceptable. Consequently,
(N = 1.2) seems to be a maximum value.
Now, in order to obtain a well coupled transformer with a low
leakage inductor value, it is desirable to use a ferrite with a low
air–gap.
So, in order to be able to use a ferrite (ni = 140, AL = 274 nH/
turns2), (N = 1) seems to be a preferable value.
Consequently,
Lp
+
ALx (N x 40)2Lp 438
≈µH
and the optimal working frequency is:
L x fosc 24.3 fosc 55 kHz
≤≤
So, the following values can be chosen:
L = 438 µH
fosc = 50 kHz
and then Ipk = 3.5A
BIPOLAR transistor case:
As the gain of a Bipolar transistor decreases when the col-
lector current level rises, the SMPS peak current must be as
low as possible. That is why N must be chosen as high as pos-
sible. Now, if classical BIPOLAR transistors are able to face
1000 V or 1200 V, their VCEO is generally low . The transistor
used in the application, the MJE18206, has a VCES equal to
1200 V and a VCEO equal to 600 V. Since there are damped
oscillations (converging to Vin) during the dead– time (refer to
Figure 1), the transistor may be turned on while its VCE voltage
is higher than Vin (the maximum V in value being nearly equal
to 400 V). That is why , even if a resistor is connected between
the base and the emitter of the transistor (refer to section
IV–2), the (VT)max (that is, (V in+NV o)max) must be chosen
lower than 600 V, to ensure system reliability.
In addition to this, a second choice criterion is (ni)max, since
transformer saturation must be avoided.
(N = 1.6) seems to be a good choice that enables the use
of a ferrite (AL = 250nH/turns2; ni = 180))
Consequently,
L
+
ALx (N x 40)2L 1mH
≈
So, the optimal working frequency is:
L x fosc 43.7 fosc 43 kHz
≤≤
Finally, the following value can be taken:
L = 1mH
fosc = 43 kHz
(Ipk)max = 2.5A
N (L.fosc)max (Ipk)max
(A) (VT)max
(V) (VD)max
(V)
MOSFET on
losses/Rdson
(W/
W
)
BIPOLAR on
losses/VCE
(W/A) (ni)max
0.75 16.2 4.1 490 650 1.5 0.54 122
1.00 24.3 3.3 520 520 1.2 0.54 133
1.20 30.9 3.0 540 450 1.1 0.54 144
1.40 37.4 2.7 570 400 1.0 0.54 150
1.60 43.7 2.5 590 370 0.9 0.54 159
1.80 49.7 2.3 620 340 0.8 0.54 168
2.00 55.5 2.2 640 320 0.8 0.54 176
NOTE: N: turn ratio (refer to II–5)
(VT)max: maximum voltage the power switch must face
(VD)max: maximum voltage the 120 V output diode must face