e ADVANCED LINEAR DEVICES, INC. EN FEATURES ALD110800A/ALD110800/ALD110900A/ALD110900 are monolithic quad/dual N-Channel MOSFETs matched at the factory using ALD's proven EPAD(R) CMOS technology. These devices are intended for low voltage, small signal applications. The ALD110800/ALD110900 features zero threshold voltage, which reduces or eliminates input to output voltage level shift, including circuits where the signal is referenced to GND or V+. This feature greatly reduces output signal voltage level shift and enhances signal operating range, especially for very low operating voltage environments. With these zero threshold devices an analog circuit with multiple stages can be constructed to operate at extremely low supply or bias voltage levels. As an example, an input amplifier stage operating at 0.2V supply voltage has been demonstrated. * Precision zero threshold voltage mode * Nominal RDS(ON) @VGS=0.0V of 104K * Matched MOSFET to MOSFET characteristics * Tight lot to lot parametric control * VGS(th) match (VOS) to 2mV and 10mV * Positive, zero, and negative VGS(th) tempco * Low input capacitance * Low input/output leakage currents ALD110800A/ALD110800/ALD110900A/ALD110900 matched pair MOSFETs are designed for exceptional device electrical characteristics matching. As these devices are on the same monolithic chip, they also exhibit excellent tempco tracking characteristics. They are versatile as design components for a broad range of analog applications such as basic building blocks for current sources, differential amplifier input stages, transmission gates, and multiplexer applications. Besides matched pair electrical characteristics, each individual MOSFET also exhibits well controlled parameters, enabling the user to depend on tight design limits. Even units from different batches and different date of manufacture have correspondingly well matched characteristics. These devices are built for minimum offset voltage and differential thermal response, and they are designed for switching and amplifying applications in +0.2V to +10V systems where low input bias current, low input capacitance and fast switching speed are desired. The VGS(th) of these devices are set at +0.0V, which classify them as both enhancement mode and depletion mode devices. When the gate is set at 0.0V, the drain current = +1A @ VDS =1+0.1V, which allow a class of circuits with output voltage level biased at or near input voltage level without voltage level shift. These devices exhibit same well controlled turn-off and sub-threshold characteristics as standard enhancement mode MOSFETs. The ALD110800A/ALD110800/ALD110900A/ALD110900 are MOSFET devices that feature high input impedance (1012) and high DC current gain (>108 ). A sample calculation of the DC current gain at a drain current of 3mA and input leakage current of 30pA at 25C is = 3mA/ 30pA = 100,000,000. For most applications, connect V+ pin to the most positive voltage potential (or left open unused) and V- and N/C pins to the most negative voltage potential in the system. All other pins must have voltages within these voltage limits. APPLICATIONS * Very low voltage analog and digital circuits * Zero power fail safe circuits * Backup battery circuits & power failure detector * Low level voltage clamp & zero crossing detector * Source followers and buffers * Precision current mirrors and current sources * Capacitives probes and sensor interfaces * Charge detectors and charge integrators * Differential amplifier input stage * High side switches * Peak detectors and level shifters * Sample and Hold * Current multipliers * Analog switches / multiplexers * Voltage comparators and level shifters PIN CONFIGURATION ALD110800 N/C* 1 GN1 2 DN1 3 S12 4 V- 5 DN4 6 GN4 7 N/C* 8 8-Pin Plastic Dip Package 8-Pin SOIC Package ALD110800ASC ALD110900APA ALD110900ASA ALD110800SC ALD110900PA ALD110900SA * Contact factory for industrial temp. range or user-specified threshold voltage values V- M1 M2 V+ VM4 M3 16 N/C* 15 GN2 14 DN2 13 V+ 12 S34 11 DN3 10 9 V- V- GN3 N/C* ALD110900 N/C* Operating Temperature Range* 0C to +70C 0C to +70C V- PC, SC PACKAGES ORDERING INFORMATION ALD110800APC ALD110800PC AB LE D VGS(th)= +0.0V GENERAL DESCRIPTION 16-Pin SOIC Package (R) ALD110800/ALD110800A/ALD110900/ALD110900A QUAD/DUAL N-CHANNEL ZERO THRESHOLDTM EPAD(R) MATCHED PAIR MOSFET ARRAY 16-Pin Plastic Dip Package TM EPAD 1 GN1 2 DN1 3 S12 4 V- V- M1 M2 V- 8 N/C* 7 GN2 6 DN2 5 V- PA, SA PACKAGES *N/C pins are internally connected. Connect to V- to reduce noise Rev 1.0-0506 (c)2005 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286 www.aldinc.com ABSOLUTE MAXIMUM RATINGS Drain-Source voltage, VDS Gate-Source voltage, VGS Power dissipation Operating temperature range PA, SA, PC, SC package Storage temperature range Lead temperature, 10 seconds 10.6V 10.6V 500 mW 0C to +70C -65C to +150C +260C OPERATING ELECTRICAL CHARACTERISTICS V+ = +5V (or open) V- = GND TA = 25C unless otherwise specified CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. ALD110800A / ALD110900A Parameter Symbol Gate Threshold Voltage VGS(th) Offset Voltage VGS(th)1-VGS(th)2 ALD110800/ ALD110900 Min Typ Max Min Typ -0.01 0.00 0.01 -0.02 0.00 0.02 VOS 1 2 2 10 Offset Voltage Tempco TCVOS 5 5 V/C VDS1 = VDS2 GateThreshold Voltage Tempco TCVGS(th) -1.7 0.0 +1.6 -1.7 0.0 +1.6 mV/C ID = 1A, VDS = 0.1V ID = 20A, VDS = 0.1V ID = 40A, VDS = 0.1V On Drain Current IDS (ON) 12.0 3.0 12.0 3.0 mA VGS = +9.5V, VDS = +5V VGS = +4.0V, VDS = +5V Forward Transconductance GFS 1.4 1.4 mmho VGS = +4.0V VDS = +9.0V Transconductance Mismatch GFS 1.8 1.8 % Output Conductance GOS 68 68 mho VGS = +4.0V VDS = +9.0V Drain Source On Resistance RDS (ON) 500 500 VDS = +0.1V VGS = +4.0V Drain Source On Resistance RDS (ON) 104 104 K VDS = +0.1V VGS = +0.0V Drain Source On Resistance Tolerance RDS (ON) 5 5 % VDS = +0.1V VGS = +4.0V Drain Source On Resistance Mismatch RDS (ON) 0.5 0.5 % Drain Source Breakdown Voltage BVDSX Drain Source Leakage Current1 IDS (OFF) 10 Max 10 10 400 10 4 Unit Test Conditions V IDS =1A, VDS = 0.1V mV V IDS = 1.0A V-= VGS = -1.0V 400 pA 4 nA VGS = -1.0V, VDS =+5V V- = -5V TA = 125C 30 1 pA nA VDS = 0V VGS = +10V TA =125C Gate Leakage Current1 IGSS 5 Input Capacitance CISS 2.5 2.5 pF Transfer Reverse Capacitance CRSS 0.1 0.1 pF Turn-on Delay Time ton 10 10 ns V+ = 5V RL= 5K Turn-off Delay Time toff 10 10 ns V+ = 5V RL= 5K 60 60 dB f = 100KHz Crosstalk Notes: 1 30 1 5 Consists of junction leakage currents ALD110800/ALD110800A/ALD110900/ALD110900A Advanced Linear Devices 2