| SIEMENS CAPITAL/ OPTO | SIEMENS 50) Pf s236326 oo03309 bo y-4i-q . | IL101 HIGH SPEED THREE STATE " . . OPTOCOUPLER Package Dimensions in Inches (mm) : 380 i |. 19 65). 110 16) 400 Pe a ry ne ff Yeo fa ANODE GATE caTHODE & Ny ncGi GROUND 430 43 30) 1281 150 0 i A) ' . 020 (3.81) : L508) 1 i (762) | 030 5 008 f 1203) ~L. 7 62) i HH 3 : o12 15 i Absolute Maximum Ratings g8 : Storage Temperature -B5C to +125C aa 1 FEATURES Operating Temperature .... orc to #70C g Ze r Lead Solder Temperature 260C for 10 Sec. ee i High Speed Inout Diode = i i HERS eaten Faraday Shielded Photodetector for Improved Common Mode Rejection DTL/TTL Compatible -5V supply Three State Output Logic for Multi- plexing Built-in Schmitt Trigger to Avoid Oscillation Underwriters Lab Approval #E52744 DESCRIPTION 1L101 is an optically coupled pair employ- Reverse Voltage ...-..-.... Output - IC Supply Voltage - Veg Enable Input Voltage - Ve Forward OC Current ++. 10mA 1. 5V (Not to exceed Voc by more than 500 mv) Quiput Collector Current-#C 22.2... Output Collector Power Dissipation . Output Collector Voltage - Vout ... tsolation Voltage {Input-Output} - DC Electrical Characteristics Over Recommended Temperature (Ta = 0G 70C) Test Parameter Min. Typ. Max. Units Conditions Fig. Note fa (1): Logie (1) Input Current to Ensure Logic (0) Output 5 mA 1 - lin (0): Logic (0) Input Current to Ensure ing a Gailium Arsenide Phosphide LED Vg Thy: Logie 11) Gate mo eA . so and a silicon monolithic intagrated circuit Voltage 2.0 v - A inciuding a photodetector. High speed Ye Meheage OO) Sate ey oe digital information can be transmitted Vout (0}* Logie. (0) by the device while maintaining a high Output Voltage 3 6 yec_=, 8.8 : degree of electrical isolation between hee 5 mA, input and output. The {L101 can be lout (Sinking) = 16 mA used to replace pulse transformers in lee 18 22 mA Vcc 5.5V many digital interface applications. A 1S Oma built-in Schmitt Trigger provides hyster- esis to reduce the possibility of oscillation. Specifications are subject to change without notice. 6-43 Po - a _STEMENS CAPITAL/ OPTO iO Dd i &234b3cb Q003310 c i T- 41-89 Switching Characteristics at Ta = 25, Voc = 5V PULSE 46V ; Test GENERATOR Veelt , Par-meter Min, Typ. Max. Units Conditions Fig. Note ty = 8ns m ome SR, 7 > tpa (1): Propagation BYPASS OUTPUT Vou, Delay Time to (NpuT x ot MONITORING Logical (1) Level 175 300 ons Ry, = 35082, 11 MONITORING 4793 | nol ue NODE C, = 15pF, NODE . bn = 7.5 mA Cy fs approximately 15pF, which includes + . tpa lO}: Propagation probe and stray wiring capacitance. - = Delay Time to ~ 350mV Ui, = 7 5mA)} j Lagical (0) Level 70 100 ons Ry, = 35082, 1 2 == 175mV (1, = 3.76MA} C, = U5pF, In = 7.5 mA ta-tp: Output Rise-Falt Time (10 90%) 18 ns Ry, = 35082, - oo C, = 18pF, ly = 7-5 MA Test Circult for tea lO) and tygit]. sett Fig. 1 Electrical CharacteristicsInput-Output at Ta = 25C : Test : Parameter Symbo! Min, Typ. Max. Units Conditions Fig. Note TRUTH TABLE (Positive Logic) i Insulation Vol- tage (Input * | Enable i Output) BV;9 6000 7500 voc t=1Se. - 3 1 1 0 z Resistance (In- 0 7 1 5 put-OutputhRy 9 10tz Q Vy. =500V0 ~ 3 7 0 Capacitance (Input-Out- Qo 9 put} Cho 0.5 0.8 pF f= 1MHz - 3 *See definition of terms for . logic state. : Electrical CharacteristicsInput Diode at Ta = 25C . Test [ Parameter Symbol Min. Typ. Max. Units Conditions Fig. Note : Forward 2 Voltage Ve 1.5 1.75 Vi ty =10mA - 4 : Reverse Break- : down Voltage Veg 55 Vig = 10pA - = Capacitance Cn 10 pF V=0, =1MHz - = Operating Procedures and Definitions Logic Convention. The IL-101 is defined in terms of positive lagic. Bypassing. A ceramic capacitor (.0tuF min.) should be connected from pin 8 to pin 5. Its purpose is to stabilize the operation of the switching amplifier. Failure to provide the bypassing may impair the switching Propesties. . Polarities. All voltages are referenced to network ground (pin 5}, Current flowing toward a terminal is considered positive. Gate Input. No external pull-up required for a togic (1). NOTES: 1. The tpal) propagation delay 1s measured fram the 3 75 mA point on the tra:ling edge of the input pulse to the 1 5V point on the trailing edge of the output pulse 2, The tpgl0l propagation delay is measured fromm the 3 75 mA point on the input pute to the 1 SV point an the feading edge of the output pulse. 3. Pins 2 and 3 shorted together, and pins 6, 6, 7, and B shorted together. 4. At tOmA Vp decreases wath increasing temperature at the rate of t.6mVi/EC Siemens Components Inc., Optoelectronics Division, 19000 Homestead Road, Cupertino, California 95014 (408) 257-7910/ TWX 910-338-0022 6-44