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FEATURES DESCRIPTION
APPLICATIONS
DCQ PACKAGE
SOT223
(TOP VIEW)
DBV PACKAGE
SOT23
(TOP VIEW)
IN
GND
EN NR/FB
OUT
1
2
34
5
12345
IN OUTGND
NR/FB
EN
TAB IS GND
IN
N/C
N/C
EN
8
7
6
5
OUT
N/C
NR/FB
GND
1
2
3
4
DRB PACKAGE
3mm x 3mm SON
(TOP VIEW)
TPS736xx
GNDEN NR
IN OUT
VIN VOUT
Optional Optional
Optional
Typical Application Circuit for Fixed Voltage Versions
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
Cap-Free, NMOS, 400mA Low-Dropout Regulatorwith Reverse Current Protection
•Stable with No Output Capacitor or Any Value
The TPS736xx family of low-dropout (LDO) linearor Type of Capacitor
voltage regulators uses a new topology: an NMOSpass element in a voltage-follower configuration. This•Input Voltage Range of 1.7V to 5.5V
topology is stable using output capacitors with low•Ultra-Low Dropout Voltage: 75mV typ
ESR, and even allows operation without a capacitor.•Excellent Load Transient Response—with or
It also provides high reverse blockage (low reversewithout Optional Output Capacitor
current) and ground pin current that is nearly constantover all values of output current.•New NMOS Topology Delivers Low ReverseLeakage Current
The TPS736xx uses an advanced BiCMOS processto yield high precision while delivering very low•Low Noise: 30µV
RMS
typ (10Hz to 100kHz)
dropout voltages and low ground pin current. Current•0.5% Initial Accuracy
consumption, when not enabled, is under 1µA and•1% Overall Accuracy Over Line, Load, and
ideal for portable applications. The extremely lowTemperature
output noise (30µV
RMS
with 0.1µF C
NR
) is ideal forpowering VCOs. These devices are protected by•Less Than 1µA max I
Q
in Shutdown Mode
thermal shutdown and foldback current limit.•Thermal Shutdown and Specified Min/MaxCurrent Limit Protection•Available in Multiple Output Voltage Versions– Fixed Outputs of 1.20V to 4.3V– Adjustable Output from 1.20V to 5.5V– Custom Outputs Available
•Portable/Battery-Powered Equipment•Post-Regulation for Switching Supplies•Noise-Sensitive Circuitry such as VCOs•Point of Load Regulation for DSPs, FPGAs,ASICs, and Microprocessors
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
POWER DISSIPATION RATINGS
(1)
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integratedcircuits be handled with appropriate precautions. Failure to observe proper handling and installationprocedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precisionintegrated circuits may be more susceptible to damage because very small parametric changes couldcause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
(2)
TPS736 xxyyyz XX is nominal output voltage (for example, 25 = 2.5V, 01 = Adjustable
(3)
).YYY is package designator.Zis package quantity.
(1) For the most current specification and package information, refer to the Package Option Addendum located at the end of this datasheetor see the TI website at www.ti.com .(2) Additional output voltages from 1.25V to 4.3V in 100mV increments are available on a quick-turn basis using innovative factoryEEPROM programming. Minimum order quantities apply; contact factory for details and availability.(3) For fixed 1.2V operation, tie FB to OUT.
over operating free-air temperature range unless otherwise noted
(1)
TPS736xx UNIT
V
IN
range -0.3 to 6.0 VV
EN
range -0.3 to 6.0 VV
OUT
range -0.3 to 5.5 VPeak output current Internally limitedOutput short-circuit duration IndefiniteContinuous total power dissipation See Dissipation Ratings TableJunction temperature range, T
J
-55 to +150 °CStorage temperature range -65 to +150 °CESD rating, HBM 2 kVESD rating, CDM 500 V
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristicsis not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
DERATING FACTOR T
A
≤25°C T
A
= 70°C T
A
= 85°CBOARD PACKAGE R
ΘJC
R
ΘJA
ABOVE T
A
= 25°C POWER RATING POWER RATING POWER RATING
Low-K
(2)
DBV 64°C/W 255°C/W 3.9mW/°C 390mW 215mW 155mWHigh-K
(3)
DBV 64°C/W 180°C/W 5.6mW/°C 560mW 310mW 225mWLow-K
(2)
DCQ 15°C/W 53°C/W 18.9mW/°C 1.89W 1.04W 0.76WHigh-K
(3) (4)
DRB 1.2°C/W 40°C/W 25.0mW/°C 2.50W 1.38W 1.0W
(1) See Power Dissipation in the Applications section for more information related to thermal design.(2) The JEDEC Low-K (1s) board design used to derive this data was a 3inch x 3inch, 2-layer board with 2-ounce copper traces on top ofthe board.(3) The JEDEC High-K (2s2p) board design used to derive this data was a 3inch x 3inch, multilayer board with 1-ounce internal power andground planes and 2-ounce copper traces on the top and bottom of the board.(4) Based on preliminary thermal simulations.
2
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ELECTRICAL CHARACTERISTICS
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
Over operating temperature range (T
J
= -40°C to +125°C), V
IN
= V
OUT(nom)
+ 0.5V
(1)
, I
OUT
= 10mA, V
EN
= 1.7V, andC
OUT
= 0.1µF, unless otherwise noted. Typical values are at T
J
= 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IN
Input voltage range
(1) (2)
1.7 5.5 VV
FB
Internal reference (TPS73601) T
J
= 25°C 1.198 1.20 1.210 VOutput voltage range
V
FB
5.5 - V
DO
V(TPS73601)V
OUT
Nominal T
J
= 25°C -0.5 +0.5Accuracy
(1)
%over V
IN
, I
OUT
, V
OUT
+ 0.5V ≤V
IN
≤5.5V;
-1.0 ±0.5 +1.0and T 10mA ≤I
OUT
≤400mA∆V
OUT
%/ ∆V
IN
Line regulation
(1)
V
O(nom)
+ 0.5V ≤V
IN
≤5.5V 0.01 %/V1mA ≤I
OUT
≤400mA 0.002∆V
OUT
%/ ∆I
OUT
Load regulation %/mA10mA ≤I
OUT
≤400mA 0.0005Dropout voltage
(3)V
DO
I
OUT
= 400mA 75 200 mV(V
IN
= V
OUT(nom)
- 0.1V)Z
O
(DO) Output impedance in dropout 1.7V ≤V
IN
≤V
OUT
+ V
DO
0.25 ΩV
OUT
= 0.9 × V
OUT(nom)
400 650 800 mAI
CL
Output current limit
3.6V ≤V
IN
≤4.2V, 0°C ≤T
J
≤70°C 500 800 mAI
SC
Short-circuit current V
OUT
= 0V 450 mAI
REV
Reverse leakage current
(4)
(-I
IN
) V
EN
≤0.5V, 0V ≤V
IN
≤V
OUT
0.1 10 µAI
OUT
= 10mA (I
Q
) 400 550I
GND
Ground pin current µAI
OUT
= 400mA 800 1000I
SHDN
Shutdown current (I
GND
) V
EN
≤0.5V, V
OUT
≤V
IN
≤5.5 0.02 1 µAI
FB
FB pin current (TPS73601) 0.1 0.3 µAf = 100Hz, I
OUT
= 400mA 58Power-supply rejection ratioPSRR dB(ripple rejection)
f = 10KHz, I
OUT
= 400mA 37C
OUT
= 10µF, No C
NR
27 × V
OUTOutput noise voltageV
N
µV
RMSBW = 10Hz - 100KHz
C
OUT
= 10µF, C
NR
= 0.01µF 8.5 × V
OUT
V
OUT
= 3V, R
L
= 30 ΩC
OUT
= 1µF,t
STR
Startup time 600 µsC
NR
= 0.01µFV
EN
(HI) Enable high (enabled) 1.7 V
IN
VV
EN
(LO) Enable low (shutdown) 0 0.5 VI
EN
(HI) Enable pin current (enabled) V
EN
= 5.5V 0.02 0.1 µAShutdown, temperature increasing 160T
SD
Thermal shutdown temperature °CReset, temperature decreasing 140T
J
Operating junction temperature -40 125 °C
(1) Minimum V
IN
= V
OUT
+V
DO
or 1.7V, whichever is greater.(2) For V
OUT(nom)
<1.6V, when V
IN
≤1.6V, the output will lock to V
IN
and may result in a damaging over-voltage level on the output. To avoidthis situation, disable the device before powering down the V
IN
.(3) V
DO
is not measured for the TPS73615 (V
OUT(nom)
= 1.5V) since minimum V
IN
= 1.7V.(4) Refer to Applications section for more information.
3
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FUNCTIONAL BLOCK DIAGRAMS
Servo
Error
Amp
Ref
27kΩ
8kΩ
Current
Limit
Thermal
Protection
Bandgap
NR
OUT
R1
R2
EN
GND
IN
R1+ R2= 80kΩ
4MHz
Charge Pump
VO
1.2V
1.5V
1.8V
2.5V
2.8V
3.0V
3.3V
R1
Short
23.2kΩ
28.0kΩ
39.2kΩ
44.2kΩ
46.4kΩ
52.3kΩ
R2
Open
95.3kΩ
56.2kΩ
36.5kΩ
33.2kΩ
30.9kΩ
30.1kΩ
Table 1. Standard 1%
Resistor Values for
Common Output Voltages
NOTE: VOUT = (R1 + R2)/R2 × 1 .204 ;
R1R2 ≅ 19kΩ f or b est
accuracy.
Servo
Error
Amp
Ref
Current
Limit
Thermal
Protection
Bandgap
OUT
FB
R1
R2
EN
GND
IN
80kΩ
8kΩ
27kΩ
4MHz
Charge Pump
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
Figure 1. Fixed Voltage Version
Figure 2. Adjustable Voltage Version
4
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PIN ASSIGNMENTS
DCQ PACKAGE
SOT223
(TOP VIEW)
1 2 3 4 5
IN OUTGND
NR/FBEN
DBV PACKAGE
SOT23
(TOP VIEW)
IN
GND
EN NR/FB
OUT1
2
3 4
5TAB IS GND IN
N/C
N/C
EN
8
7
6
5
OUT
N/C
NR/FB
GND
1
2
3
4
DRB PACKAGE
3mm x 3mm SON
(TOP VIEW)
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
Terminal Functions
SOT23 SOT223 3x3 SON(DBV) (DCQ) (DRB)NAME PIN NO. PIN NO. PIN NO. DESCRIPTION
IN 1 1 8 Unregulated input supplyGND 2 3 4, Pad GroundEN 3 5 5 Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts theregulator into shutdown mode. Refer to the Shutdown section under ApplicationsInformation for more details. EN can be connected to IN if not used.NR 4 4 3 Fixed voltage versions only—connecting an external capacitor to this pin bypassesnoise generated by the internal bandgap, reducing output noise to very low levels.FB 4 4 3 Adjustable voltage version only—this is the input to the control loop error amplifier,and is used to set the output voltage of the device.OUT 5 2 1 Output of the Regulator. There are no output capacitor requirements for stability.
5
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TYPICAL CHARACTERISTICS
0.5
0.4
0.3
0.2
0.1
0
−0.1
−0.2
−0.3
−0.4
−0.5
Change in VOUT (%)
0 50 100 150 300 350200 250 400
IOUT (mA)
Referred to IOUT = 10mA
−40C
+125C
+25C
0.20
0.15
0.10
0.05
0
−0.05
−0.10
−0.15
−0.20
Change in VOUT (%)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN −VOUT (V)
+125C+25C
−40C
Referred to VIN = VOUT + 0.5V at IOUT = 10mA
30
25
20
15
10
5
0
Percent of Units (%)
−1.0
−0.9
−0.8
−0.7
−0.6
−0.5
−0.4
−0.3
−0.2
−0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
VOUT Error (%)
IOUT = 10mA
18
16
14
12
10
8
6
4
2
0
Percent of Units (%)
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10
20
30
40
50
60
70
80
90
100
Worst Case dVOUT/dT (ppm/C)
IOUT = 10mA
All Voltage Versions
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
For all voltage versions, at T
J
= +25°C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
LOAD REGULATION LINE REGULATION
Figure 3. Figure 4.
DROPOUT VOLTAGE vs OUTPUT CURRENT DROPOUT VOLTAGE vs TEMPERATURE
Figure 5. Figure 6.
OUTPUT VOLTAGE ACCURACY HISTOGRAM OUTPUT VOLTAGE DRIFT HISTOGRAM
Figure 7. Figure 8.
6
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1000
900
800
700
600
500
400
300
200
100
0
IGND (µA)
0 100 200 300 400
IOUT (mA)
VIN = 5.5V
VIN = 4V
VIN = 2V
1000
900
800
700
600
500
400
300
200
100
0
IGND (µA)
−50 −25 0 25 50 75 100 125
Temperature (C)
IOUT = 400mA
VIN = 5.5V
VIN = 3V
VIN = 2V
800
700
600
500
400
300
200
100
0
Current Limit (mA)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VOUT (V)
TPS73633
ICL
ISC
1
0.1
0.01
IGND (µA)
−50 −25 0 25 50 75 100 125
Temperature (C)
VENABLE = 0.5V
VIN = VO+ 0.5V
800
750
700
650
600
550
500
450
400
Current Limit (mA)
1.5 2.5 3.0 3.5 4.0 4.5 5.02.0 5.5
VIN (V)
800
750
700
650
600
550
500
450
400
Current Limit (mA)
−50 −25 0 25 50 75 100 125
Temperature (C)
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
TYPICAL CHARACTERISTICS (continued)For all voltage versions, at T
J
= +25°C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
GROUND PIN CURRENT vs OUTPUT CURRENT GROUND PIN CURRENT vs TEMPERATURE
Figure 9. Figure 10.
CURRENT LIMIT vs V
OUT
GROUND PIN CURRENT in SHUTDOWN(FOLDBACK) vs TEMPERATURE
Figure 11. Figure 12.
CURRENT LIMIT vs V
IN
CURRENT LIMIT vs TEMPERATURE
Figure 13. Figure 14.
7
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10k10
90
80
70
60
50
40
30
20
10
0
Ripple Rejection (dB)
100 1k 100k 1M 10M
Frequency (Hz)
IOUT = 1mA
COUT = 1µF
IOUT = Any
COUT = 0µF
IOUT = 1mA
COUT = Any
IOUT = 1mA
COUT = 10µF
IOUT = 100mA
COUT = Any
IOUT = 100mA
COUT = 10µF
IO=100mA
CO=1µF
1
0.1
0.01
eN(µV/√Hz)
10 100 1k 10k 100k
Frequency (Hz)
COUT = 1µF
COUT = 0µF
COUT = 10µF
IOUT = 150mA
1
0.1
0.01
eN(µV/√Hz)
10 100 1k 10k 100k
Frequency (Hz)
IOUT = 150mA
COUT = 1µF
COUT = 0µF
COUT = 10µF
60
50
40
30
20
10
0
VN(RMS)
COUT (µF)
0.1 1 10
VOUT = 5.0V
VOUT = 3.3V
VOUT = 1.5V
CNR = 0.01µF
10Hz < Frequency < 100kHz
140
120
100
80
60
40
20
0
VN(RMS)
CNR (F)
1p 10p 100p 1n 10n
VOUT = 5.0V
VOUT = 3.3V
VOUT = 1.5V
COUT = 0µF
10Hz < Frequency < 100kHz
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
TYPICAL CHARACTERISTICS (continued)For all voltage versions, at T
J
= +25°C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
PSRR (RIPPLE REJECTION) vs FREQUENCY PSRR (RIPPLE REJECTION) vs V
IN
– V
OUT
Figure 15. Figure 16.
NOISE SPECTRAL DENSITY NOISE SPECTRAL DENSITYC
NR
= 0 µF C
NR
= 0.01 µF
Figure 17. Figure 18.
RMS NOISE VOLTAGE vs C
OUT
RMS NOISE VOLTAGE vs C
NR
Figure 19. Figure 20.
8
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10µs/div
100mV/tick
50mV/tick
20mV/tick
50mA/tick
VIN = 3.8V COUT = 0µF
COUT = 1µF
COUT = 10µF
10mA
400mA
VOUT
VOUT
VOUT
IOUT
10µs/div
50mV/div
50mV/div
1V/div
VOUT
VOUT
VIN
IOUT = 400mA
5.5V
4.5V
dVIN
dt = 0.5V/µs
COUT = 0µF
COUT = 100µF
100µs/div
1V/div
1V/div
RL= 20Ω
COUT = 10µF
2V
0V
RL= 1kΩ
COUT = 0µF
RL= 20Ω
COUT = 1µF
VOUT
VEN
100µs/div
1V/div
1V/div
RL= 20Ω
COUT = 10µF
2V
0V
RL= 1kΩ
COUT = 0µF
RL= 20Ω
COUT = 1µF
VOUT
VEN
6
5
4
3
2
1
0
−1
−2
Volts
50ms/div
VIN
VOUT
10
1
0.1
0.01
IENABLE (nA)
−50 −25 0 25 50 75 100 125
Temperature (C)
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
TYPICAL CHARACTERISTICS (continued)For all voltage versions, at T
J
= +25°C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
TPS73633 TPS73633LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE
Figure 21. Figure 22.
TPS73633 TPS73633TURN-ON RESPONSE TURN-OFF RESPONSE
Figure 23. Figure 24.
TPS73633 I
ENABLE
vs TEMPERATUREPOWER UP / POWER DOWN
Figure 25. Figure 26.
9
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60
55
50
45
40
35
30
25
20
VN(rms)
CFB (F)
10p 100p 1n 10n
VOUT = 2.5V
COUT = 0µF
R1= 39.2kΩ
10Hz < Frequency < 100kHz
160
140
120
100
80
60
40
20
0
IFB (nA)
−50 −25 0 25 50 75 100 125
Temperature (C)
25µs/div
200mV/div
200mV/div
VOUT
VOUT
IOUT
400mA
10mA
COUT = 0µF
CFB = 10nF
R1= 39.2kΩ
COUT = 10µF
5µs/div
100mV/div
100mV/div
VOUT
VOUT
VIN
4.5V
3.5V
COUT = 0µF
VOUT = 2.5V
CFB = 10nF
COUT = 10µF
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
TYPICAL CHARACTERISTICS (continued)For all voltage versions, at T
J
= +25°C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
TPS73601 TPS73601RMS NOISE VOLTAGE vs C
ADJ
I
FB
vs TEMPERATURE
Figure 27. Figure 28.
TPS73601 TPS73601LOAD TRANSIENT, ADJUSTABLE VERSION LINE TRANSIENT, ADJUSTABLE VERSION
Figure 29. Figure 30.
10
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APPLICATION INFORMATION
Input and Output Capacitor Requirements
Output Noise
TPS736xx
GNDEN NR
IN OUT
VIN VOUT
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
Optional bypass
capacitor to reduce
output noise.
VN32VRMS (R1R2)
R2
32VRMS VOUT
VREF
(1)
VN(VRMS)27VRMS
VVOUT(V)
(2)
TPS736xx
GNDEN FB
IN OUT
VIN VOUT
VOUT =×1.204
(R1+ R2)
R1
R1CFB
R2
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
Optional capacitor
reduces output noise
and improves
transient response.
VN(VRMS)8.5VRMS
VVOUT(V)
(3)
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
The TPS736xx belongs to a family of new generationLDO regulators that use an NMOS pass transistor toachieve ultra-low-dropout performance, reverse cur-
Although an input capacitor is not required for stab-rent blockage, and freedom from output capacitor
ility, it is good analog design practice to connect aconstraints. These features, combined with low noise
0.1µF to 1µF low ESR capacitor across the inputand an enable input, make the TPS736xx ideal for
supply near the regulator. This will counteract reac-portable applications. This regulator family offers a
tive input sources and improves transient response,wide selection of fixed output voltage versions and an
noise rejection, and ripple rejection. A higher-valueadjustable output version. All versions have thermal
capacitor may be necessary if large, fast rise-timeand over-current protection, including foldback cur-
load transients are anticipated or the device is lo-rent limit.
cated several inches from the power source.Figure 31 shows the basic circuit connections for the
The TPS736xx does not require an output capacitorfixed voltage models. Figure 32 gives the connections
for stability and has maximum phase margin with nofor the adjustable output version (TPS73601). R
1
and
capacitor. It is designed to be stable for all availableR
2
can be calculated for any output voltage using the
types and values of capacitors. In applications whereformula in Figure 32 . Sample resistor values for
V
IN
– V
OUT
< 0.5V and multiple low ESR capacitorscommon output voltages are shown in Figure 2 . For
are in parallel, ringing may occur when the product ofbest accuracy, make the parallel combination of R
1
C
OUT
and total ESR drops below 50n ΩF. Total ESRand R
2
approximately 19k Ω.
includes all parasitic resistances, including capacitorESR and board, socket, and solder joint resistance.In most applications, the sum of capacitor ESR andtrace resistance will meet this requirement.
A precision band-gap reference is used to generatethe internal reference voltage, V
REF
. This reference isthe dominant noise source within the TPS736xx andit generates approximately 32µV
RMS
(10Hz to100kHz) at the reference output (NR). The regulatorcontrol loop gains up the reference noise with thesame gain as the reference voltage, so that the noisevoltage of the regulator is approximately given by:Figure 31. Typical Application Circuit forFixed-Voltage Versions
Since the value of V
REF
is 1.2V, this relationshipreduces to:
for the case of no C
NR
.
An internal 27k Ωresistor in series with the noisereduction pin (NR) forms a low-pass filter for thevoltage reference when an external noise reductioncapacitor, C
NR
, is connected from NR to ground. ForC
NR
= 10nF, the total noise in the 10Hz to 100kHzbandwidth is reduced by a factor of ~3.2, giving theapproximate relationship:Figure 32. Typical Application Circuit forAdjustable-Voltage Versions
for C
NR
= 10nF.
11
www.ti.com
Board Layout Recommendation to Improve
Transient Response
Internal Current Limit
Shutdown
(Fixed Voltage Versio n)
dVdt VOUT
COUT 80kRLOAD
(4)
Dropout Voltage
(Adjustable Voltage Version)
dVdt VOUT
COUT 80k(R1R2)RLOAD
(5)
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
This noise reduction effect is shown as RMS Noise For large step changes in load current, the TPS736xxVoltage vs C
NR
in the Typical Characteristics section. requires a larger voltage drop from V
IN
to V
OUT
toavoid degraded transient response. The boundary ofThe TPS73601 adjustable version does not have the
this transient dropout region is approximately twicenoise-reduction pin available. However, connecting a
the dc dropout. Values of V
IN
- V
OUT
above this linefeedback capacitor, C
FB
, from the output to the FB
insure normal transient response.pin will reduce output noise and improve load transi-ent performance. Operating in the transient dropout region can causean increase in recovery time. The time required toThe TPS736xx uses an internal charge pump to
recover from a load transient is a function of thedevelop an internal supply voltage sufficient to drive
magnitude of the change in load current rate, the ratethe gate of the NMOS pass element above V
OUT
. The
of change in load current, and the available head-charge pump generates ~250µV of switching noise at
room (V
IN
to V
OUT
voltage drop). Under worst-case~4MHz; however, charge-pump noise contribution is
conditions [full-scale instantaneous load change withnegligible at the output of the regulator for most
(V
IN
- V
OUT
) close to dc dropout levels], the TPS736xxvalues of I
OUT
and C
OUT
.
can take a couple of hundred microseconds to returnto the specified regulation accuracy.
PSRR and Noise PerformanceTo improve ac performance such as PSRR, output
The low open-loop output impedance provided by thenoise, and transient response, it is recommended that
NMOS pass element in a voltage follower configur-the board be designed with separate ground planes
ation allows operation without an output capacitor forfor V
IN
and V
OUT
, with each ground plane connected
many applications. As with any regulator, the additiononly at the GND pin of the device. In addition, the
of a capacitor (nominal value 1µF) from the output pinground connection for the bypass capacitor should
to ground will reduce undershoot magnitude butconnect directly to the GND pin of the device.
increase duration. In the adjustable version, theaddition of a capacitor, C
FB
, from the output to theadjust pin will also improve the transient response.The TPS736xx internal current limit helps protect the
The TPS736xx does not have active pull-down whenregulator during fault conditions. Foldback helps to
the output is over-voltage. This allows applicationsprotect the regulator from damage during output
that connect higher voltage sources, such as alter-short-circuit conditions by reducing current limit when
nate power supplies, to the output. This also resultsV
OUT
drops below 0.5V. See Figure 11 in the Typical
in an output overshoot of several percent if loadCharacteristics section for a graph of I
OUT
vs V
OUT
.
current quickly drops to zero when a capacitor isconnected to the output. The duration of overshootcan be reduced by adding a load resistor. Theovershoot decays at a rate determined by outputThe Enable pin is active high and is compatible with
capacitor C
OUT
and the internal/external load resist-standard TTL-CMOS levels. V
EN
below 0.5V (max)
ance. The rate of decay is given by:turns the regulator off and drops the ground pincurrent to approximately 10nA. When shutdown capa-bility is not required, the Enable pin can be connectedto V
IN
. When a pull-up resistor is used, and operationdown to 1.8V is required, use pull-up resistor valuesbelow 50k Ω.
The TPS736xx uses an NMOS pass transistor toachieve extremely low dropout. When (V
IN
- V
OUT
) isless than the dropout voltage (V
DO
), the NMOS passdevice is in its linear region of operation and theinput-to-output resistance is the R
DS-ON
of the NMOSpass element.
12
www.ti.com
Reverse Current
Power Dissipation
Thermal Protection
PD(VIN VOUT)IOUT
(6)
Package Mounting
TPS736xx
SBVS038K – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
expected ambient temperature and worst-case load.
The NMOS pass element of the TPS736xx provides The internal protection circuitry of the TPS736xx hasinherent protection against current flow from the been designed to protect against overload conditions.output of the regulator to the input when the gate of It was not intended to replace proper heat sinking.the pass device is pulled low. To ensure that all Continuously running the TPS736xx into thermalcharge is removed from the gate of the pass element, shutdown will degrade reliability.the enable pin must be driven low before the inputvoltage is removed. If this is not done, the passelement may be left on due to stored charge on the
The ability to remove heat from the die is different forgate.
each package type, presenting different consider-After the enable pin is driven low, no bias voltage is
ations in the PCB layout. The PCB area around theneeded on any pin for reverse current blocking. Note
device that is free of other components moves thethat reverse current is specified as the current flowing
heat from the device to the ambient air. Performanceout of the IN pin due to voltage applied on the OUT
data for JEDEC low and high K boards are shown inpin. There will be additional current flowing into the
the Power Dissipation Ratings table. Using heavierOUT pin due to the 80k Ωinternal resistor divider to
copper will increase the effectiveness in removingground (see Figure 1 and Figure 2 ).
heat from the device. The addition of platedthrough-holes to heat-dissipating layers will also im-For the TPS73601, reverse current may flow when
prove the heat-sink effectiveness.V
FB
is more than 1.0V above V
IN
.
Power dissipation depends on input voltage and loadconditions. Power dissipation is equal to the productof the output current times the voltage drop acrossThermal protection disables the output when the
the output pass element (V
IN
to V
OUT
):junction temperature rises to approximately 160°C,allowing the device to cool. When the junction tem-perature cools to approximately 140°C, the output
Power dissipation can be minimized by using thecircuitry is again enabled. Depending on power dissi-
lowest possible input voltage necessary to assure thepation, thermal resistance, and ambient temperature,
required output voltage.the thermal protection circuit may cycle on and off.This limits the dissipation of the regulator, protectingit from damage due to overheating.
Any tendency to activate the thermal protection circuit
Solder pad footprint recommendations for theindicates excessive power dissipation or an inad-
TPS736xx are presented in Application Bulletinequate heat sink. For reliable operation, junction
Solder Pad Recommendations for Surface-Mount De-temperature should be limited to 125°C maximum. To
vices (AB-132), available from the Texas Instrumentsestimate the margin of safety in a complete design
web site at www.ti.com .(including heat sink), increase the ambient tempera-ture until the thermal protection is triggered; useworst-case loads and signal conditions. For goodreliability, thermal protection should trigger at least35°C above the maximum expected ambient con-dition of your application. This produces a worst-casejunction temperature of 125°C at the highest
13
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS73601DBVR ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73601DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73601DBVT ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73601DBVTG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73601DCQ ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73601DCQG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73601DCQR ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73601DCQRG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) Call TI Level-2-260C-1 YEAR
TPS73601DRBR ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73601DRBRG4 ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73601DRBT ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73601DRBTG4 ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS736125DRBR ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS736125DRBRG4 ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS736125DRBT ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS736125DRBTG4 ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73615DBVR ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73615DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73615DBVT ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73615DBVTG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73615DCQ ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73615DCQG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73615DCQR ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73615DCQRG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73615DRBR ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 24-Feb-2006
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS73615DRBRG4 ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73615DRBT ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73615DRBTG4 ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73618DBVR ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73618DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73618DBVT ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73618DBVTG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73618DCQ ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73618DCQR ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73618DCQRG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73625DBVR ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73625DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73625DBVT ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73625DBVTG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73625DCQ ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73625DCQG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73625DCQR ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73625DCQRG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) Call TI Level-2-260C-1 YEAR
TPS73630DBVR ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73630DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73630DBVT ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73630DBVTG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73630DCQ ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73630DCQG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73630DCQR ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73630DCQRG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 24-Feb-2006
Addendum-Page 2
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS73632DBVR ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73632DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73632DBVT ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73632DBVTG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73633DBVR ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73633DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73633DBVT ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73633DBVTG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73633DCQ ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73633DCQG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73633DCQR ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73633DCQRG4 ACTIVE SOT-223 DCQ 6 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73633DRBR ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73633DRBRG4 ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73633DRBT ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73633DRBTG4 ACTIVE SON DRB 8 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73643DBVR ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73643DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73643DBVT ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS73643DBVTG4 ACTIVE SOT-23 DBV 5 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
PACKAGE OPTION ADDENDUM
www.ti.com 24-Feb-2006
Addendum-Page 3
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 24-Feb-2006
Addendum-Page 4
IMPORTANT NOTICE
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