DEMO CIRCUIT 1348A QUICK START GUIDE LT3587EUD LT3587EUD High Voltage Monolithic Inverter and Dual Boost DESCRIPTION Demonstration Circuit 1348 is a single chip solution for applications requiring two positive and one negative high voltage supplies. The input may be a USB input or a Li-Ion battery equivalent power source. The LT3587EUD is available in a 20-lead (3mm x 3mm) QFN surface mount package with exposed ground pad. Design files for this circuit board are available. Call the LTC factory. L, LTC, LTM, LT, Burst Mode, OPTI-LOOP, Over-The-Top and PolyPhase are registered trademarks of Linear Technology Corporation. Adaptive Power, C-Load, DirectSense, Easy Drive, FilterCAD, Hot Swap, LinearView, Module, Micropower SwitcherCAD, Multimode Dimming, No Latency , No Latency Delta-Sigma, No RSENSE, Operational Filter, PanelProtect, PowerPath, PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT, UltraFast and VLDO are trademarks of Linear Technology Corporation. Other product names may be trademarks of the companies that manufacture the products. PERFORMANCE SUMMARY Specifications are at TA = 25C SYMBOL VIN VOUT1 VOUT2 VOUT3 ILIM PARAMETER Bus Input Voltage Range Output Voltage Range Output Voltage Range Output Voltage Voltage VOUT3 Current Limit CONDITIONS IOUT1 0mA to 50mA IOUT2 0mA to 100mA IOUT3 0mA to ILIM3 RILIM equals 8.04k MIN 2.5 14.25 -7.5 23.5 18 TYP MAX 6.0 15.75 -8.5 26.0 22 UNITS V V V V mA OPERATING PRINCIPLES All three channels of the LT3587 use a constant frequency, current mode control scheme to provide voltage and/or current regulation at the output. Operation can be best understood by referring to the Block Diagram in Figure 1 of the LT3587 Data Sheet. If EN/SS1 is pulled higher than 200mV, the bandgap reference, the start-up bias and the oscillator are turned on. At the start of each oscillator cycle, the SR latch X1 is set, which turns on the power switch Q1. A voltage proportional to the switch current is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM comparator A3. When this voltage exceeds the level at the negative input of A3, the SR latch X1 is reset, turning off the power switch Q1. The level at the negative input of A3 is set by the error amplifier A1, which is simply an amplified version of the difference between the reference of 1.24V and the feedback voltage. In this manner, the error amplifier sets the correct peak current level to keep the output voltage in regulation. If the error amplifier output increases, more current is delivered to the output: if decreased, less current is delivered. The second channel is an inverting converter. This channel is also enabled through the EN/SS1 pin. The basic operation of this second channel is the same as the positive channel. The SR latch X2 is also set at the start of each oscillator cycle. The power switch Q2 is turned on at the same time as 1 LT3587EUD Q1. Q2 turns off based on its own feedback loop, which consists of error amplifier A2 and PWM comparator A4. The reference voltage of this negative channel is ground. Similar to the first channel, the third channel is also a positive boost regulator. If EN/SS3 is pulled higher than 300mV, the bandgap reference, the start-up bias and the oscillators are also turned on. The SR latch X3 is set at the start of each oscillator cycle which turns on the power switch Q3. Q3 turns off based on its own feedback loop, which consists of error amplifier A5 and PWM comparator A6. The level at the negative input of A6 is set by the error ampliFer A5, and is an amplified version of the difference between the reference voltage of 0.8V and the maximum of the two feedback voltages at VFB3 and IFB3. A separate comparator (not shown) sets the maximum current limit on Q3. The IFB3 pin is pulled up internally with a current that is (1/200) times the load current out of the VOUT3 pin. Therefore, an external resistor connected from this pin to ground generates a feedback voltage proportional to the VOUT3 output load current at the IFB3 pin. When the voltage at VFB3 is higher than the voltage at IFB3, the third channel regulates to the feedback voltage at VFB3, which in normal applications is a divided down voltage from VOUT3. In this state, the third channel behaves as a boost voltage regulator. On the other hand if the voltage at IFB3 is higher, the third channel regulates to the feedback voltage at IFB3, which therefore regulates the VOUT3 output load current to a particular value. In this state, the third channel behaves as a boost current regulator. PMOS M1 is used as an output disconnect pass transistor for the first channel. M1 disconnects the load (VOUT1) from the input as long as the voltage between CAP1 and VIN is less than 2.5V (typ) and the voltage between CAP1 and VOUT1 is less than 10V (typ). Similarly, PMOS M3 is used as an output disconnect pass transistor for the third channel. M3 disconnects the load (VOUT3) from the input when the third channel is in shutdown (EN/SS3 voltage is lower than 200mV) and the voltage between CAP3 and VOUT3 is less than 10V (typ). 2 VOUT1 Output Ripple and Vsw1 Node VOUT2 Output Ripple, Vsw2 and D6 Anode Nodes VOUT3 Output Ripple and Vsw3 Node LT3587EUD QUICK START PROCEDURE Using short twisted pair leads for any power connections, with all loads and power supplies off, refer to Figure 1 for the proper measurement and equipment setup. Follow the procedure below: 1. Jumper, PS and LOAD Settings to start: JP1 = VIN PS1 = OFF JP2 (EN/SS1) = 0 LOAD1 = OFF JP3 (EN/SS3) = 0 LOAD2 = OFF JP4 (PULL UP) = VIN LOAD3 = OFF JP5 (FLT#) = 1 JP6 = VS JP7 (IREG) = ON JP8 = PWM 2. Turn on PS1 and slowly increase voltage to 2.5V while monitoring the input current. If the current remains less than 50mA, increase PS1 to 4.0V and proceed to step 3. 3. Set JP2 (EN/SS1) to 1 and set LOAD1 to 5mA and LOAD2 to 10mA. Verify voltage on VOUT1 and VOUT2 are within the ranges of the Performance Summary. 4. Set LOAD1 to 50mA and LOAD2 to 100mA. Verify the voltages on VOUT1 and VOUT2 are within the ranges of the Performance Summary. Set LOAD1 to 5mA and LOAD2 to 10mA. 5. Set JP2 (EN/SS1) to 0, set JP3 (EN/SS3) to 1 and set LOAD3 to 2mA. Verify the vol- tage on VOUT3 is within the range of the Performance Summary. 6. Set LOAD3 to 15mA and verify the voltage on VOUT3 is within the range of the Performance Summary. 7. Increase LOAD3 until VOUT3 drops below 23.0V and verify IOUT3 is within the range of ILIM of the Performance Summary. 8. Set LOAD3 to 2mA. Connect a jumper from the VIN turret to the PWM turret and verify that the six LED's are on. 9. Remove the jumper from the VIN turret to the PWM turret, set JP8 to ON and verify that the six LED's are on. Turn PS1 off. 10. Connect a jumper from the VIN turret to the BAT turret. Set JP1 to BAT, turn PS1 on and verify that the six LED's are on. 11. Set JP5 (FLT#) to 0 and then return JP5 (FLT#) to 1, verify that the FLT# LED is on and that the six LED's are off. 12. Turn off PS1. Remove the jumper from VIN turret to BAT turret, Set JP1 to VIN and JP8 to PWM. 13. Set JP2 (EN/SS1) and JP3 (EN/SS3) to 0. Turn on PS1 and set to 4.0V. Verify VOUT1, VOUT2 and VOUT3 are off. 14. Set JP2 (EN/SS1) and JP3 (EN/SS3) to 1. Verify VOUT1, VOUT2 and VOUT3. 15. Turn off PS1. 3 LT3587EUD Figure 1. Proper Measurement Equipment Setup 4 LT3587EUD Figure 2: Schematic diagram 5 LT3587EUD Bill of Materials 6