HEXFET® Power MOSFET
PD - 95724
lGeneration V Technology
lUltra Low On-Resistance
lN-Channel Mosfet
lSurface Mount
lAvailable in Tape & Reel
lDynamic dv/dt Rating
lFast Switching
lLead-Free
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The SO-8 has been modified through a customized
leadframe for enhanced thermal characteristics and
multiple-die capability making it ideal in a variety of
power applications. With these improvements, multiple
devices can be used in an application with dramatically
reduced board space. The package is designed for
vapor phase, infra red, or wave soldering techniques.
Power dissipation of greater than 0.8W is possible in
a typical PCB mount application.
IRF7401PbF
SO-8
VDSS = 20V
RDS(on) = 0.022Ω
Parameter Max. Units
ID @ TA = 25°C 10 Sec. Pulsed Drain Current, VGS @ 4.5V 10
ID @ TA = 25°C Continuous Drain Current, VGS @ 4.5V 8.7
ID @ TA = 70°C Continuous Drain Current, VGS @ 4.5V 7.0
IDM Pulsed Drain Current 35
PD @TA = 25°C Power Dissipation 2.5 W
Linear Derating Factor 0.02 W/°C
VGS Gate-to-Source Voltage ± 12 V
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJ, TSTG Junction and Storage Temperature Range -55 to + 150 °C
Absolute Maximum Ratings
A
Top View
8
1
2
3
45
6
7
D
D
D
DG
S
A
S
S
A
8/10/04
Thermal Resistance Ratings
Parameter Typ. Max. Units
RθJA Maximum Junction-to-Ambient 50 °C/W
IRF7401PbF
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 20   V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆T
JBreakdown Voltage Temp. Coefficient  0.044  V/°C Reference to 25°C, ID = 1mA
  0.022 VGS = 4.5V, ID = 4.1A
  0.030 VGS = 2.7V, ID = 3.5A
VGS(th) Gate Threshold Voltage 0.70   V VDS = VGS, ID = 250µA
gfs Forward Transconductance 11   S VDS = 15V, ID = 4.1A
  1.0 VDS = 16V, VGS = 0V
  25 VDS = 16V, VGS = 0V, TJ = 125 °C
Gate-to-Source Forward Leakage   100 VGS = 12V
Gate-to-Source Reverse Leakage   -100 VGS = -12V
QgTotal Gate Charge   48 ID = 4.1A
Qgs Gate-to-Source Charge   5.1 nC VDS = 16V
Qgd Gate-to-Drain ("Miller") Charge   20 VGS = 4.5V, See Fig. 6 and 12
td(on) Turn-On Delay Time  13  VDD = 10V
trRise Time  72  ID = 4.1A
td(off) Turn-Off Delay Time  65  RG = 6.0Ω
tfFall Time  92  RD = 2.4Ω, See Fig. 10
Between lead tip
and center of die contact
Ciss Input Capacitance  1600  VGS = 0V
Coss Output Capacitance  690  pF VDS = 15V
Crss Reverse Transfer Capacitance  310  = 1.0MHz, See Fig. 5
Notes:
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage   1.0 V TJ = 25°C, IS = 2.0A, VGS = 0V
trr Reverse Recovery Time  39 59 ns TJ = 25°C, IF = 4.1A
Qrr Reverse RecoveryCharge  42 63 nC di/dt = 100A/µs
ton Forward Turn-On Time
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 4.1A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Source-Drain Ratings and Characteristics
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
  35
  3.1
A
S
D
G
IGSS
IDSS Drain-to-Source Leakage Current
LSInternal Source Inductance  4.0 
LDInternal Drain Inductance  2.5 
nH
ns
nA
µA
Ω
RDS(ON) Static Drain-to-Source On-Resistance
S
D
G
Surface mounted on FR-4 board, t ≤ 10sec.
IRF7401PbF
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics
1
10
100
1000
0.1 1 10 10
0
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
20µs PU LSE WIDTH
T = 25°C
A
VGS
TOP 7.5 V
5.0V
4.0V
3.5V
3.0V
2.5V
2.0V
BOTTOM 1.5V
1.5V
A
1
10
100
1000
0.1 1 10 10
0
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
A
VGS
TOP 7.5V
5.0V
4.0V
3.5V
3.0V
2.5V
2.0V
BOTTOM 1.5V
1.5V
20µs PU LSE WIDTH
T = 150°C
J
1
10
100
1000
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
T = 25°C
T = 150°C
J
J
GS
V , Gate-to- Sourc e Volta ge (V )
D
I , Drain-to-Source Current (A)
A
V = 15V
20µs PULSE WIDT H
DS
0.0
0.5
1.0
1.5
2.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
A
V = 4.5V
GS
I = 6.9A
D
IRF7401PbF
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
0
500
1000
1500
2000
2500
3000
1 10 100
C, Capacitance (pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
2
4
6
8
10
0 1020304050
Q , Total Gate Charge (nC)
G
V , Gate-to-Source Voltage (V)
GS
A
FOR TEST CIRCUIT
SEE FIGURE 12
I = 4 .1A
V = 16V
D
DS
0.1
1
10
100
0.0 1.0 2.0 3.0 4.
T = 25°C
T = 150°C
J
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , Reverse Drain Curren t (A )
SD
SD
1
10
100
0.1 1 10 100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T = 150 C
= 25 C
°°
J
A
V , Drain-to-Source V oltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
100us
1ms
10ms
IRF7401PbF
0.1
1
10
100
0.0001 0.001 0.01 0.1 1 10 100
Notes:
1. D u ty fa cto r D = t / t
2. Peak T =P x Z + T
1 2
JDM thJA A
P
t
t
DM
1
2
t , R ectangular P ulse Dur ati on ( s ec)
Thermal Response (Z )
1
thJA
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
Fig 10a. Switching Time Test Circuit
+
-
V
DS
9
0%
1
0%
V
GS t
d(on)
t
r
t
d(off)
t
f
VDS
4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 9. Maximum Drain Current Vs.
Ambient Temperature
Fig 10b. Switching Time Waveforms
RD
VGS
VDD
RG
D.U.T.
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
25 50 75 100 125 150
0.0
2.0
4.0
6.0
8.0
10.0
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
IRF7401PbF
Fig 12a. Basic Gate Charge Waveform Fig 12b. Gate Charge Test Circuit
D.U.T. V
D
S
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
QG
QGS QGD
V
G
Charge
4.5V
IRF7401PbF
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
R
e-Applied
V
oltage
Reverse
Recovery
Current Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
RG
VDD
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
* Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
*
VGS*
**
Peak Diode Recovery dv/dt Test Circuit
[ ]
[ ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[ ] ***
Fig 13. For N-Channel HEXFETS
IRF7401PbF
SO-8 Package Outline
Dimensions are shown in millimeters (inches)
SO-8 Part Marking
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASIC
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX MILLIMETERSINCHES MIN MAX
DIM
8°
e
c .0075 .0098 0.19 0.25
.025 BASIC 0.635 BASIC
87
5
65
D B
E
A
e
6X
H
0.25 [.010] A
6
7
K x 4 5°
8X L 8X c
y
0.25 [.010] C A B
e1 A
A1
8X b
C
0.10 [.004]
4312
FOOTPRINT
8X 0.72 [.028]
6.46 [.255]
3X 1.27 [.050]
4. OUT LINE CONFORMS T O JEDEC OUT LINE MS -012AA.
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
8X 1.78 [.070
]
DATE CODE (YWW)
XXXX
INTERNATIONAL
RECTIFIER
LOGO
F7101
Y = LAST DIGIT OF THE YEAR
PART NUMBER
LOT CODE
WW = WEEK
EXAMPLE: THIS IS AN IRF7101 ( MOSFET)
P = DE S IGNAT ES L EAD-F REE
PRODUCT (OPTIONAL)
A = ASSEMBLY SITE CODE
IRF7401PbF
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONT RO L LING DIM ENSIO N : MIL L IMETER.
2. OUTLINE CONFORMS TO EIA-4 81 & EIA-541.
FE ED DIRECTI O N
TE RM INAL NUMBER 1
12.3 ( .4 8 4 )
11.7 ( .4 6 1 )
8.1 ( . 318 )
7.9 ( . 312 )
N
OTES:
1
. CONTROLLIN G DIMENSION : MILLIMETER.
2
. ALL DIMEN SIONS ARE SHOWN IN MILLIMETERS(INCHES).
3
. OUTLINE CONFORMS TO EIA-481 & EIA-541.
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualifications Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/04