Features
•Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage dV/dt immune
•Application-specific gate drive range:
Motor Drive: 12 V to 20 V (IRS2127/IRS2128)
Automotive: 9 V to 20 V (IRS21271/IRS21281)
•Undervoltage lockout
•3.3 V, 5 V, and 15 V input logic compatible
•FAULT lead indicates shutdown has occured
• Output in phase with input (IRS2127/IRS21271)
•Output out of phase with input (IRS2128/IRS21281)
CURRENT SENSING SINGLE CHANNEL DRIVER
VOFFSET 600 V max.
IO+/- 200 mA / 420 mA
VOUT 12 V - 20V 9 V - 20 V
(IRS2127/IR2128) (IRS21271/IR21281)
VCSth 250 mV or 1.8 V
t
on/off (typ.) 150 ns & 150 ns
Typical Connection
www.irf.com 1
Packages
IRS2127/IRS21271
IRS2128/IRS21281
8-Lead PDIP 8-Lead SOIC
IRS212(7, 71, 8, 81)(S)PbF
Data Sheet No. PD60299
Description
The IRS2127/IRS2128/IRS21271/IRS21281 are
high voltage, high speed power MOSFET and IGBT
drivers. Proprietary HVIC and latch immune CMOS
technologies enable ruggedized monolithic construc-
tion. The logic input is compatible with standard
CMOS or LSTTL outputs, down to 3.3 V. The protec-
tion circuity detects over-current in the driven power
transistor and terminates the gate drive voltage. An
open drain FAULT signal is provided to indicate that
an over-current shutdown has occurred. The output
Product Summary
VCC VB
CS
HO
VS
COM
IN
FAULT
VCC
IN
FAULT
VCC VB
CS
HO
VS
COM
IN
FAULT
VCC
IN
FAULT
(Refer to Lead Assignments for correct pin configuration).
These diagrams show electrical connections only. Please
refer to our Application Notes and DesignTips for proper
circuit board layout.
driver features a high pulse current buffer stage designed for minimum cross-conduction. The floating chan-
nel can be used to drive an N-channel power MOSFET or IGBT in the high-side or low-side configuration which
operates up to 600 V.
• RoHS compliant
IRS212(7, 71, 8, 81)(S)PbF
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Symbol Definition Min. Max. Units
VBHigh-side floating supply voltage -0.3 625
VSHigh-side floating offset voltage VB - 25 VB + 0.3
VHO High-side floating output voltage VS - 0.3 VB + 0.3
VCC Logic supply voltage -0.3 25 V
VIN Logic input voltage -0.3 VCC + 0.3
VFLT FAULT output voltage -0.3 VCC + 0.3
VCS Current sense voltage VS - 0.3 VB + 0.3
dVs/dt Allowable offset supply voltage transient — 50 V/ns
PDPackage power dissipation @ TA ≤ +25 °C 8-Lead DIP — 1.0
8-Lead SOIC — 0.625
RthJA Thermal resistance, junction to ambient 8-Lead DIP — 125
8-Lead SOIC — 200
TJJunction temperature — 150
TSStorage temperature -55 150
TLLead temperature (soldering, 10 seconds) — 300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
VBHigh-side floating supply voltage (IRS2127/IRS2128) VS + 12 VS + 20
(IRS21271/IRS21281) VS + 9 VS + 20
VSHigh-side floating offset voltage Note 1 600
VHO High-side floating output voltage VSVB
VCC Logic supply voltage 10 20
VIN
Logic input voltage 0 VCC
VFLT FAULT output voltage 0 VCC
VCS Current sense signal voltage VSVS + 5
TAAmbient temperature -40 125 °C
Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15 V differential.
°C/W
W
°C
V
www.irf.com 3
IRS212(7, 71, 8, 81)(S)PbF
Symbol Definition Min. Typ.Max.Units Test Conditions
VIH Logic “1” input voltage (IRS2127/IRS21271)
Logic “0” input voltage (IRS2128/IRS21281)
VIL Logic “0” input voltage (IRS2127/IRS21271)
Logic “1” input voltage (IRS2128/IRS21281)
VCSTH+ CS input positive (IRS2127/IRS2128) 180 250 320 mV
going threshold (IRS21271/IRS21281) 1.5 1.8 2.1
VOH
High level output voltage, VBIAS - VO
— 0.05 0.2
VOL
Low level output voltage, VO
— 0.02 0.1
ILK
Offset supply leakage current — — 50 VB = VS = 600 V
IQBS
Quiescent VBS supply current — 300 800
IQCC
Quiescent VCC supply current — 60 120
IIN+
Logic “1” input bias current — 7.0 15
VIN = 5 V
IIN-
Logic “0” input bias current — — 5.0 VIN = 0 V
ICS+
“High” CS bias current — — 5.0 VCS = 3 V
ICS-
“High” CS bias current — — 5.0 VCS = 0 V
VBSUV+ VBS supply undervoltage (IRS2127/IRS2128) 8.8 10.3 11.8
positive going threshold (IRS21271/IRS21281) 6.3 7.2 8.2
VBSUV- VBS supply undervoltage (IRS2127/IRS2128) 7.5 9.0 10.6
negative going threshold (IRS21271/IRS21281) 6.0 6.8 7.7
IO+
Output high short circuit pulsed current 200 290 —
VO = 0 V, V
IN = 5 V
PW ≤ 10 µs
IO-
Output low short circuit pulsed current 420 600 —
VO = 15 V, V
IN = 0 V
PW ≤ 10 µs
Ron,FLT
FAULT - low on resistance — 125 — Ω
Symbol Definition Min. Typ.Max.Units Test Conditions
ton Turn-on propagation delay — 150 200 VS = 0 V
toff Turn-off propagation delay — 150 200 VS = 600 V
trTurn-on rise time — 80 130
tfTurn-off fall time — 40 65 ns
tbl Start-up blanking time 550 750 950
tcs CS shutdown propagation delay — 65 360
tflt CS to FAULT pull-up propagation delay — 270 510
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25 °C unless otherwise specified. The dynamic electrical characteristics
are measured using the test circuit shown in Fig. 3.
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15 V and TA = 25 °C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to VS.
2.5 — —
VIN = 0 V or 5 V
µA
mA
V
V
— — 0.8
VCC = 10 V to 20 V
IO = 2 mA
V
IRS212(7, 71, 8, 81)(S)PbF
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Functional Block Diagram IRS2127/IRS21271
DOWN
SHIFTER
PULSE
GEN
UV
DETECT
PULSE
FILTER
PULSE
GEN
BUFFER
HV
LEVEL
VB
HO
VS
CS
R
S
R Q
VCC
IN
UP
SHIFTERS
COM
FAULT -
+
PULSE
FILTER
VB
DELAY
S
Q R
Q R
S
SHIFT
Functional Block Diagram IRS2128/IRS21281
DOWN
SHIFTER
PULSE
GEN
UV
DETECT
PULSE
FILTER
PULSE
GEN
BUFFER
HV
LEVEL
V
B
HO
V
S
CS
R
S
R Q
V
CC
IN
UP
SHIFTERS
COM
FAULT -
+
PULSE
FILTER
V
B
DELAY
S
QR
QR
S
SHIFT
5V
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IRS212(7, 71, 8, 81)(S)PbF
Lead Definitions
Symbol Description
VCC Logic and gate drive supply
IN Logic input for gate driver output (HO), in phase with HO (IRS2127/IRS21271)
out of phase with HO (IRS2128/IRS21281)
Indicates over-current shutdown has occurred, negative logic
COM Logic ground
VBHigh-side floating supply
HO High-side gate drive output
VSHigh-side floating supply return
CS Current sense input to current sense comparator
Lead Assignments
8 Lead PDIP 8 Lead SOIC
IRS2127/IRS21271 IRS2127S/IRS21271S
FAULT
8 Lead PDIP 8 Lead SOIC
IRS2128/IRS21281 IRS2128S/IRS21281S
1
2
3
4
8
7
6
5
VCC
I N
FAULT
COM
VB
HO
CS
VS
1
2
3
4
8
7
6
5
VCC
I N
FAULT
COM
VB
HO
CS
VS
1
2
3
4
8
7
6
5
VCC
I N
FAULT
COM
VB
HO
CS
VS
1
2
3
4
8
7
6
5
VCC
I N
FAULT
COM
VB
HO
CS
VS
IRS212(7, 71, 8, 81)(S)PbF
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Figure 4. CS Shutdown Waveform Definitions
90%
CS VCSTH
tcs
HO
Figure 5. CS to FAULT Waveform Definitions
90%
CS VCSTH
tflt
FAULT
Figure 2. Switching Time Waveform Definition
IN
HO
90% 90%
10% 10%
50%
50%
trtf
ton toff
50% 50%
IN
(IRS2128/
IRS21281)
(IRS2127/
IRS21271)
Figure 1. Input/Output Timing Diagram
HO
CS
IN
FAULT
IN
(IRS2128/
IRS21281)
(IRS2127/
IRS21271)
Figure 3. Start-Up Blanking Time Waveform
Definitions
HO
CS
IN tbl
90%
50%
FAULT
50%
(IRS2127/
IRS21271)
IN
(IRS2128/
IRS21281)
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IRS212(7, 71, 8, 81)(S)PbF
Typ
Max
0
50
100
150
200
250
300
-50 -25 0 25 50 75 100 125
Temperature (°C)
Figure 6A. Turn-On Delay Time vs.
Typ
Max
0
50
100
150
200
250
300
10 12 14 16 18 20
Supply Voltage (V)
Figure 6B. Turn-On Delay Time vs. Voltage
Typ
Max
0
50
100
150
200
250
300
-50 -25 0 25 50 75 100 125
Temperature (°C)
Turn-Off Delay Ti me (ns)
Figure 7A. Turn-Off Delay Time vs.
Typ
Max
0
50
100
150
200
250
10 12 14 16 18 20
Supply Voltage (V)
Figure 7B. Turn-Off Delay Time vs. Voltage
T ur n- O n D elay T ime ( ns )
T ur n- O n D elay T ime ( ns )
Turn-Off Delay Ti me (ns)
Temperature
Temperature
IRS212(7, 71, 8, 81)(S)PbF
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Typ
Max
0
20
40
60
80
100
120
140
160
180
-50 -25 0 25 50 75 100 125
Temperature (°C)
T u r n - O n R i s e Time (ns)
Figure 8A. Turn-On Rise Time vs.
Temperature
Typ
Max
0
20
40
60
80
100
120
140
160
180
10 12 14 16 18 20
Supply Voltage (V)
Figure 8B. Turn-On Rise Time vs. Voltage
Typ
Max
0
10
20
30
40
50
60
70
80
90
-50 -25 0 25 50 75 100 125
Temperature (°C)
Figure 9A. Turn-Off Fall Time vs.
Typ
Max
0
10
20
30
40
50
60
70
80
10 12 14 16 18 20
Supply Voltage (V)
Figure 9B. Turn-Off Fall Time vs. Voltage
Turn- Off Fall Time (n s)
T u r n - O n R i s e Time (ns)
Turn- Off Fall Time (n s)
Temperature
Temperature
Temperature
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IRS212(7, 71, 8, 81)(S)PbF
Min
Typ
Max
0
200
400
600
800
1000
1200
-50 -25 0 25 50 75 100 125
Temperature (°C)
S t a r t - U p B l a n k i n g T i m e ( n s )
Figure 10A. Start-Up Blanking Time vs.
Min
Typ
Max
0
200
400
600
800
1000
1200
10 12 14 16 18 20
Supply Voltage (V)
Figure 10B. Start-Up Blanking Time vs. Voltage
Typ
Max
0
50
100
150
200
250
300
350
400
450
500
-50 -25 0 25 50 75 100 125
Temperature (°C)
CS Shutdown Prop. D elay (ns)
Figure 11A. CS Shutdown Prop. Delay vs.
Typ
Max
0
50
100
150
200
250
300
350
400
10 12 14 16 18 20
Supply Voltage (V)
Figure 11B. CS Shutdown Prop. Delay vs.
S t a r t - U p B l a n k i n g T i m e ( n s )
CS Shutdown Prop. D elay (ns)
Temperature
Temperature
Voltage
IRS212(7, 71, 8, 81)(S)PbF
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Typ
Max
0
100
200
300
400
500
600
700
800
-50 -25 0 25 50 75 100 125
Temperature (°C)
C S t o F A U L T P u l l - U p P r o p . D e l a y ( n s )
Figure 12A. CS to FAULT Pull-Up Prop. Delay
Typ
Max
0
100
200
300
400
500
600
10 12 14 16 18 20
Supply Voltage (V)
Min
0
0.5
1
1.5
2
2.5
3
-50 -25 0 25 50 75 100 125
Temperature (°C)
L o g i c " 1 " ( " 0 " f o r 2 1 2 8 ) V Threshold (V)
I H
Figure 13A. Logic "1" ("0" for 2128) VIH
Threshold
Min
0
0.5
1
1.5
2
2.5
3
10 12 14 16 18 20
Supply Voltage (V)
L o g i c " 1 " ( " 0 " f o r 2 1 2 8 ) V
I H
T hreshold (V)
Figure 13B. Logic "1" ("0" for 2128) VIH
Threshold vs.
C S t o F A U L T P u l l - U p P r o p . D e l a y ( n s )
vs. Temperature vs. Voltage
Figure 12B. CS to FAULT Pull-Up Prop. Delay
Voltagevs. Temperature
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IRS212(7, 71, 8, 81)(S)PbF
Max
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
-50 -25 0 25 50 75 100 125
Temperature (°C)
Logic "0" ("1" for 2128) V IL
Threshold (V)
Figure 14A. Logic "0" ("1" for 2128) VIL
Max
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
10 12 14 16 18 20
Supply Voltage (V)
Logic "0" ("1" for 212 8) V
IL
Threshold (V)
Figure 14B. Logic "0" ("1" for 2128) VIL
Min
Typ
Max
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
-50 -25 0 25 50 75 100 125
Temperature (°C)
CS Input Positive Going Voltage (V)
Figure 15A. CS Input Positive Going Voltage
Min
Typ
Max
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
10 12 14 16 18 20
Supply Voltage (V)
Figure 15B. CS Input Positive Going Voltage vs.
CS Input Positive Going Voltage (V)
Threshold
Threshold vs.
Voltagevs. Temperature
vs. Temperature Voltage
IRS212(7, 71, 8, 81)(S)PbF
www.irf.com 12
Typ
Max
0
0.05
0.1
0.15
0.2
0.25
0.3
-50 -25 0 25 50 75 100 125
Temperature (°C)
H i g h L e v e l O u t p u t ( I O = 2 m A ) ( V)
Figure 16A. High Level Output (IO = 2 mA)
Typ
Max
0
0.05
0.1
0.15
0.2
0.25
10 12 14 16 18 20
Supply Voltage (V)
High Level Output (I
O = 2 m A) (V)
Figure 16B. High Level Output (IO = 2 mA) vs.
Typ
Max
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
-50 -25 0 25 50 75 100 125
Temperature (°C)
Low Level Output (IO = 2 m A ) ( V )
Figure 17A. Low Level Output (IO = 2 mA)
Typ
Max
0
0.02
0.04
0.06
0.08
0.1
0.12
10 12 14 16 18 20
Supply Voltage (V)
Low L evel Output (IO = 2 m A) (V)
Figure 17B. Low Level Output (IO = 2 mA) vs.
vs. Temperature Voltage
vs. Temperature Voltage
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IRS212(7, 71, 8, 81)(S)PbF
Max
0
10
20
30
40
50
60
70
80
90
100
-50 -25 0 25 50 75 100 125
Temperature (°C)
O ff s e t Supply Leak a ge Cur r ent ( µA)
Figure 18A. Offset Supply Leakage
Current vs. Temperature
Max
0
10
20
30
40
50
60
0100 200 300 400 500 600
Supply Voltage (V)
VBS
Supply Current (µA)
Figure 18B. High-Side Floating Well Offset
Supply Leakage vs. Voltage
Typ
Max
0
100
200
300
400
500
600
-50 -25 0 25 50 75 100 125
Temperature (°C)
VB S
Sup ply Current (µA)
Figure 19A. VBS Supply Current vs.
Typ
Max
0
100
200
300
400
500
600
700
10 12 14 16 18 20
Supply Voltage (V)
VBS
Sup ply Current (µA)
Figure 19B. VBS Supply Current vs. Voltage
Temperature
IRS212(7, 71, 8, 81)(S)PbF
www.irf.com 14
Typ
Max
0
20
40
60
80
100
120
140
160
-50 -25 0 25 50 75 100 125
Temperature (°C)
VCC
Supply Current (µA )
Figure 20A. VCC Supply Current vs.
Typ
Max
0
20
40
60
80
100
120
140
160
180
10 12 14 16 18 20
Supply Voltage (V)
VCC
Supp ly Current (µA )
Figure 20B. VCC Supply Current vs. Voltage
Typ
Max
0
2
4
6
8
10
12
14
16
18
20
-50 -25 0 25 50 75 100 125
Temperature (°C)
Logic "1" Input Bias C urrent (µA)
Figure 21A. Logic "1" Input Bias Current vs.
Typ
Max
0
2
4
6
8
10
12
14
16
10 12 14 16 18 20
Supply Voltage (V)
L o g i c " 1 " I n p u t B i a s C u r r e n t ( µ A )
Figure 21B. Logic "1" Input Bias Current vs.
Temperature
Temperature
Voltage
www.irf.com 15
IRS212(7, 71, 8, 81)(S)PbF
Max
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125
Temperature (°C)
Logic "0" Input Bias Current (µA)
Figure 22A. Logic "0" Input Bias Current vs.
Max
0
1
2
3
4
5
6
10 12 14 16 18 20
Supply Voltage (V)
Figure 22B. Logic "0" Input Bias Current vs.
Max
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125
Temperature (°C)
Logic "1" CS Bias Current (µA)
Figure 23A. Logic "1" CS Bias Current vs.
Max
0
1
2
3
4
5
6
10 12 14 16 18 20
Supply Voltage (V)
L o g i c " 1 " C S B i a s C u r r e n t ( µ A )
Figure 23B. Logic "1" CS Bias Current vs.
Logic "0" Input Bias Current (µA)
Voltage
Temperature
Temperature
Voltage
IRS212(7, 71, 8, 81)(S)PbF
www.irf.com 16
Max
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125
Temperature (°C)
Logic "0" CS Bias Current (µA)
Figure 24A. Logic "0" CS Bias Current vs.
Max
0
1
2
3
4
5
6
10 12 14 16 18 20
Supply Voltage (V)
L o g i c " 0 " C S B i a s C u r r e n t ( µ A )
Figure 24B. Logic "0" CS Bias Current vs.
Min
Typ
Max
0
2
4
6
8
10
12
14
-50 -25 0 25 50 75 100 125
Temperature (°C)
VBS
UV T hreshold (+) (V)
Figure 25A. VBS UV Threshold (+) vs.
Min
Typ
Max
0
2
4
6
8
10
12
14
10 12 14 16 18 20
Supply Voltage (V)
VBS
UV T hreshold (+) (V)
Figure 25B. VBS UV Threshold (+) vs. Voltage
Temperature
Temperature
Voltage
IRS212(7, 71, 8, 81)(S)PbF
www.irf.com 17
Min
Typ
Max
0
2
4
6
8
10
12
-50 -25 0 25 50 75 100 125
Temperature (°C)
VBS
UV T hreshold (-) (V)
Figure 26A. VBS UV Threshold (-) vs.
Temperature
Min
Typ
Max
0
2
4
6
8
10
12
10 12 14 16 18 20
Supply Voltage (V)
VBS
UV T hreshold (-) (V)
Figure 26B. VBS UV Threshold (-) vs. Voltage
Min
Typ
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
-50 -25 0 25 50 75 100 125
Temperature (°C)
O u t put So ur c e C u r r e n t ( A)
Figure 27A. Output Source Current vs.
Temperature
Min
Typ
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
10 12 14 16 18 20
Outpu t Sour ce Curr e nt (A)
Supply Voltage (V)
Figure 27B. Output Source Current vs.
Voltage
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IRS212(7, 71, 8, 81)(S)PbF
Min
Typ
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
-50 -25 0 25 50 75 100 125
Temperature (°C)
O u tp ut Sin k C ur r e n t ( A)
Figure 28A. Output Sink Current vs.
Temperature
Min
Typ
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
10 12 14 16 18 20
Supply Voltage (V)
Output Sink Current (A)
Figure 28B. Output Sink Current vs. Voltage
www.irf.com 19
IRS212(7, 71, 8, 81)(S)PbF
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
Case outlines
01-6027
01-0021 11 (MS-012AA)
8-Lead SOIC
8 7
5
6 5
D B
E
A
e
6X
H
0.25 [.010] A
6
431 2
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
7
K x 45°
8X L 8X c
y
FOOTPRINT
8X 0.72 [.028]
6.46 [.255]
3X 1.27 [.050] 8X 1.78 [.070]
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
0.25 [.010] CAB
e1 A
A1
8X b
C
0.10 [.004]
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASIC
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX MILLIMETERSINCHES MIN MAX
DIM
8°
e
c.0075 .0098 0.19 0.25
.025 BASIC 0.635 BASIC
IRS212(7, 71, 8, 81)(S)PbF
www.irf.com 20
CARRIER TAPE DIMENSION FOR 8SOICN
Code Min Max Min Max
A7.90 8.10 0.311 0.318
B 3.90 4.10 0.153 0.161
C 11.70 12.30 0.46 0.484
D5.45 5.55 0.214 0.218
E6.30 6.50 0.248 0.255
F5.10 5.30 0.200 0.208
G1.50 n/a 0.059 n/a
H1.50 1.60 0.059 0.062
Metric Imperial
REEL DIMENSIONS FOR 8SOICN
Code Min Max Min Max
A 329.60 330.25 12.976 13.001
B20.95 21.45 0.824 0.844
C 12.80 13.20 0.503 0.519
D1.95 2.45 0.767 0.096
E 98.00 102.00 3.858 4.015
Fn/a 18.40 n/a 0.724
G 14.50 17.10 0.570 0.673
H 12.40 14.40 0.488 0.566
Metric Imperial
E
F
A
C
D
G
A
BH
NOTE : CONTROLLING
DIMENSION IN MM
LOADED TAPE FEED DIRECTION
A
H
F
E
G
D
B
C
Tape & Reel
8-lead SOIC
www.irf.com 21
IRS212(7, 71, 8, 81)(S)PbF
ORDER INFORMATION
8-Lead PDIP IRS2127PbF
8-Lead PDIP IRS21271PbF
8-Lead SOIC IRS2127SPbF
8-Lead SOIC IRS21271SPbF
8-Lead SOIC Tape & Reel IRS2127STRPbF
8-Lead SOIC Tape & Reel IRS21271STRPbF
LEADFREE PART MARKING INFORMATION
Lead Free Released
Non-Lead Free
Released
Part number
Date code
IRxxxxxx
YWW?
?XXXX
Pin 1
Identifier
IR logo
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
P
?MARKING CODE
S
The SOIC-8 is MSL2 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 6/27/2007
8-Lead PDIP IRS2128PbF
8-Lead PDIP IRS21281PbF
8-Lead SOIC IRS2128SPbF
8-Lead SOIC IRS21281SPbF
8-Lead SOIC Tape & Reel IRS2128STRPbF
8-Lead SOIC Tape & Reel IRS21281STRPbF
