TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Power-On Reset Generator
D
Automatic Reset Generation After
Voltage Drop
D
RESET Output Defined From VCC ≥ 1 V
D
Precision Voltage Sensor
D
Temperature-Compensated Voltage
Reference
D
True and Complement Reset Outputs
D
Externally Adjustable Pulse Duration
3212019
910111213
4
5
6
7
8
18
17
16
15
14
NC
SENSE
NC
RESET
NC
NC
RESIN
NC
CT
NC
TL7705BM ...FK PACKAGE
(TOP VIEW)
NC
REF
NC
RESET
NC V
NC
NC
GND
NC
CC
1
2
3
4
8
7
6
5
REF
RESIN
CT
GND
VCC
SENSE
RESET
RESET
TL77xxBC ...D OR P PACKAGE
TL7705BM . . . JG PACKAGE
TL7705BQ ...D PACKAGE
(TOP VIEW) 1
2
3
4
5
10
9
8
7
6
NC
REF
RESIN
CT
GND
NC
VCC
SENSE
RESET
RESET
TL7705BM ...U PACKAGE
(TOP VIEW)
NC – No internal connection
NC – No internal connection
description/ordering information
The TL7702B, TL7705B, and TL7733B are integrated-circuit supply-voltage supervisors designed for use as
reset controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the
supply for undervoltage conditions at the SENSE input. During power up, the RESET output becomes active
(low) when VCC attains a value approaching 1 V . As VCC approaches 3 V (assuming that SENSE is above VT+),
the delay-timer function activates a time delay, after which outputs RESET and RESET go inactive (high and
low, respectively). When an undervoltage condition occurs during normal operation, outputs RESET and
RESET go active. To ensure that a complete reset occurs, the reset outputs remain active for a time delay after
the voltage at the SENSE input exceeds the positive-going threshold value. The time delay is determined by
the value of the external capacitor CT: td ≈ 2.6 × 104 × CT, where CT is in farads (F) and td is in seconds (s).
An external capacitor (typically 0.1 µF) must be connected to REF to reduce the influence of fast transients in
the supply voltage.
The TL7702BC, TL7705BC, and TL7733BC are characterized for operation from 0°C to 70°C. The TL7702BI,
TL7705BI, and TL7733BI are characterized for operation from –40°C to 85°C. The TL7705BQ is characterized
for operation from –40°C to 125°C. The TL7705BM is characterized for operation from –55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
The TL7705BM is obsolete
and no longer is supplied.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued)
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP (P) T ube of 50 TL7702BCP TL7702BCP
SOIC (D)
T ube of 75 TL7702BCD
7702BC
SOIC
(D)
Reel of 2500 TL7702BCDR
7702BC
PDIP (P) T ube of 50 TL7705BCP TL7705BCP
0°C to 70°C
SOIC (D)
T ube of 75 TL7705BCD
7705BC
SOIC
(D)
Reel of 2500 TL7705BCDR
7705BC
PDIP (P) T ube of 50 TL7733BCP TL7733BCP
SOIC (D)
T ube of 75 TL7733BCD
7733BC
SOIC
(D)
Reel of 2500 TL7733BCDR
7733BC
PDIP (P) T ube of 50 TL7702BIP TL7702BIP
SOIC (D)
T ube of 75 TL7702BID
7702BI
SOIC
(D)
Reel of 2500 TL7702BIDR
7702BI
PDIP (P) T ube of 50 TL7705BIP TL7705BIP
–40°C to 85°C
SOIC (D)
T ube of 75 TL7705BID
7705BI
SOIC
(D)
Reel of 2500 TL7705BIDR
7705BI
PDIP (P) T ube of 50 TL7733BIP TL7705BIP
SOIC (D)
T ube of 75 TL7733BID
7733BI
SOIC
(D)
Reel of 2500 TL7733BIDR
7733BI
–40°C to 125°CSOIC (D) T ube of 75 TL7705BQD TL7705BQD
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
The TL7705BM is obsolete
and no longer is supplied.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming
network to adjust the reference voltage and sense-comparator trip point.
RESIN
≈70 µA
R1
(see Note A)
R2
(see Note A)
Reference
Voltage 1
SENSE
GND
VCC
CT
RESET
RESET
REF
8
3
7
2
4
6
5
1
Pin numbers shown are for the D, JG, and P packages.
NOTE A: TL7702B: R1 = 0 Ω, R2 = open, Vx = VREF1
TL7705B: R1 = 23 kΩ, R2 = 10 kΩ, nominal, Vx ≈1.43 V
TL7733B: R1 = 11.3 kΩ, R2 = 10 kΩ, nominal, Vx ≈1.43 V
Reference
Voltage 2
Vx
typical timing diagram
VIT–
RESET
Vres
0
td
0
VCC and
SENSE
td
VIT–VIT+
VIT+
Vres
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
Output
Undefined
ÎÎÎÎ
ÎÎÎÎ
Output
Undefined
The TL7705BM is obsolete
and no longer is supplied.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: RESIN –0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SENSE –0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High-level output current, IOH (RESET) –30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low-level output current, IOL (RESET) 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 2 and 3):D package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
P package 85°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds, TC: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG or U packages 300°C. . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P packages 260°C. . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN MAX UNIT
VCC Supply voltage 3.6 18 V
VIH High-level input voltage RESIN 2 18 V
VIL Low-level input voltage RESIN 0 0.8 V
VIInput voltage SENSE 0 18 V
IOH High-level output current RESET –20 mA
IOL Low-level output current RESET 20 mA
TL77xxBC 0 70
TA
O
p
erating free-air tem
p
erature range
TL77xxBI –40 85 °
C
TA
O erating
free
-
air
tem erature
range
TL7705BQ –40 125
°C
TL7705BM –55 125
The TL7705BM is obsolete
and no longer is supplied.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS
†
TL77xxBC
TL77xxBI
TL7705BQ UNIT
MIN TYP MAX
VOH High-level output voltage, RESET IOH = –16 mA VCC–1.5 V
VOL Low-level output voltage, RESET IOL = 16 mA 0.4 V
Vref Reference voltage, REF Iref = –500 µA, TA = 25°C 2.48 2.53 2.58 V
TL7702B 2.505 2.53 2.555
TL7705B TA = 25°C4.5 4.55 4.6
VIT
Negative-going
in
p
ut threshold voltage
TL7733B 3.03 3.08 3.13
V
IT–
i
npu
t
th
res
h
o
ld
vo
lt
age
a
t
S
EN
S
E inp
u
tTL7702B
‡
2.48 2.53 2.58
at
SENSE
in ut
TL7705B TA = full range
‡
4.45 4.55 4.65
TL7733B
Ag
3 3.08 3.16
H t i SENSE
TL7702B 10
Vh
y
sHysteresis, SENSE
(VIT+
–
VIT )
TL7705B VCC = 3.6 V to 18 V, TA = 25°C30 mV
y
(VIT
+ –
VIT
–
)
TL7733B 10
Vres§Power-up reset voltage IOL at RESET = 2 mA, TA = 25°C 1 V
II
In
p
ut current
RESIN VI = 0.4 V to VCC –10
I
I
Input
current
SENSE TL7702B VI = Vref to 18 V –0.1 –2µ
IOH High-level output current, RESET VO = 18 V, See Figure 1 50 µA
IOL Low-level output current, RESET VO = 0 V, See Figure 1 –50 µA
ICC
Su
pp
ly current
VSENSE = 15 V, RESIN ≥ 2 V 1.8 3
I
CC
Supply
current
VCC = 18 V, TA = full range‡3.5
†All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND.
‡Full range is 0°C to 70°C for the C-suffix devices, –40°C to 85°C for the I-suffix devices, and –40°C to 125°C for the Q-suffix device.
§This is the lowest voltage at which RESET becomes active.
switching characteristics, VCC = 5 V, CT open, TA = 25°C
PARAMETER FROM
(INPUT) TO
(OUTPUT) TEST CONDITIONS
TL77xxBC
TL77xxBI
TL7705BQ UNIT
()
()
MIN TYP MAX
tPLH Propagation delay time from
low- to high-level output RESIN RESET See Figures 1, 2, and 3 270 500 ns
tPHL Propagation delay time from
high- to low-level output RESIN RESET See Figures 1, 2, and 3 270 500 ns
t
Effective
p
ulse duration
RESIN
See Figure 2
150
t
w
Effective
pulse
duration
SENSE
See
Figure
2
100
trRise time
RESET
See Figures 1 and 3
75
tfFall time
RESET
See
Figures
1
and
3
150 200
trRise time
RESET
See Figures 1 and 3
75 150
tfFall time
RESET
See
Figures
1
and
3
50
The TL7705BM is obsolete
and no longer is supplied.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS†
TL7705BM
UNIT
PARAMETER
TEST
CONDITIONS†
MIN TYP MAX
UNIT
VOH High-level output voltage, RESET IOH = –16 mA VCC–1.5 V
VOL Low-level output voltage, RESET IOL = 16 mA 0.4 V
Vref Reference voltage, REF Iref = –500 µA, TA = 25°C 2.48 2.53 2.58 V
TL7702B
TA=25°C
2.505 2.53 2.555
VIT
Negative-going
in
p
ut threshold voltage
TL7705B
T
A =
25°C
4.5 4.55 4.6
V
V
IT–
i
npu
t
th
res
h
o
ld
vo
lt
age
a
t
S
EN
S
E inp
u
tTL7702B
T 55°Cto125°C
2.48 2.53 2.58
V
at
SENSE
in ut
TL7705B
T
A = –
55°C
t
o
125°C
4.45 4.55 4.65
Vh
H
y
steresis, SENSE TL7702B
VCC =36Vto18V
TA=25°C
10
mV
V
hys
y,
(VIT+ – VIT–)TL7705B
V
CC =
3
.
6
V
to
18
V
,
T
A =
25°C
30
mV
Vres‡Power-up reset voltage IOL at RESET = 2 mA, TA = 25°C1 V
II
In
p
ut current
RESIN VI = 0.4 V to VCC –10
µA
I
I
Input
current
SENSE TL7702B VI = Vref to VCC – 1.5 V –0.1 –2µ
A
IOH High-level output current, RESET VO = 18 V 50 µA
IOL Low-level output current, RESET VO = 0 –50 µA
ICC
Su
pp
ly current
VSENSE = 15 V, RESIN ≥ 2 V 1.8 3
mA
I
CC
Supply
current
VCC = 18 V, TA = –55°C to 125°C4
mA
†All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND.
‡This is the lowest value at which RESET becomes active.
switching characteristics, VCC = 5 V, CT open, TA = 25°C
PARAMETER
FROM TO
TEST CONDITIONS
TL7705BM
UNIT
PARAMETER
(INPUT) (OUTPUT)
TEST
CONDITIONS
MIN TYP MAX
UNIT
tPLH Propagation delay time from
low- to high-level output RESIN RESET See Figures 1, 2, and 3 270 500* ns
tPHL Propagation delay time from
high- to low-level output RESIN RESET See Figures 1, 2, and 3 270 500* ns
t
Effective
p
ulse duration
RESIN
See Figure 2
150
ns
t
w
Effective
pulse
duration
SENSE
See
Figure
2
100
ns
trRise time
RESET
See Figures 1 and 3
75*
ns
tfFall time
RESET
See
Figures
1
and
3
150 200*
ns
trRise time
RESET
See Figures 1 and 3
75 150*
ns
tfFall time
RESET
See
Figures
1
and
3
50*
ns
* On products compliant to MIL-PRF-38535, these parameters are not production tested.
The TL7705BM is obsolete
and no longer is supplied.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
15 pF
(see Note B)
RESET
DUT
GND
5 V
RL
(see Note A)
RESET OUTPUT CONFIGURATION
VCC
5 V
DUT
RESET
RESET OUTPUT CONFIGURATION
NOTES: A. For IOL and IOH, RL = 10 kΩ. For all switching characteristics, RL = 511 Ω.
B. This figure includes jig and probe capacitance.
RL
(see Note A) 15 pF
(see Note B)
Figure 1. RESET and RESET Output Configurations
tw5 V
2.5 V
0 V
RESIN SENSE
VT + 2 V
WAVEFORMS
VT – 2 V
VT
tw
Figure 2. Input Pulse Definition
10%
VIT+ VIT–VIT+
0 V
VIH
VIL
2 V
0.8 V
tPLH
50%
50%
10%10%
90%
10%
td
SENSE
Undefined
RESET
Voltage
Fault
tftr
90%
tftd
tr
RESIN
RESET
ÎÎ
ÎÎ
td
tPHL
10%
90% 90% VOH
VOL
Figure 3. Voltage Waveforms
The TL7705BM is obsolete
and no longer is supplied.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 4
14
10
8
6024 6810
t – Assertion Time – ns
18
20
ASSERTION TIME
vs
LOAD RESISTANCE
16
12
RL – Load Resistance – kΩ
VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C
RESET tr
RESET tf
Figure 5
400
200
100
0024 6810
t – Deassertion Time – ns
600
700
DEASSERTION TIME
vs
LOAD RESISTANCE
500
300
RL – Load Resistance – kΩ
VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C
RESET tf
RESET tr
RESET tr
RESET tf
Figure 6
24
18
12
60 25 50 75 100 125
t – Assertion Time – ns
30
36
ASSERTION TIME
vs
LOAD CAPACITANCE
150 175 200
VCC = 5 V
CT = 0.1 µF
RL = 4.7 kΩ
TA = 25°C
RESET tr
RESET tf
CL – Load Capacitance – pF
Figure 7
0.9
0.7
0.5
0.30 25 50 75 100 125
t – Deassertion Time –
1.1
1.3
DEASSERTION TIME
vs
LOAD CAPACITANCE
150 175 200
1.7
1.5
1.9
2.1 VCC = 5 V
CT = 0.1 µF
RL = 4.7 kΩ
TA = 25°C
RESET tf and RESET tr
CL – Load Capacitance – pF
µs
†For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted
plateauing in either output waveform during switching.
The TL7705BM is obsolete
and no longer is supplied.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
VS
10 kΩ
0.1 µF
SENSE
RESIN
GND
REF
RESET
RESET
VCC
CT
To System
RESET
RT
CT
System Supply
Reset Input
(from system)
To System
RESET
(see text)
7
2
1
3
5
6
8
410 kΩ
Figure 8. System Reset Controller With Undervoltage Sensing
When the TL770xB SENSE terminal is used to monitor VCC, a current-limiting resistor in series with CT is
recommended. During normal operation, the timing capacitor is charged by the onboard current source to
approximately VCC or an internal voltage clamp (≈7.1-V Zener), whichever is less. When the circuit then is subjected
to an undervoltage condition during which VCC is rapidly slewed down, the voltage on CT exceeds that on VCC. This
forward biases a secondary path internally, which falsely activates the outputs. A fault is indicated when VCC drops
below V(CT), not when VSENSE falls below VT–.
Texas Instruments performs a 100% electrical screen to verify that the outputs do not switch with 1 mA forced into
the CT terminal. Adding the external resistor, RT, prevents false triggering. Its value is calculated as follows:
V(CT)
*
VT–
RT
Where:
V(CT) = VCC or 7.1 V, whichever is less
VT–= 4.55 V (nom)
RT= value of series resistor required
For VCC = 5 V:
5
*
4.55
RT
t
1mA
Therefore,
RT
u
450
W
Using a 20%-tolerance resistor, RT should be greater than 560 Ω.
Adding this series resistor changes the duration of the reset pulse by no more than 10%. R T extends the discharge
of CT, but also skews the V(CT) threshold. These effects tend to cancel one another . The precise percentage change
can be derived theoretically, but the equation is complicated by this interaction and is dependent upon the duration
of the supply-voltage fault condition.
Both outputs of the TL770xB should be terminated with similar value resistors, even when only one is being used.
This prevents unwanted plateauing in either output waveform during switching, which may be interpreted as an
undefined state or delay system reset.
The TL7705BM is obsolete
and no longer is supplied.
PACKAGE OPTION ADDENDUM
www.ti.com 23-May-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-88685042A OBSOLETE LCCC FK 20 TBD Call TI Call TI
5962-8868504HA OBSOLETE CFP U 10 TBD Call TI Call TI
5962-88685052A OBSOLETE LCCC FK 20 TBD Call TI Call TI
5962-8868505HA OBSOLETE CFP U 10 TBD Call TI Call TI
5962-8868505PA OBSOLETE CDIP JG 8 TBD Call TI Call TI
TL7702BCD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BCDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BCDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BCDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BCP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7702BCPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7702BID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BIDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7702BIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7702BIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 23-May-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TL7702BMFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI
TL7702BMJG OBSOLETE CDIP JG 8 TBD Call TI Call TI
TL7702BMJGB OBSOLETE CDIP JG 8 TBD Call TI Call TI
TL7702BMUB OBSOLETE CFP U 10 TBD Call TI Call TI
TL7702BQD OBSOLETE SOIC D 8 TBD Call TI Call TI
TL7702BQDR OBSOLETE SOIC D 8 TBD Call TI Call TI
TL7702BQP OBSOLETE PDIP P 8 TBD Call TI Call TI
TL7705BCD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BCDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BCDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BCDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BCP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7705BCPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7705BID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BIDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TL7705BIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 23-May-2012
Addendum-Page 3
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TL7705BIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7705BMFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI
TL7705BMJG OBSOLETE CDIP JG 8 TBD Call TI Call TI
TL7705BMJGB OBSOLETE CDIP JG 8 TBD Call TI Call TI
TL7705BMUB OBSOLETE CFP U 10 TBD Call TI Call TI
TL7705BQD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705BQDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705BQDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705BQDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7705BQP OBSOLETE PDIP P 8 TBD Call TI Call TI
TL7733BCD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BCDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BCDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BCDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BCP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7733BCPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7733BID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BIDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 23-May-2012
Addendum-Page 4
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TL7733BIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7733BIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7733BIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL7702BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7702BIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7705BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7705BIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7705BQDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7733BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7733BIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL7702BCDR SOIC D 8 2500 340.5 338.1 20.6
TL7702BIDR SOIC D 8 2500 340.5 338.1 20.6
TL7705BCDR SOIC D 8 2500 340.5 338.1 20.6
TL7705BIDR SOIC D 8 2500 340.5 338.1 20.6
TL7705BQDR SOIC D 8 2500 367.0 367.0 35.0
TL7733BCDR SOIC D 8 2500 340.5 338.1 20.6
TL7733BIDR SOIC D 8 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
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