6.42
IDT 71124 CMOS Static RAM
1 Meg (128K x 8-bit) Revolutionary Pinout Commercial and Industrial Temperature Ranges
3
3514 drw 03
480Ω
255Ω30pF
ATA
OUT
*Including jig and scope capacitance.
Figure 2. AC Test Load
(for t CLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
Figure 1. AC Test Load
AC Test Conditions
DC Electrical Characteristics(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC – 0.2V)
3514 drw 04
480Ω
255Ω5pF*
ATA
OUT
DC Electrical Characteristics
(VCC = 5.0V ± 10%, Commercial and Industrial Temperature Ranges)
Symbol Parame ter Test C onditions Min. M ax. Unit
|I
LI
| I nput Leakage Current V
CC
= Max., V
IN
= GND to V
CC
___
5µA
|I
LO
| Out put Leak age Current V
CC
= Max., CS = V
IH
, V
OUT
= GND to V
CC
___
5µA
V
OL
Out put Low Volt age I
OL
= 8m A, V
CC
= Min.
___
0.4 V
V
OH
Out put H igh Voltage I
OH
= –4m A, V
CC
= Min. 2.4
___
V
3514 tbl 06
NOTES:
1. All values are maximum guaranteed values.
2. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
71124S12 71124S15 71124S20
Symbol Parameter Com'l. Ind. Com'l. Ind. Com'l. Ind. Unit
ICC Dynamic Operating Current
CS < VIL, Outputs Open, VCC = Max ., f = fMAX
(2)
160 160 155 155 140 140 mA
ISB Standby Po we r Supply Current (TTL Level)
CS > VIH, Outputs Open, VCC = Max., f = fMAX
(2)
40 40 40 40 40 40 mA
ISB1 Full Standby Power Supply Current (CMOS Level)
CS > VHC, Outputs Open, VCC = Max., f = 0
(2)
VIN < VLC or VIN > VHC
10 10 10 10 10 10 mA
3514 t bl 0 7
Input Pulse Lev els
Input Rise/Fall Tim es
Input Tim ing Reference Levels
Out put R eference Lev els
AC Test Load
GND t o 3.0V
3ns
1.5V
1.5V
See Figure 1 and 2
3514 tbl 08
AC Test Loads