Preliminary Datasheet RJK0454DPB 40V, 40A, 4.9m max. Silicon N Channel Power MOS FET Power Switching R07DS1049EJ0300 (Previous: REJ03G1877-0200) Rev.3.00 Apr 09, 2013 Features High speed switching Low drive current Low on-resistance RDS(on) = 3.9 m typ. (at VGS = 10 V) Pb-free Halogen-free High density mounting Outline RENESAS Package code: PTZZ0005DA-A (Package name: LFPAK) 5 D 5 1, 2, 3 4 5 4 G 3 12 4 Source Gate Drain S S S 1 2 3 Absolute Maximum Ratings (Ta = 25C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel to Case Thermal Resistance Channel temperature Storage temperature Symbol VDSS VGSS ID ID(pulse)Note1 IDR Ratings 40 20 40 160 40 Unit V V A A A IAP Note 2 EAS Note 2 Pch Note3 ch-C Tch Tstg 40 13 55 2.27 150 -55 to +150 A mJ W C/W C C Notes: 1. PW 10 s, duty cycle 1% 2. Value at L=10uH, Tch = 25C, Rg 50 3. Tc = 25C R07DS1049EJ0300 Rev.3.00 Apr 09, 2013 Page 1 of 6 RJK0454DPB Preliminary Electrical Characteristics (Ta = 25C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Gate Resistance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) |yfs| Ciss Coss Crss Rg Qg Qgs Qgd td(on) tr td(off) tf Min 40 -- -- 2.0 -- -- -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- 3.9 40 2000 620 150 0.5 25 9.0 3.0 10 5.2 30 6.5 Max -- 0.1 1 4.0 4.9 -- -- -- -- -- -- -- -- -- -- -- -- Unit V A A V m S pF pF pF nC nC nC ns ns ns ns Body-drain diode forward voltage Body-drain diode reverse recovery time VDF trr -- -- 0.8 37 1.1 -- V ns Test Conditions ID = 10 mA, VGS = 0 V VGS = 20 V, VDS = 0 V VDS = 40 V, VGS = 0 V VDS = 10 V, ID = 1 mA ID = 20 A, VGS = 10 V Note4 ID = 20 A, VDS = 10 V Note4 VDS = 10 V, VGS = 0 V, f = 1 MHz VDD = 10 V, VGS = 10 V, ID = 40 A VGS = 10 V, ID = 20 A, VDD 10 V, RL = 0.5 , Rg = 4.7 IF = 40 A, VGS = 0 V Note4 IF = 40 A, VGS = 0 V diF/ dt = 100 A/ s Notes: 4. Pulse test R07DS1049EJ0300 Rev.3.00 Apr 09, 2013 Page 2 of 6 RJK0454DPB Preliminary Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 60 40 20 100 10 Operation in PW = 10 ms this area is 1 limited by R DS(on) DC Operation 0 50 100 150 0.1 0.1 200 1 10 100 Case Temperature Tc (C) Drain to Source Voltage VDS (V) Typical Output Characteristics Typical Transfer Characteristics 50 10 V 4.8 V 50 Pulse Test 4.6 V VDS = 10 V Pulse Test 40 4.2 V 30 20 4.0 V 10 3.8 V Drain Current ID (A) 4.4 V Drain Current ID (A) Tc = 25C 1 shot Pulse s Drain Current ID (A) 1000 1m Channel Dissipation Pch (W) 80 40 30 20 Tc = 75C 25C 10 -25C VGS = 3.6 V Drain to Source Saturation Voltage VDS (on) (mV) 0 2 4 6 8 10 0 1 2 3 5 4 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 200 100 Pulse Test Pulse Test 160 120 10 80 ID = 20 A 40 10 A VGS = 10 V 5A 0 4 8 12 16 20 Gate to Source Voltage VGS (V) R07DS1049EJ0300 Rev.3.00 Apr 09, 2013 1 1 10 100 1000 Drain Current ID (A) Page 3 of 6 RJK0454DPB Preliminary Static Drain to Source on State Resistance vs. Temperature Typical Capacitance vs. Drain to Source Voltage 10000 10 Pulse Test ID = 20 A 6 Capacitance C (pF) 8 VGS = 10 V 4 2 Ciss 1000 Coss 100 Crss VGS = 0 V f = 1 MHz 25 50 75 20 40 30 Drain to Source Voltage V DS (V) Dynamic Input Characteristics Reverse Drain Current vs. Source to Drain Voltage 20 VGS VDD = 25 V 10 V 40 16 12 VDS 20 8 10 4 VDD = 25 V 10 V 0 0 10 Case Temperature Tc ( C) ID = 40 A 30 0 100 125 150 10 20 30 0 50 40 50 Reverse Drain Current IDR (A) 50 10 0 Gate to Source Voltage V GS (V) Drain to Source Voltage V DS (V) 0 -25 Pulse Test 10 V 40 30 20 VGS = 0 V 10 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage V SD (V) Gate Charge Qg (nC) Maximum Avalanche Energy vs. Channel Temperature Derating Avalanche Energy EAS (mJ) 20 IAP = 40 A VDD = 15 V duty < 0.1 % Rg 50 16 12 8 4 0 25 50 75 100 125 150 Channel Temperature Tch ( C) R07DS1049EJ0300 Rev.3.00 Apr 09, 2013 Page 4 of 6 RJK0454DPB Preliminary Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25C 1 D=1 0.5 0.3 0.2 0.1 0.1 0.05 .02 0 0.03 D= PDM se ul p 1 0.0 hot s 1 PW T PW T 0.01 1m 100 m 10 m 1 10 Pulse Width PW (s) Avalanche Test Circuit Avalanche Waveform EAS = L VDS Monitor 1 L * IAP2 * 2 VDSS VDSS - VDD IAP Monitor V(BR)DSS IAP Rg VDS VDD D. U. T ID Vin 15 V 0 VDD Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor 90% D.U.T. Rg RL Vin Vout Vin 10 V 10% 10% VDS = 10 V 90% td(on) R07DS1049EJ0300 Rev.3.00 Apr 09, 2013 10% tr 90% td(off) tf Page 5 of 6 RJK0454DPB Preliminary Package Dimensions JEITA Package Code SC-100 Previous Code LFPAKV RENESAS Code PTZZ0005DA-A 4.9 5.3 Max 4.0 0.2 MASS[Typ.] 0.080g +0.05 4.2 6.1 -0.3 +0.1 3.95 5 4 +0.05 0.20 -0.03 0 - 8 +0.25 1 1.1 Max +0.03 0.07 -0.04 3.3 1.0 0.25 -0.03 Unit: mm 0.6 -0.20 1.3 Max Package Name LFPAK 0.75 Max 0.10 1.27 0.40 0.06 0.25 M (Ni/Pd/Au plating) Ordering Information Part No. RJK0454DPB-00-J5 Quantity 2500 pcs R07DS1049EJ0300 Rev.3.00 Apr 09, 2013 Shipping Container Taping Page 6 of 6 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. 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