[AP1012A] AP1012A 18V Dual H-Bridge Motor Driver IC 1. Genaral Description The AP1012A is a dual H-bridge motor driver which has four drive modes: forward, reverse, brake and standby, to operate up to 18V motor supply voltage. An N-channel LDMOS is built in for both high and low sides of the output driver to minimize the device size. Additionally, the AP1012A has under voltage detection and thermal shutdown circuits. It is housed in a small 24-pin QFN package, suitable for driving various types of small motors. 2. Features Control Supply Voltage Logic Terminal Supply Voltage Wide Motor Drive Operating Voltage Maximum Output Current(DC) Maximum Output Current(Peak) Maximum Output Current(Peak) H-Bridge On Resistance Power-Down Mode Built-in Under Voltage Detection Circuit Built-in Thermal Shut Down Circuit Junction Temperature (Tj) Package 2.7 to 5.5V 1.62V to Control Supply Voltage 2 to 18V (NMOS high side and Low side architecture) 1.3A 3.0A (Ta = 25C, less than 10ms in 200ms or less than 5ms in 100ms) 4.5A (Ta = 25C,less than 5ms in 200ms or less than 2.5ms in 200ms) RON(TOP+BPT) = 0.36 (typ)@25C VM consumption current less than 2A(Ta = 25C) Detection Voltage ; 2.2V(typ) 175C (typ) 150C (max) 24-pin QFN (4mmx4mm) MS1493-E-03 2014/12 -1- [AP1012A] 3. Table of Contents 1. 2. 3. 4. 5. 6. Genaral Description ................................................................................................................................... 1 Features ...................................................................................................................................................... 1 Table of Contents ....................................................................................................................................... 2 Block Diagram ........................................................................................................................................... 3 Ordering Guide .......................................................................................................................................... 3 Pin Configurations and Functions .............................................................................................................. 4 Pin Configurations ................................................................................................................................... 4 Functions ................................................................................................................................................. 4 Terminal Equivalent Circuit ...................................................................................................................... 5 7. Absolute Maximum Ratings ...................................................................................................................... 6 8. Recommended Operating Conditions ........................................................................................................ 6 9. Electrical Characteristics ........................................................................................................................... 7 10. Functional Descriptions ......................................................................................................................... 9 11. Recommended External Circuits.......................................................................................................... 11 Recommended External Circuits ........................................................................................................... 11 Reference Value .................................................................................................................................... 11 12. Package ................................................................................................................................................ 12 Outline Dimensions ............................................................................................................................... 12 Marking ................................................................................................................................................. 12 13. Revise History ...................................................................................................................................... 13 IMPORTANT NOTICE .............................................................................................................................. 14 MS1493-E-03 2014/12 -2- [AP1012A] 4. Block Diagram VIO VC VG Thermal Shut Down Under Voltage Detection VREF OSC VIO VC VG Charge Pump CH CL VM1 IN1A IN1B OUT1A EN OUT1B Pre Driver Control Logic IN2A IN2B PGND VM2 - PSAVE OUT2A OUT2B PGND DGND Figure 1. Block Diagram 5. AP1012A Ordering Guide -30 to 85C 24-pin QFN MS1493-E-03 2014/12 -3- [AP1012A] 6. Pin Configurations and Functions VIO VC CL CH VG DGND 18 17 16 15 14 13 Pin Configurations OUT1A 19 OUT1A 20 VM1 21 12 OUT2A 11 OUT2A 10 VM2 (Top View) VM1 22 9 VM2 OUT1B 23 8 OUT2B OUT1B 24 7 OUT2B 1 2 3 4 5 6 IN1 A IN1 B IN2 A IN2 B EN PSAVE EP(GND) Functions Pin Number Name I/O (Note 1) Function Remark 14 VG O Charge pump output capacitor connection l 15 CH I/O Charge pump capacitor connection l 16 CL I/O Charge pump capacitor connection 21,22 VM1 P Motor driver power supply 19,20 OUT1A O Motor driver output 23,24 OUT1B O Motor driver output Exposed Pad PGND P Power ground (Note 2) 11,12 OUT2A O Motor driver output 7,8 OUT2B O Motor driver output 9,10 VM2 P Motor driver power supply 4 IN2B I Control signal input 3 IN2A I Control signal input 2 IN1B I Control signal input 1 IN1A I Control signal input 13 DGND P Digital Ground 5 EN I Enable signal input 100k pull-up 6 PSAVE I Power save input 100k pull-up 18 VIO P Logic input terminal power supply 17 VC P Control power supply Note 1. I(Input pin), O(Output pin), P(Power pin) Note 2. The exposed pad must be connected to power ground and DGND. Note 3. The same voltage must be supplied to VM1(pin No.21, 22) and the VM2 (pin No.9, 10) each other. MS1493-E-03 2014/12 -4- [AP1012A] Terminal Equivalent Circuit Pin No. Name 21,22 9,10 VM1 VM2 18 17 VIO VC Function Motor Driver Power Supply (The same voltage must be supplied to VM1(pin No. 21,22)and VM2(pin No. 9,10) each other) Logic Input Terminal Power Supply Control Power Supply Equivalent Circuits VIO 5 6 EN PSAVE 1 2 3 4 IN1A IN1B IN2A IN2B 100k Logic Input (Built-in pull-up resistor) 2k 2k 2k 2k Control Signal Input VM 19,20 23,24 11,12 7,8 OUT1A OUT1B OUT2A OUT2B Motor Driver Output OUT1A OUT2A OUT1B OUT2B PGND VG VG 14 15 CH Charge Pump Output Capacitor Connection Charge Pump Capacitor Connection CH VM2 VC 16 CL CL Charge Pump Capacitor Connection PGND 13 Exposed Pad DGND PGND DGND Ground Terminal Power Ground Terminal MS1493-E-03 PGND 2014/12 -5- [AP1012A] 7. Absolute Maximum Ratings Parameter Control supply voltage Symbol VC min -0.5 max 6 Unit Remark V VIO is under VC voltage V (Note 6) V Logic terminal supply voltage VIO -0.5 6 Motor driver supply voltage VIO level terminal voltage (PSAVE,EN,IN1A,IN1B,IN2A and IN2B) VM level terminal voltage (OUT1A,OUT1B,OUT2A and OUT2B) VG,CH terminal voltage VM -0.5 19 Vterminal1 -0.5 5.5 V Vterminal2 -0.5 19 V Vterminal3 -0.5 25 V Maximum DC output current IloaddcMD - 1.3 A Maximum peak output current IloadpeakMD - OUTnA and OUTnB terminal OUTnA and OUTnB terminals less than 10ms in 200ms Less than 5ms in 200ms Ta=85C(Note 5) A 3 4.5 Power dissipation PD 1625 mW Operating Temperature range Ta -30 85 C Junction temperature Tj 150 C Storage temperature Tstg -65 150 C Note 4. All above voltages respect to Ground (DGND/PGND terminal voltage). Note 5. The rating is calculated by RJ = 40C/W under the condition when 4 layer board is used. The EP terminal is connected to ground. Compliant to SEMI JEDEC JESD51-6, JESD51-7. Note 6. Logic terminal supply voltage (VIO) needs to be turned on prior to or at the same time as Control supply voltage(VC). WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. 8. Recommended Operating Conditions Parameter Control supply voltage Logic terminal supply voltage Motor driver supply voltage Input frequency range (50% duty) Symbol VC VIO VM Fin min 2.7 1.62 2.0 - MS1493-E-03 typ 3.3 1.8/3.3 - max 5.5 VC 18 200 Unit V V V kHz Remark 2014/12 -6- [AP1012A] 9. Electrical Characteristics (Ta = 25C, VM = 15V and VC = 3.3V, otherwise specified.) Parameter Charge pump Charge pump voltage Charge pump wake up time VDET1 VC under voltage detect voltage TSD Thermal shutdown temperature (Note 7) Temperature hysteresis (Note 7) Consumption current current VM consumption current at no power VM consumption current at standby Symbol min typ max Unit VG tVG 18.0 0.1 18.2 1 18.3 3 V ms VCDETLV 1.9 2.2 2.5 V TDET 150 175 200 C TDETHYS 20 30 40 C IVMNOPOW+ - - 2 A IVMSTBY - 15 70 A IVCSTBY - 150 300 A IVCPSAVE - - 1 A PSAVE = "H", EN = "H" IVCPWM - 1 2 mA INnA = 200kHz, INnB = "H" RON1 - 0.18 0.25 Driver on resistance (High side or Low side) (Note 7) RON2 - 0.22 0.27 Drive on resistance (High side or Low side) (Note 7) RON3 - 0.27 0.32 VFMD - 0.8 1.2 V VC = 3.3V, Iload = 100mA Ta = 25C VC = 3.3V, Iload = 1.2A Ta = 25C (Equivalent Tj = 85C) VC = 3.3V, Iload = 1.2A Ta = 85C (Equivalent Tj = 150C) IF = 100 mA tPDLHB - - 0.5 s tr = tf = 10ns tPDHHB - - 1.0 s tr = tf = 10ns tPDZHHB - - 0.5 s tr = tf = 10ns tPDZHHB - - 2.0 s tr = tf= 10ns tPWDHB 0.6 - - s PWL = 1.0s, tr = tf = 10ns VIH 0.7xVIO - - V VIL - - 0.3xVIO V VC consumption current at standby VC consumption current at power save VC consumption current at PWM operation Motor Driver Driver on resistance (High side or Low side) Body diode forward voltage H-Bridge propagation delay (LL) (Note 8) H-Bridge propagation delay (HH) (Note 8) H-Bridge propagation delay (HiZH) H-Bridge propagation delay (HHiZ) H-Bridge output pulse width Control logic Input High level voltage (INnA, INnB) Input Low level voltage (INnA, INnB) time time time time Conditions VG = VC + VM VG = VC + VM - 0.3V VC = 0V PSAVE = "L", EN = "H" INnA = "L", INnB = "L" PSAVE = "L", EN = "H" INnA = "L", INnB = "L" VIO = 1.6V to 5.5V Note 7. Not tested in production. Note 8. Refer to Figure 2. MS1493-E-03 2014/12 -7- [AP1012A] tPWI INB (INA=INB) 50% tPDH tPDL tPWO 90% OUTA OUTB 50% 10% Figure 2. Output Propagate Delay Time Chart MS1493-E-03 2014/12 -8- [AP1012A] 10. Functional Descriptions 10.1 Control Logic Input and Output statuses of each operation mode are shown below. Input Output INnA INnB OUTnA OUTnB L H L L Z Z L H L H L H L H H L H L L H H H L L L L X X L L H X X X Z Z Note 9. TSD/UVLO/VREF/OSC/Charge pump circuits are shut down. PSAVE EN Motion Standby (Idling) Reverse Forward Brake Brake Power Save (Note 9) 10.2 Basic Architecture of the Motor Driver The AP1012A has an N-channel LDMOS FET for both high and low sides in the output circuit, so that a small package can be adopted. High side FET is driven by VG voltage, VG=VM+ VC is generated by a charge pump. VG voltage reaches the targeted voltage level within 1ms (typ) after starting the charge pump. The charge pump operates at 360kHz (typ) Low side FET is driven by VC voltage. VG Logic Charge Pump CH CL Enable Control VM VG EN INA INB OUTA VC VG Pre Driver VC OUTB PGND Figure 3. Equivalent Circuit of Motor Driver Block The OSC block supplies a drive pulse to the charge pump. The input interface block is operated by VIO power supply for logic input terminal VIO power supply needs to be tumed on at the same time as or earlier than VC power supply. (If the VIO is turned on later than the VC, it is recommend to connect pull-up resistance about 5ook between the VIO and the VC pins to avoid an uncertainty stats of the circuit). MS1493-E-03 2014/12 -9- [AP1012A] 10.3 Protection Circuits The AP1012A has penetration current prevention, thermal shut down and under voltage detection circuits. Penetration current prevention circuit MOSFET turns off both of high side and low side during the dead time period when penetration current prevention circuit operates. During this period, either body diode is turn on depends on the direction of the current. Figure 4 shows an example when the AP1012A drives the output from "L" to "H" in. (a) shows the case that current flows from external load to the AP1012A, (b) shows the case that current flows from the AP1012A to external load VM Vfh OUTA/B (a) Motor (b) Vfl PGND INA/B Dead Time Dead Time H-side MOSFET ON OFF ON ON OFF ON L-side MOSFET OFF ON OFF OFF ON OFF OUTA/B Vfh VM Vfl PGND (a) Case for current is passed from external load to this IC VM PGND (b) Case for current is passed from this IC to external load Figure 4. Difference in output terminal by load current direction Thermal Shutdown The AP1012A prevents damages from self-heating by setting OUTA and OUTB outputs Hi-Z when abnormal high temperature (175C typ) is detected. The AP1012A is able to return to normal operation as soon as the temperature drops to the level lower than the bottom detection threshold. Detect High Temp.(175typ) OUTnA/OUTnB are Hi-Z Wait to Cool Down (Hysteresis: 30C typ) Resume Motor Driver Operation OUTnA/OUTnB are conform INnA/INnB Figure 5. Thermal Shutdown Operation MS1493-E-03 2014/12 - 10 - [AP1012A] 11. Recommended External Circuits Recommended External Circuits OUT1A OUT1A VM1 19 20 21 22 3 16 4 CVC CHL 15 CVG VG 5 CVIO CL CH VM 14 EP(GND) 12 DGND OUT2A 11 13 CVM OUT2A 8 OUT2B OUT2B 10 6 7 PSAVE VC 17 VM2 EN 18 2 9 IN2B VIO VC VM2 IN2A 23 1 IN1B VIO 24 IN1A VM VM1 OUT1B VIO MCU OUT1B CVM MOTOR VM MOTOR Figure 6. External Circuit Example Reference Value Table 1. Recommended External Components Items Motor driver power supply connection decupling capacitor Symbol min typ max Unit CVM 1.0 - - F Control power supply connection bypass capacitor CVC 0.1 1.0 - F Logic input terminal power supply connection bypass capacitor CVIO 0.1 1.0 - F Charge pump capacitor1 Charge pump capacitor2 CVG CHL 0.047 0.047 0.1 0.1 0.22 0.22 F F Remark (Note 10) Please confirm value with the board. Please confirm value with the board. an appropriate actual system an appropriate actual system Note 10. Connecting capacity of CVM, CVC and CVIO should be determined in consideration of the load current profile, the load capacitance, the wiring resistance and etc. of the actual system board. Note 11. VM1 and VM2 are not connected internally by a metal layer. Please connect both pins at same voltage level on the mounting board. MS1493-E-03 2014/12 - 11 - [AP1012A] 12. Package Outline Dimensions 24-pin QFN (Unit mm) 2.80 0.10 0.75 0.05 B 24 C0.35 18 1 13 6 0.05MAX A 12 7 0.40 0.10 4.00 2.80 0.10 0.10 19 0.10 M C A B 4.00 0.10 0.05 (0.20) 0.25 0.08 C C 0.50 Ref Marking 1012A (2) YWW A (1) (3) (4) (5) (1) (2) (3) (4) (5) 1pin Indication Part Number Year codelast 1 digit Week code Management code MS1493-E-03 2014/12 - 12 - [AP1012A] 13. Date (YY/MM/DD) 12/12/05 14/10/09 14/12/03 14/12/12 Revision 00 01 02 03 Page P4 P10 P12 Revise History Contents First edition Add Note 3. Correct some sentences and figure 4 in 10.3 Protection Circuits. Correct part number in marking (12. Package). MS1493-E-03 2014/12 - 13 - [AP1012A] IMPORTANT NOTICE 0. Asahi Kasei Microdevices Corporation ("AKM") reserves the right to make changes to the information contained in this document without notice. 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