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Copyright © Future Technology Devices International Limited
UMFT220XA Datasheet
Version 1.3
Doc ument Reference N o.: F T _000517 C learance N o.: FT DI# 2 6 7
Future Technology
Devices International
Datasheet
UMFT220XA USB to 4-bit
SPI/FT1248 Development
Module
UMFT220XA is a USB to 4-bit SPI/FT1248 DIP module with a 0.3” row pitch.
1 Introduction
The UMFT220XA is a development module for
FTDI’s FT220XQ, one of the devices from FTDI’s
range of USB interface bridging integrated circuit
devices. FT220X is a USB to 4-bit SPI/FT1248
(only up to 4 bit wide) interface with a battery
charger detection feature, which can allow
batteries to be charged with a higher current from
a dedicated charger port (without the FT220X
being enumerated). In addition, asynchronous
and synchronous bit bang interface modes are
available. The internally generated clock (6MHz,
12MHz and 24MHz) can be brought out on the
CBUS pin to be used to drive a microprocessor or
external logic.
The UMFT220XA is a module which is designed to
plug into a standard 0.3” wide 16 pin DIP socket.
All components used, including the FT220XQ are
Pb-free (RoHS compliant).
1.1 Features
The UMFT220XA is fitted with a FT220XQ; all the
features of the FT220X can be utilized with the
UMFT220XA. For a full list of the FT220X’s features
please see the FT220X datasheet which can be found by
clicking here.
In addition to the features listed in the FT220X
datasheet, the UMFT220XA has the following features:
Small PCB assembly module designed to fit a
standard 7.62mm (0.3”) wide 16 pin DIP socket.
Pins are on a 2.54mm (0.1”) pitch.
On board USB ‘mini-B’ socket allows module to be
connected to a PC via a standard A to mini-B USB
cable.
Functionally configurable using solder links. The
default solder links setup enables the module to
function without peripheral w ires or application
board. Other configurations enable external power
supply options and variation of logic reference
levels.
Copyright © Future Technology Devices International Limited 2
Table of Contents
1 Introduction ................................................................. 1
1.1 Features ................................................................................ 1
2 Driver Support .............................................................. 3
3 Ordering Information & TID .......................................... 4
4 UMFT220XA Signals and Configurations ......................... 5
4.1 UMFT220XA Pin Out ............................................................... 5
4.2 Signal Descriptions ................................................................ 6
4.3 CBUS Signal Options............................................................... 7
5 Module Configurations .................................................. 8
5.1 Solder Link Configuration Options........................................... 8
5.2 Solder Link Modfications ........................................................ 8
5.3 BUS Powered Configuration .................................................... 9
5.4 Self Powered Configuration ...................................................10
5.5 USB Bus Powered with Power Switching Configuration ...........11
5.6 Variable IO Voltage Supply ....................................................12
5.7 3.3V Voltage Supply ..............................................................13
5.8 Configuring the MTP ROM ......................................................14
5.9 Module Dimensions ...............................................................14
5.10 IC Package Markings .............................................................15
6 UMFT220XA Module Circuit Schematic ......................... 16
7 Internal MTP ROM Configuration.................................. 17
8 Contact Information .................................................... 18
Appendix A – References ................................................. 19
Document References ...................................................................19
Acronyms and Abbreviations .........................................................19
Appendix B - List of Figures and Tables ............................ 20
List of Figures ...............................................................................20
List of Tables ................................................................................20
Appendix C – Revision History.......................................... 21
Copyright © Future Technology Devices International Limited 3
2 Driver Support
Royalty-Free VIRTUAL COM PORT (VCP)
DRIVERS for:
Windows 10 32, 64 bit
Windows 8 and 8.1 32, 64 bit
Windows 7 32,64-bit
Windows Vista
Windows XP 32,64-bit
Windows XP Embedded
Windows CE.NET 4.2 , 5.0 and 6.0
MAC OS OS-X
Linux 3.0 and greater
Android
Royalty-Free D2XX Direct Drivers (USB Drivers
+ DLL S/W Interface):
Windows 10 32, 64 bit
Windows 8 and 8.1 32,64-bit
Windows 7 32,64-bit
Windows Vista
Windows XP 32,64-bit
Windows XP Embedded
Windows CE.NET 4.2, 5.0 and 6.0
MAC OS OS-X
Linux 3.0 and greater
Android
The drivers listed above are all available to download for free from www.ftdichip.com. Various 3rd Party
Drivers are also available for various other operating systems - visit ww w.ftdichip.com for details.
Copyright © Future Technology Devices International Limited 4
3 Ordering Information & TID
Module Code
Utilised
IC Code
TID
Description
UMFT201XA-01
FT201XQ
40001460
USB to I2C evaluation module, Pin length: 5.6mm.
UMFT201XA-02
FT201XQ
40001460
USB to I2C evaluation module, Pin length: 4.6mm.
UMFT220XA-01
FT220XQ
40001461
USB to 4-bit SPI/FT1248 evaluation module, Pin length:
5.6mm.
UMFT220XA-02
FT220XQ
40001461
USB to 4-bit SPI/FT1248 evaluation module, Pin length:
4.6mm.
UMFT221XA-01
FT221XQ
40001462
USB to 8-bit SPI/FT1248 evaluation module, Pin length:
5.6mm.
UMFT221XA-02
FT221XQ
40001462
USB to 8-bit SPI/FT1248 evaluation module, Pin length:
4.6mm.
UMFT230XA-01
FT230XQ
40001463
USB to Basic UART evaluation module, Pin length: 5.6mm.
UMFT230XA-02
FT230XQ
40001463
USB to Basic UART evaluation module, Pin length: 4.6mm.
UMFT231XA-01
FT231XQ
40001464
USB to Full-Handshake UART evaluation module, Pin length:
5.6mm.
UMFT231XA-02
FT231XQ
40001464
USB to Full-Handshake UART evaluation module, Pin length:
4.6mm.
UMFT240XA-01
FT240XQ
40001466
USB to 8-bit 245 FIFO evaluation module, Pin length: 5.6mm.
UMFT240XA-02
FT240XQ
40001466
USB to 8-bit 245 FIFO evaluation module, Pin length: 4.6mm.
TID is the test identification code for the IC. Note that this TID is for revision D silicon.
Copyright © Future Technology Devices International Limited 5
4 UMFT220XA Signals and Configurations
4.1 UMFT220XA Pin Out
J2-1 – SLD
VBUS
VCC
CBUS3
MISO
SS#
SCLK
J2-8 – GND
GND – J1-1
3V3OUT
VCCIO
RESET#
IO3
IO2
IO1
IO0 – J1-8
Figure 4.1 – Module Pin Out
Figure 4.1 illustrates the signals available on the DIL pins. The LHS shows the pinout when the module is
viewed from the bottom. The RHS shows what signals are available (on the pins below) when viewed
from the top. The pins do not go completely through the PCB.
Copyright © Future Technology Devices International Limited 6
4.2 Signal Descriptions
Pin
No.
Name
Type
Description
J1-1,
J2-8
GND
PWR
Module Ground Supply Pins
J1-2
3V3OUT
Power
Output
3.3V output from integrated LDO regulator. This pin is decoupled with a 100nF
capacitor to ground on the PCB module. The prime purpose of this pin is to provide
the 3.3V supply that can be used internally. For power supply configuration details
see section 5.
J1-3
VCCIO
Power
Input
+1.8V to +3.3V supply to the UART Interface and CBUS I/O pins. For power supply
configuration details see section 5.
J1-4
RESET#
Input
FT220X active low reset line. Configured with an on board pull-up and recommended
filter capacitor.
J1-5
IO3
I/O
FT1248 Bi-Directional data bit 3
J1-6
IO2
I/O
FT1248 Bi-Directional data bit 2
J1-7
IO1
I/O
FT1248 Bi-Directional data bit 1
J1-8
IO0
I/O
FT1248 Bi-Directional data bit 0
J2-1
SLD
GND
USB C able Shield. Connected to GND via a 0ohm resistor.
J2-2
VBUS
Power
Output
5V Power output from the USB bus. For a low power USB bus powered design, up to
100mA can be sourced from the 5V supply and applied to the USB bus. A maximum
of 500mA can be sourced from the USB bus in a high power USB bus powered design.
Currents up to 1A can be sourced from a dedicated charger and applied to the USB
bus.
J2-3
VCC
Power
Input
5V power input for FT220X. For power supply configuration details see section 5.
J2-4
CBUS3
I/O
Configurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. See CBUS Signal Options, Table 4.2.
J2-5
MISO
Output
Master In Serial Out. Used to provide status information to the FT1248 interface
master.
J2-6
SS#
Input
FT1248 C hip select input to enable the device interface. Active low logic.
J2-7
SCLK
Input
FT1248 C lock input from FT1248 interface master.
Table 4.1 – Module Pin Out Description
Copyright © Future Technology Devices International Limited 7
4.3 CBUS Signal Options
The following options can be configured on the CBUS I/O pins. These options are all configured in the
internal MTP ROM using the utility software FT_PROG, which can be downloaded from the
ww w.ftdichip.com. The default configuration is described in DS_UMFT231XA.
CBUS Signal
Option
Available On CBUS
Pin
Description
Tristate
CBUS3
IO Pad is tristated
DRIVE_1
CBUS3
Output a constant 1
DRIVE_0
CBUS3
Output a constant 0
PWREN#
CBUS3
Output is low after the device has been configured by USB, then high
during USB suspend mode. This output can be used to control power to
external logic P-Channel logic level MOSFET switch.
NOTE: This function is driven by an open-drain to ground with no
internal pull-up, this is specially designed to aid battery charging
applications. UMFT220XA connects an on-board 47K pull-up to all CBUS
and DBUS pins.
TXLED#
CBUS3
Transmit data LED drive – open drain pulses low when transmitting
data via USB.
RXLED#
CBUS3
Receive data LED drive – open drain pulses low when receiving data via
USB.
TX&RXLED#
CBUS3
LED drive – open drain pulses low when transmitting or receiving data
via USB.
SLEEP#
CBUS3
Goes low during USB suspend mode. Typically used to power down an
external logic to RS232 level converter IC in USB to RS232 converter
designs. C ancel SLEEP# option for when connected to a dedicated
charger port, this can be selected when configuring the MTP ROM.
When this option is enabled SLEEP# is driven high when FT220X is
connected to a Dedicated C harger Port.
CLK24MHz
CBUS3
24 MHz C lock output.**
CLK12MHz
CBUS3
12 MHz C lock output.**
CLK6MHz
CBUS3
6 MHz C lock output.**
GPIO
CBUS3
CBUS bit bang mode option. Allows up to 4 of the C BUS pins to be used
as general purpose I/O. Configured individually for CBUS0, CBUS1,
CBUS2 and CBUS3 in the internal MTP ROM. A separate application
note, AN232R-01, available from FTDI website (www.ftdichip.com)
describes in more detail how to use CBUS bit bang mode.
BCD_C harger
CBUS3
Battery C harge Detect indicates when the device is connected to a
dedicated battery charger host. Active high output. NOTE: Requires a
10K pull-down to remove power up toggling.
BCD_C harger#
CBUS3
Active low BCD Charger, driven by an open drain to ground with no
internal pull-up (4.7K on board pull-up present).
BitBang_WR#
CBUS3
Synchronous and asynchronous bit bang mode WR# strobe output.
BitBang_RD#
CBUS3
Synchronous and asynchronous bit bang mode RD# strobe output.
VBUS_Sense
CBUS3
Input to detect when VBUS is present.
Time_Stamp
CBUS3
Toggle signal which changes state each time a USB SOF is received
Keep_Awake#
CBUS3
Active Low input, prevents the chip from going into suspend.
Table 4.2 – CBUS Signal Options
**When in USB suspend mode the outputs clocks are also suspended.
Copyright © Future Technology Devices International Limited 8
5 Module Configurations
5.1 Solder Link Configuration Options
Solder
Link No.
Setting
Status
Description
JP1
Shorted
Default
Connects internal 3.3V regulator to VCCIO. This restricts signal drive to only 3.3V
level signals.
JP1
Opened
Non-
Default
Disconnects internal 3.3V regulator connection to VCCIO. This mode allows for the
supply of 1.8V-3.3V power from an external power supply, thus allows the
processing of signals with logic levels between 1.8V and 3.3V. VCCIO can be
adjusted to match the interface requirements of external circuitry.
Table 5.1 – Solder Links JP1 Pin Description
Solder
Link No.
Setting
Status
Description
JP2
Shorted
Default
Connects VBUS to VCC. This mode is known as “Bus Powered” mode.
JP2
Opened
Non-
Default
Disconnects VBUS to VCC. This allows the supply of power from an external power
supply. This mode is known as “Self-Powered” mode.
Table 5.2 – Solder Links JP2 Pin Description
Note: There should never be more than one power output supplied to the same net. Failure to properly
remove solder from JP1 and JP2 can cause a direct short between two different power supplies (w hen a
self-powered set-up is applied and the USB bus is connected) resulting in damage to the UMFT220XA
module and the target circuit.
5.2 Solder Link Modfications
The UMFT220XA has two solder links fixed to the top side of the PCB. These solder link can be adjusted
by removing the solder linking the two PADs to produce an open or by placing a solder blob to produce a
short.
By default the UMFT220XA has both solder links shorting their pads. To allow for enhanced flexibility of
this module remove both solder links and wire the header pins according to the power setup required.
Copyright © Future Technology Devices International Limited 9
5.3 BUS Powered Configuration
GND
Solder Link JP1 - Closed
GND
Solder Link JP2 - Closed
Alternative
connection
Alternative
connection
Current Flow
Bus Powered
Mode
Self-Sourced
3V3 TTL Mode
VCCIO
3V3OUT VBUS
VCC
Viewing Pin thourgh the board
from the top.
Figure 5.1 – Bus Powered Configuration
A bus powered configuration draws its power from the USB host/hub. The UMFT220XA is configured by
default to be in bus powered mode.
Figure 5.1 illustrates the UMFT220XA module in a typical USB bus powered design configuration. By
default solder bridge connections link VCCIO to 3V3OUT, and VCC to VBUS. . (Note that Figure 5.1 is for
illustration only and that the pins do not actually go all the way through the PCB)
For a bus power configuration power is supplied from the USB VBUS:
+5V VBUS power is sourced from the USB bus and is connected to the FT220X power input (VCC)
+3.3V power is sourced from the FT220X’s voltage regulator output and is connected to the FT220X IO
port’s power input (VCCIO).
Interfacing the UMFT220XA module to a microcontroller (MCU), or other logic devices for bus powered
configuration is done in exactly the same way as a self-powered configuration (see Section 5.3), except
that it is possible for the MCU or external device to take its power supply from the USB bus (either the 5V
from the USB pin, or 3.3V from the 3V3OUT pin).
Copyright © Future Technology Devices International Limited 10
5.4 Self Powered Configuration
MCU
Vcc = 1.8V – 3.3V
IO0
Vcc = 5V
IO0
Solder Link JP2 - Open
Solder Link JP1 - Open
GND
Self Power
Mode
Variable TTL
Mode
VIO
VCCIO
3V3OUT VBUS
VCC
Optional
IO1
Optional
IO2
Optional
IO3 MISO
SS#
SCLK
MISO
SS#
SCLK
Viewing Pin thourgh the board
from the top.
Figure 5.2 – Self-Powered Configuration
A self-powered configuration operates on the principle of drawing power from an external power supply,
as oppose to drawing power from the USB host. In this configuration no current is drawn from the USB
bus.
Figure 5.2 illustrates the UMFT220XA in a typical USB self-powered configuration. In this case the solder
links connection of JP1 is removed, which allows 5V power to be supplied to the module VCC pins from an
external source. VCCIO can to be powered from 3V3OUT or the VCC of an external source. (Note that
Figure 5.2 is for illustration only and that the pins do not actually go all the way through the PCB)
For a self-powered configuration it is necessary to prevent current from flowing back to the USB data
lines when the connected USB host or hub has powered down. To carry out this function the UMFT220XA
uses an on-board voltage divider network connected to the USB power bus and RESET# pin. This
operates on the principle that when no power is supplied to the VBUS line , the FT220X will automatically
be held in reset by a weak pull-down, when power is applied the voltage divider will apply a weak 3.3V
pull-up. Driving a level to the RESET# pin of the UMFT220XA will override the effect of this voltage
divider. When the FT220X is in reset the USB DP signal pull-up resistor connected to the data lines is
disconnected and no current can flow down the USB lines.
An example of interfacing the FT220X with a Microcontroller’s FT1248 interface is also illustrated in Figure
5.2. This example shows the wire configuration of the transfer and handshake lines. This example also
illustrates that a voltage other than 3.3V can be supplied to the FT220X’s IO port, this feature is
described further and for bus powered mode in Section 5.6.
Alternatively both the FT220X’s IO port and MCU can be powered from the 3V3OUT pin; this approach is
described in Section 5.5.
Copyright © Future Technology Devices International Limited 11
5.5 USB Bus Powered with Power Switching Configuration
MCU
IO0
MISO
SS#
SCLK
Solder Link JP2 - ClosedSolder Link JP1 - Closed
GND
s d
g
1K
0.1uF 0.1uF
Soft
Start
Circuit
PWREN#
CBUS3
P-Channel Power
MOSFET
Bus Powered
Mode
Self-Sorced
3.3V TTL Mode
VCC
10K
VCCIO
3V3OUT VBUS
VCC
5V
Viewing Pin thourgh the board
from the top.
Figure 5.3 – Bus Powered with Power Switching Configuration
USB bus powered mode is introduced in Section 5.3. This section describes how to use bus-powered
mode with a pow er switch.
USB bus powered circuits are required by USB compliance standards to consume less than 2.5mA (and
less than 100mA when not enumerated and not suspended) when connected to a host or hub when in
USB suspend mode. The PWREN# CBUS function can be used to remove power from external circuitry
whenever the FT220X is not enumerated. (Note: It is impossible to be in suspended mode when
enumerated.) (Note that Figure 5.3 is for illustration only and that the pins do not actually go all the way
through the PCB)
To implement a power switch using PWREN#, configure a P -Channel Power MOSFET to have a soft start
by fitting a 10K pull-up, a 1K series resistor and a 100nF cap as shown in Figure 5.3.
Connecting the source of the P-Channel MOSFET to 3V3OUT instead of VBUS can allow external logic to
source 3.3V power from the FT220X without breaking USB compliancy. In this setup it is important that
the VCCIO is not sourced from the drain of this MOSFET, this is because the power used to drive the gate
of this transistor is sourced from VCCIO. VCCIO should be connected directly to 3V3OUT for this setup to
function effectively. It is also important that the external logic must and IO core of the FT220X must not
draw more that 50mA, this is because the current limit of the internal 3.3V regulator is 50mA.
Copyright © Future Technology Devices International Limited 12
5.6 Variable IO Voltage Supply
MCU
Vcc = 1.8V – 3.3V
IO0
Optional
IO1
Optional
IO2
Optional
IO3
Solder Link JP2 - Closed
Solder Link JP1 - Open
GND
VCCIO
3V3OUT VBUS
VCC
IO0
SCLK
SS#
MISO
SCLK
SS#
MISO
Viewing Pin thourgh the board
from the top.
Figure 5.4 – USB Bus Powered 3.3V Logic Drive
The FT220X can process signals at CMOS/TTL logic levels in the range of 1.8V to 3.3V. This section
describes how to utilise this feature.
Figure 5.4 shows a configuration where the FT220X is interfaced to a device with IOs operating in the
range of 1.8V - 3.3V. The IO ports of this module need to be powered with a voltage level that is equal to
the level of the signals it is processing. Since the FT220X’s embedded voltage regulator only outputs 3V3
the IO ports will need to be powered from another power source when operating at voltage levels other
than 3.3V.
By default, a short is present between 3V3OUT (embedded voltage regulator) and VCCIO (IO port’s
power input) by solder links JP1. If an external power supply is used to power the IO ports this solder
links needs to be open. This can be done by removing the solder linking the two pads of the solder links.
The configuration described in this section can be implemented in either bus -powered mode or self-
powered mode.
Note 1: The CBUS and DBUS pins are 5V tolerant; however these signals cannot drive signals at 5V
TTL/CMOS. VCCIO is not 5V tolerant; applying 5V to VCCIO will damage the chip.
Copyright © Future Technology Devices International Limited 13
Note 2: If power is applied to VCCIO and no power is applied to VCC all IOs will be at an unknown state,
this however will not damage the chip. The FT220X also has protective circuitry to prevent the chip being
damaged by a voltage discrepancy between VCCIO and the level of the signal being processed.
Note 3: When using VCCIO less than 3V3 on a chip from FTDI’s X-chip range, it is recommended to use
pull up resistors (47K) to VCCIO on the data lines, all of the UMFT2xxXA-01 devices include an on-board
pull-up for these lines.
5.7 3.3V Voltage Supply
MCU
Vcc = 3.3V
IO0
SCLK
SS#
MISO
IO0
Optional
IO1
Optional
IO2
Optional
IO3
Solder Links JP2 - Open
Solder Links JP1 - Closed
GND
Vcc = 3.3V
VCCIO
3V3OUT VBUS
VCC
SCLK
SS#
MISO
Viewing Pin thourgh the board
from the top.
Figure 5.5 – USB Self Powered 3.3V Logic Drive
The FT220X can be powered from a single 3.3V supply. This feature is an alte rnative to having the
FT220X powered at 5V in standard self-powered configuration.
The 3.3V Self Powered configuration is illustrated in Figure 5.5. Note that the 3.3V net is connected to
VCC, VCCIO and 3V3OUT.
(Note that Figure 5.5 is for illustration only and that the pins do not actually go all the way through the
PCB)
Copyright © Future Technology Devices International Limited 14
5.8 Configuring the MTP ROM
The FT220X contains an embedded MTP ROM. This can be used to configure the functions of each CBUS
pin, the current drive on each signal pin, current limit for the USB bus and the other descriptors of the
device. For details on using the MTP ROM/EEPROM programming utility FT_PROG, please see the
FT_PROG User Guide and FT201X datasheet.
When programming the MTP ROM please note:
i) One of the CBUS Pins can be configured as PWREN# in the internal MTP ROM. This can be used to
switch the power supply to the external circuitry.
ii) The Max Bus Power setting of the MTP ROM should specify the maximum current to be drawn from
the USB host/hub when enumerated. For high-powered USB devices the current limit when
enumerated is between 100mA and 500mA, for low -powered USB devices the current limit is
100mA.
5.9 Module Dimensions
Figure 5.6 – UMFT220XA Module Dimensions
All dimensions are given in millimetres.
The UMFT220XA module exclusively uses lead free components, and is fully compliant with European
Union directive 2002/95/EC.
Copyright © Future Technology Devices International Limited 15
5.10 IC Package Markings
The date code format is YYXX where XX = 2 digit week number, YY = 2 digit year number. This is
followed by the revision letter.
The code XXXXXXX is the manufacturing LOT code.
FTDI
I
XXXXXXXXXX
FT220XQ
5
1
YYWW-D
8
12
Copyright © Future Technology Devices International Limited 16
6 UMFT220XA Module Circuit Schematic
Figure 6.1 – Module Circuit Schematic
Copyright © Future Technology Devices International Limited 17
7 Internal MTP ROM Configuration
Following a power-on reset or a USB reset the FT220X will scan its internal MTP ROM and read the USB
configuration descriptors stored there. The default values programmed into the internal MTP ROM in the
FT220XQ used on the UMFT220XA-01 and UMFT220XA-02 are shown in Table 8.1.
Parameter
Value
Notes
USB Vendor ID (VID)
0403h
FTDI default VID (hex)
USB Product UD (PID)
6015h
FTDI default PID (hex)
Binary Code Decimal (BCD)
1000h
FTDI default BCD (hex)
Serial Number Enabled?
Yes
Serial Number
See Note
A unique serial number is generated and programmed
into the MTP ROM during final test of the module.
Pull down I/O Pins in USB Suspend
Disabled
Enabling this option will make the device pull down on the
FT1248 interface lines when the power is shut off
(PWREN# is high).
Manufacturer Name
FTDI
Product Description
UMFT220XA-01
Max Bus Power C urrent
90mA
Power Source
Bus Powered
Device Type
FT220X
USB Version
0200
Returns USB 2.0 device description to the host. Note: The
device is a USB 2.0 Full Speed device (12Mb/s) as
opposed to a USB 2.0 High Speed device (480Mb/s).
Remote Wake Up
Enabled
Taking RI# low will wake up the USB host controller from
suspend.
High C urrent I/Os
Disabled
Enables the high drive level on the I2C and CBUS I/O
pins.
Load VCP Driver
Enabled
Makes the device load the CVP driver interface for the
device.
CBUS3
Tristate
Table 7.1 – Default Internal MTP ROM Configuration
The internal MTP ROM in the FT220X can be programmed over USB using the utility program FT_PROG.
FT_PROG can be downloaded from the www .ftdichip.com. Users who do not have their own USB vendor
ID but w ho would like to use a unique Product ID in their design can apply to FTDI for a free block of
unique PIDs. Contact FTDI Support (support1@ftdichip.com) for this service, also see TN_100 and
TN_101.
Copyright © Future Technology Devices International Limited 18
8 Contact Information
Head Office – Glasgow, UK
Branch Office – Tigard, Oregon, USA
Future Technology Devices International Limited
Unit 1, 2 Seaward Place, Centurion Business Park
Glasgow G41 1HH
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Copyright © Future Technology Devices International Limited 19
UMFT220XA Datasheet
Version 1.3
Doc ument Reference N o.: F T _000517 C learance N o.: FT DI# 2 6 7
Appendix A – References
Document References
DS_FT201x
DS_FT220X
DS_FT221X
DS_FT230X
DS_FT231X
DS_FT240X
DS_UMFT230XA
AN232R-01
AN_124 User Guide for FT Prog
TN_100 USB VID-PID Guidelines
TN_101 Guide to Debugging Customers Failed Driver Installation
Acronyms and Abbreviations
Terms
Description
DIP
Dual In-line Package
DLL
Dynamic Link Library
IC
Integrated Circuit
I²C
Inter Integrated Circuit
OS
Operating System
PCB
Printed Circuit Board
ROM
Read Only Memory
USB
Universal Serial Bus
VCP
Virtual COM Ports
Copyright © Future Technology Devices International Limited 20
UMFT220XA Datasheet
Version 1.3
Doc ument Reference N o.: F T _000517 C learance N o.: FT DI# 2 6 7
Appendix B - List of Figures and Tables
List of Figures
Figure 4.1 – Module Pin Out ................................................................................................................... 5
Figure 5.1 – Bus Powered Configuration.................................................................................................. 9
Figure 5.2 – Self-Powered Configuration ............................................................................................... 10
Figure 5.3 – Bus Powered w ith Power Switching Configuration .............................................................. 11
Figure 5.4 – USB Bus Powered 3.3V Logic Drive.................................................................................... 12
Figure 5.5 – USB Self Powered 3.3V Logic Drive ................................................................................... 13
Figure 6.1 – UMFT220XA Module Dimensions ........................................................................................ 14
Figure 8.1 – Module Circuit Schematic .................................................................................................. 16
List of Tables
Table 4.1 – Module Pin Out Description................................................................................................... 6
Table 4.2 – CBUS Signal Options ............................................................................................................ 7
Table 5.1 – Solder Links JP1 Pin Description ........................................................................................... 8
Table 5.2 – Solder Links JP2 Pin Description ........................................................................................... 8
Table 9.1 – Default Internal MTP ROM Configuration ............................................................................. 17
Copyright © Future Technology Devices International Limited 21
UMFT220XA Datasheet
Version 1.3
Doc ument Reference N o.: F T _000517 C learance N o.: FT DI# 2 6 7
Appendix C – Revision History
Document Title: UMFT220XA USB to 4-bit SPI/FT1248 Development Module
Document Reference No.: FT_000517
Clearance No.: FTDI# 267
Product Page: http://www.ftdichip.com/FT-X.htm
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Revision
Changes
Date
1.0
Initial Release
2012-02-09
1.0
Added links, references to silicon revision, TID and
logos
2012-06-13
1.2
Added a section for package marking and changed
TIDs
2013-01-29
1.3
Added ordering information and support for Win 10
2016-04-12