DM74LS123M - Fairchild Semiconductor

August 1986

Revised April 2000

DM74LS123 Dual Retriggerable One-Shot with Clear and Complementary Outputs

DM74LS123

Dual Retriggerable One-Shot

with Clear and Complementary Outputs

General Description

The DM7 4LS123 is a dual ret riggerable monostable mu lti-

vibrator capable of generating output pulses from a few

nano-seco nds to e xtremel y long du ration up to 100 % duty

cycle. Each device has three inputs permitting the choice of

either lead ing edg e or trailin g edge trigg erin g. Pin (A) is an

active-LO W tra nsi tio n t rigg er input an d p in (B ) is an acti v e-

HIGH transition trigger in put. The clear (CLR) input termi-

nates the output pulse at a predetermined time indepen-

dent of the ti min g co mp one nts. The clear inpu t al so ser ves

as a trigger input when it is pulsed with a low level pulse

transition (



). To obtain the best trouble free operation

from thi s devic e please read th e oper ating ru les as well as

the Fairchild Semiconductor one-shot application notes

carefully and observe recommendations.

Features

■DC triggere d from active-H IGH tra nsition or active-LO W

transition inputs

■Retriggerable to 100% duty cycle

■Compensated for VCC and temperature variations

■Triggerable from CLEAR input

■DTL, TTL compat ible

■Input clamp diodes

Ordering Code:

Devices also available in Ta pe and Reel. Speci fy by appending the s uffix let t er “X” to the o rdering code.

Connection Diagram Function Table

H = HIGH Lo gic Level

L = LOW Logic L ev el

X = Can Be Either LOW or HIGH

↑ = Positive Going Transition

↓ = Negative Going Transition



= A Positive Pulse



= A Negative Pulse

Order Number Package Number Package Description

DM74LS123M M16A 16-Lead Smal l Outline Integrated Circuit (SOIC), JEDE C MS-012, 0.150 Narrow

DM74LS123SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

DM74LS123N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Inputs Outputs

CLEAR A B Q Q

LXXLH

XHXLH

XXLLH

HL↑



H↓H



↑LH



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DM74LS123

Functional Description

The basic output pulse width is determined by selection of

an external resistor (RX) and capacitor (CX). Once trig-

gered, the basic pulse width may be extended by retrigger-

ing the gated active-LOW transition or active-HIGH

transition inputs or be reduced by use of the active-LOW or

CLEAR input. Retriggering to 100% duty cycle is possible

by application of an input pulse train whose cycle time is

shorter than the output cycle time such that a continuous

“HIGH” logic state is maintained at the “Q” output.

Operating Rules

1. An exter nal resi stor (RX) and an external capacitor (CX)

are req ui re d fo r pr op er o per ati o n. T he value of C X may

vary from 0 to any necessary value. For small time con-

stants high-gra de mica, glass, polypropylene, polycar-

bonate, or polystyrene material capacitors may be

used. For large time constants use tantalum or special

aluminum capacitors. If the timing capacitors have

leakages approaching 100 nA or if stray capacitance

from ei the r term ina l to groun d i s grea ter than 50 pF the

timing equ ati o ns m ay no t rep re sen t the pulse wid th th e

device generates.

2. W hen an ele ctrolyti c capa citor i s use d for CX a switch -

ing dio de is often requir ed for standard TTL one -shots

to preve nt hig h inverse leakage current . Thi s switchin g

diod e is not needed f or the DM7 4LS123 one-sho t and

shou ld no t be use d. I n ge ner al th e u se of the sw itchi n g

diode is not recommended with retriggerable operation.

Furthermore, if a polarized timing capacitor is used on

the DM 74LS123 the nega tive terminal of th e capacitor

should be connected to the “CEXT” pin of the device

(Figure 1).

FIGURE 1.

3. For CX >> 1000 pF the output pulse width (tW) is

defined as f ollows :

tW = KRX CX

where [RX is in kΩ]

[CX is in pF]

[tW is in ns]

K ≈ 0.37

4. The multiplicative factor K is plo tted as a function of C X

below for design considerations:

FIGURE 2.

5. For CX < 1000 pF see Figure 3 for tW vs. CX family

curves with RX as a parameter:

FIGURE 3.

6. To obtain variable pulse widths by remote trimming, the

following circuit is recommended:

FIGURE 4.

“Rremote” should be as close to the device pin as possible.

7. The retriggerable pulse width is calculated as shown

below:

T = tW + tPLH = K × RX × CX + tPLH

The retri ggered pulse width is equal to the pulse wi dth

plus a delay time period (Figure 5).

FIGURE 5.

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DM74LS123

Operating Rules (Continued)

8. Outp ut pulse width va riation versus VCC and temp era-

tures: Figure 6 depicts the relationship between pulse

width variat ion versus VCC, and Figu re 7 depicts pul se

width variation versus temperatures.

FIGURE 6.

FIGURE 7.

9. Under any operating condition CX and RX must be kept

as close to the one-shot device pins as possible to min-

imize stray capacitance, to reduce noise pick-up, and

to reduce I-R and Ldi/ dt voltage develo ped along t heir

connecting paths. If th e lead length fr om C X to pins (6)

and (7) o r pins (14) and (15) is greater than 3 cm, for

example, the output pulse width might be quite different

from values predicted from the appropriate equations.

A non-inductive and low capacitive path is necessary to

ensure complete discharge of CX in each cycle of its

operation so that the output pulse width will be accu-

rate.

10. The CEXT pins of this device are internally connected to

the internal groun d. For optimum system performance

they should be hard wired to the system’s return

ground plane.

11. VCC and ground wiring should conform to good high-

frequency standards and practices so that switching

transients on the VCC and ground return leads do not

caus e in ter acti on be twee n one -sh ots. A 0.01 µF to 0.10

µF bypass capacitor (disk ceramic or monolithic type)

from VCC to grou nd is necessar y on each de vice. Fur-

thermore, the bypass capacitor should be located as

close to the VCC-pin as space permits.

Note: For further detailed device characteristics and output per-

formance please refer to the Fairchild Semiconductor one-shot

application note AN-372.

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DM74LS123

Absolute Maximum Ratings(Note 1) Note 1: The “Absolute Maximum Ratings” are thos e values bey ond which

the saf ety of the device cannot be gu aranteed. Th e device shoul d not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum ratings.

The “R ecomm ended Oper ating Co ndition s” table will def ine the condit ions

for actu al device operation.

Recommended Operating Conditions

Note 2: TA = 25°C and VCC = 5V.

Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted)

Note 3: All typical s are at VCC = 5V, TA = 25°C.

Note 4: Not more tha n one out put shoul d be shorte d at a t im e, and the duration sh ould not ex c eed one s ec ond.

Note 5: Quiescent ICC is me as ured (aft er clearin g) with 2.4V applied to all c lear and A inputs, B inputs gr ounded, all outputs OPEN , CEXT = 0.02 µF,

and REXT = 25 kΩ.

Note 6: ICC is measu red in the tri ggered sta t e w it h 2. 4V applie d t o all clear and B inputs , A inputs gro unded, all outputs OPEN, CEXT = 0.02 µF,

and REXT = 25 kΩ.

Note 7: With all outputs OPEN and 4.5V applied to all data and clear inputs, ICC is measure d af t er a mome nt ary grou nd, then 4.5V is applied to the clock.

Supply Voltage 7V

Input Voltag e 7V

Operating Free Air Temperature Range 0°C to +70°C

Storage Temperature −65°C to +150°C

Symbol Parameter Min Nom Max Units

VCC Supply Voltage 4.75 5 5.25 V

VIH HIGH Level Input Voltage 2 V

VIL LOW Level Inp ut Voltage 0.8 V

IOH HIGH Level Output Current −0.4 mA

IOL LOW Level Output Current 8 mA

tWPulse Widt h A or B HIGH 40

(Note 2) A or B LOW 40 ns

Clear LOW 40

REXT External Timing Resistor 5 260 kΩ

CEXT External Timing Capacitance No Restriction µF

CWIRE Wiring Capacitance at REXT/CEXT Termina l 50 pF

TAFree Air Ope rat ing Temper atu re 0 70 °C

Symbol Parameter Conditions Min Typ Max Units

(Note 3)

VIInput Clamp Voltage VCC = Min, II = −18 mA −1.5 V

VOH HIGH Level VCC = Min, IOH = Max 2.7 3.4 V

Output Voltage VIL = Max, VIH = Min

VOL LOW Level VCC = Min, IOL = Max 0.35 0.5

Output Voltage VIL = Max, VIH = Min V

IOL = 4 mA, VCC = Min 0.25 0.4

IIInput Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA

IIH HIGH Level Input Current V CC = Max, VI = 2.7V 20 µA

IIL LOW Level Input Current VCC = Max, VI = 0.4V −0.4 mA

IOS Short Circuit Output Current VCC = Max (Note 4) −20 −100 mA

ICC Supply Current VCC = Max (Note 5)(Note 6)(Note 7) 12 20 mA

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DM74LS123

Switching Characteristics

at VCC = 5V and TA = 25°C

Symbol Parameters

RL = 2 kΩ

Units

From (Input ) CL = 15pF CL = 15pF

To (Output) CEXT = 0 pF, REXT = 5 kΩCEXT = 1000 pF, REXT = 10 kΩ

Min Max Min Max

tPLH Propagation Delay Time A to Q 33 ns

LOW-to-HIGH Level Output

tPLH Propagation Delay Time B to Q 44 ns

LOW-to-HIGH Level Output

tPHL Propagation Delay Time A to Q 45 ns

HIGH-to-LOW Level Output

tPHL Propagation Delay Time B to Q 56 ns

HIGH-to-LOW Level Output

tPLH Propagation Delay Time Clear to Q 45 ns

LOW-to-HIGH Level Output

tPHL Propagation Delay Time Clear to Q 27 ns

HIGH-to-LOW Level Output

tWQ(Min) Minimum Width of Pulse A or B to Q 200 ns

at Output Q

tW(out) Output Pulse Width A or B to Q 4 5 µs

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DM74LS123

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

Package Number M16A

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DM74LS123

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M16D

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DM74LS123 Dual Retriggerable One-Shot with Clear and Complementary Outputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N16E

Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

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which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a lif e supp ort

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device or system, or to affect its safety or effectiveness.