PI6C20800B
Features
6 LVDS outputs
Up to 1.5GHz output frequency
Ultra low additive phase jitter: < 0.03 ps (typ) (dierential
156.25MHz, 12KHz to 20MHz integration range)
Single dierential input
Low delay from input to output (Tpd typ. < 1.5ns)
Separate Input output supply voltage for level shiing
2.5V / 3.3V power supply
Industrial temperature support
TSSOP-24 package
PI6C4921506
Block Diagram Pin Conguration (24-Pin TSSOP)
Description
e PI6C4921506 is a high performance fanout buer device-
which supports up to 1.5GHz frequency. e device also uses
Pericom's proprietary input detection technique to make sure
illegal input conditions will be detected and reected by output
states. is device is ideal for systems that need to distribute low
jitter clock signals to multiple destinations.
Applications
Networking systems including switches and Routers
High frequency backplane based computing and telecom
platforms
High Performance LVDS Fanout Buffer
1
2
3
VDDO 4
Q0 5
VDD
6
GND 7
nQ48
nQ0
GND
VDD
VDDO
Q5
GND
Q1
24
23
22
21
20
19
18
17
nCLK
CLK
nQ5
GND
Q49nQ1 16
VDDO10VDDO 15
nQ311Q2 14
Q312 13
nQ2
1www.pericom.com Rev B 06/18/15
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PI6C4921506
High Performance LVDS Fanout Buer
2www.pericom.com Rev B 06/18/15
Pin # Pin Name Ty pe Description
1, 2 nCLK Input Dierential clock input
CLK
3, 22 V
DD
Power Power supply
4, 10, 15, 21 V
DDO
Power IO power supply
5, 6 Q0
nQ0 Output LVDS output clock
7, 18, 23, 24 GND Power Ground
8, 9 Q1
nQ1 Output LVDS output clock
11, 12 Q2
nQ2 Output LVDS output clock
13, 14 Q3
nQ3 Output LVDS output clock
16, 17 Q4
nQ4 Output LVDS output clock
19, 20 Q5
nQ5 Output LVDS output clock
Pinout Table
Inputs Outputs
Input to Output Mode Polarity
CLK nCLK Q0:Q5 nQ0:nQ5
0 1 LOW HIGH Dierential to Dierential Non Inverting
1 0 HIGH LOW Dierential to Dierential Non Inverting
0Biased LOW HIGH Single Ended to Dierential Non Inverting
1Biased HIGH LOW Single Endded to Dierential Non Inverting
Biased 0HIGH LOW Single Endded to Dierential Inverting
Biased 1LOW HIGH Single Endded to Dierential Inverting
Clock Input Function Table
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PI6C4921506
High Performance LVDS Fanout Buer
3www.pericom.com Rev B 06/18/15
Power Supply DC Characteristics (VDD = VDDO = 3.3V±5%, TA = -40°C TO 85°C)
Symbol Parameter Test Condition Min. Ty p. Max. Units
VDD Positive Supply Voltage 3.135 3.3 3.465 V
VDDO Output Supply Voltage 3.135 3.3 3.465 V
IDD Power Supply Current 70 mA
IDDO Output Supply Current 100 mA
Power Supply DC Characteristics (VDD = VDDO = 2.5V±5%, TA = -40°C TO 85°C)
Symbol Parameter Test Condition Min. Ty p. Max. Units
VDD Positive Supply Voltage 2.375 2.5 2.625 V
VDDO Output Supply Voltage 2.375 2.5 2.625 V
IDD Power Supply Current 65 mA
IDDO Output Supply Current 102 mA
Differential DC Characteristics (VDD = VDDO = 3.3V±5% or 2.5V±5%, TA = -40°C TO 85°C)
Symbol Parameter Test Condition Min. Ty p. Max. Units
IIH Input High Current
CLK VIN = VDD 10 μA
nCLK VIN = VDD 150 μA
IIL Input Low Current
CLK VIN = 0V -150 μA
nCLK VIN = 0V -10 μA
VPP Peak-to-Peak Input Voltage(1) 0.15 1.3 V
VCMR Common Mode Input Voltage(1, 2) GND+0.5 VDD-0.85 V
Note:
1. VIL should not be less than -0.3V
2. Common mode voltage is dened as VH
Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested)
Supply Voltage, VDD ................................................................ 4.65V
Inputs, VI ............................................................ 0.5V to VDD +0.5V
Outputs, IO (LVDS)
Continuous Current ........................................................... 10mA
Surge Current ...................................................................... 15mA
Package ermal Impedence, ΘJA ....................... 70°C/W (0 mps)
Storage temperature, TSTG (Junction-to-Ambient)
...................................................................................... -65 to +150ºC
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. is
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specication is not implied.
Exposure to absolute maximum rating conditions for
extended periods may aect reliability.
15-0080
PI6C4921506
High Performance LVDS Fanout Buer
4www.pericom.com Rev B 06/18/15
LVDS DC Characteristics (VDD = VDDO = 3.3V±5%, TA = -40°C TO 85°C)
Symbol Parameter Test Condition Min. Ty p. Max. Units
VOD Dierential Output Voltage 326 526 mV
ΔVOD VOD Magnitude Change 50 mV
VOS Oset Voltage 1.2 1.3 V
ΔVOS VOS Magnitude Change 50 mV
Note:
Please refer to Parameter Measurement Information for output information.
LVDS DC Characteristics (VDD = VDDO = 2.5V±5%, TA = -40°C TO 85°C)
Symbol Parameter Test Condition Min. Ty p. Max. Units
VOD Dierential Output Voltage 305 505 mV
ΔVOD VOD Magnitude Change 50 mV
VOS Oset Voltage 1.15 1.3 V
ΔVOS VOS Magnitude Change 50 mV
Note:
Please refer to Parameter Measurement Information for output information.
AC Characteristics (VDD = VDDO = 3.3V±5%, TA = -40°C TO 85°C)
Symbol Parameter Test Condition Min. Ty p. Max. Units
fMAX Output Frequency 1.5 GHz
tPD Propagation Delay(1) 800 1100 ps
tsk(o) Output Skew(2, 3) 55 ps
tjit Buer Additive Phase Jitter, RMS
622.08MHz,
Integration Range: 12kHz –
20MHz
0.067 ps
tR / tFOutput Rise/Fall Time 20% to 80% 50 250 ps
odc Output Duty Cycle ≤ 622MHz 47 53 %
Note:
Electrical parameters are guaranteed over the specied ambient operating temperature range, which is established when the device is mounted in a test socket
with maintained transverse airow greater than 500 lfpm. e device will meet specications aer thermal equilibrium has been reached under these conditions.
1. Measured from the dierential input crossing point to the dierential output crossing point.
2. Dened as skew between outputs at the same supply voltage and with equal load conditions. Measured from at the output dierential cross points.
3. is parameter is dened in accordance with JEDEC Standard 65.
15-0080
PI6C4921506
High Performance LVDS Fanout Buer
5www.pericom.com Rev B 06/18/15
AC Characteristics (VDD = VDDO = 2.5V±5%, TA = -40°C TO 85°C)
Symbol Parameter Test Condition Min. Ty p. Max. Units
fMAX Output Frequency 1.5 GHz
tPD Propagation Delay(1) 800 1200 ps
tsk(o) Output Skew(2, 3) 55 ps
tjit Buer Additive Phase Jitter, RMS
622.08MHz,
Integration Range: 12kHz –
20MHz
0.067 ps
tR / tFOutput Rise/Fall Time 20% to 80% 50 250 ps
odc Output Duty Cycle ≤ 622MHz 47 53 %
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PI6C4921506
High Performance LVDS Fanout Buer
6www.pericom.com Rev B 06/18/15
Propagation Delay Output Skew
Part to Part Skew
CLK/ nCLK T
PLH
Q
Propagation Delay T
T
F
T
PHL
V
OH
V
OL
T
SK
=
T
PLH2
-
T
PLH1
or
T
SK
=
T
PHL2
-
T
PHL1
PD
T
R
CLK/nCLK T
PLHx
V
IH
V
IL
Qn
Output Skew T
Qn+1
T
PLHy
T
SK
T
PHLy
T
SK
T
PHLx
V
OH
V
OL
V
OH
V
OL
T
SK
=
T
PLHy
-
T
PLHx
or
T
SK
=
T
PHLy
-
T
PHLx
SK
CLK/nCLK T
PLH1
V
IH
V
IL
Part1 Q
Part-to-Part Skew
Part2 Q
T
PLH2
T
SK
T
PHL2
T
SK
T
PHL1
V
OH
V
OL
V
OH
V
OL
T
SK
=
T
PLH2
-
T
PLH1
or
T
SK
=
T
PHL2
-
T
PHL1
15-0080
PI6C4921506
High Performance LVDS Fanout Buer
7www.pericom.com Rev B 06/18/15
Conguration Test Load Board Termination for LVDS outputs
100
Z = 50
o
Z = 50
o
LVDS Buffer
V
DDQx
L = 0 ~ 10 in.
15-0080
PI6C4921506
High Performance LVDS Fanout Buer
8www.pericom.com Rev B 06/18/15
Packaging Mechanical: 24-Contact TSSOP (L)
DATE: 05/03/12
DESCRIPTION: 24-pin, 173mil Wide TSSOP
PACKAGE CODE: L
DOCUMENT CONTROL #: PD-1312 REVISION: F
Notes:
1. Refer JEDEC: MO-153F/AD
2. Controlling dimensions in millimeters
3. Package outline exclusive of mold flash and metal burr
12-0374
Ordering Information
Ordering Number Package Code Package Description
PI6C4921506LIE L Pb-free & Green 24-Contact TSSOP
PI6C4921506LIEX L Pb-free & Green 24-Contact TSSOP, Tape & Reel
• ermal characteristics can be found on the company web site at www.pericom.com/packaging/
• E = Pb-free and Green
• X sux = Tape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336
Please check for the latest package information on the Pericom web site at www.pericom.com/packaging/
15-0080
