1PS8770 06/23/05
PI6C48545
Block Diagram
Features
• Maximum operation frequency: 650 MHz
• 4 pair of differential LVDS outputs
• Selectable CLK0 and CLK1 inputs
• CLK0, CLK1 accept LVCMOS, LVTTL input level
• Output Skew: 40ps (maximum)
• Part-to-part skew: 300ps (maximum)
• Propagation delay: 2.2ns (maximum)
• 3.3V power supply
• Pin-to-pin compatible to ICS8545
• Operating Temperature: -40oC to 85oC
• Packaging (Pb-free & Green):
- 20-pin TSSOP (L)
3.3V Low Skew 1-to-4
LVTTL/LVCMOS to LVDS Fanout Buffer
Description
The PI6C48545 is a high-performance low-skew LVDS fanout
buffer. PI6C48545 features two selectable single-ended clock in-
puts and translate to four LVDS outputs. The CLK0 and CLK1
inputs accept LVCMOS or LVTTL signals. The outputs are
synchronized with input clock during asynchronous assertion/
deassertion of CLK_EN pin. PI6C48545 is ideal for single-ended
LVTTL/LVCMOS to LVDS translations. Typical clock transla-
tion and distribution applications are data-communications and
telecommunications.
Pin Diagram
CLK_EN
CLK0
CLK1
CLK_SEL
OE
Q3
nQ3
Q1
nQ1
Q2
nQ2
Q0
nQ0
0
1
D
LE
Q
GND
CLK_EN
CLK_SEL
CLK0
NC
CLK1
NC
OE
GND
VCC
Q0
nQ0
VCC
Q1
nQ1
Q2
nQ2
GND
Q3
nQ3
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PI6C48545
3.3V Low Skew 1-to-4
LVTTL/LVCMOS to LVDS Fanout Buffer
2PS8770 06/23/05
Pin Description
Name Pin # Type Description
GND 1, 9, 13 P Connect to Ground
CLK_EN 2 I_PU
Synchronizing clock enable. When high, clock outputs follow clock input. When low, Qx
outputs are forced low, nQx outputs are forced high. LVCMOS/LVTTL level with 80kΩ
pull up.
CLK_SEL 3 I_PD Clock select input. When high, selects CLK1 input. When low, selects CLK0 input.
LVCMOS/LVTTL level with 80kΩ pull down.
CLK04 I_PD LVCMOS / LVTTL clock input
CLK16 I_PD LVCMOS / LVTTL clock input
NC 5, 7 No internal connection.
OE 8 I_PU Output Enable. Controls outputs Q0, nQ0 through Q3, nQ3.
VCC 10, 18 P Connect to 3.3V.
Q3, nQ311, 12 O Differential output pair, LVDS interface level.
Q2, nQ214, 15 O Differential output pair, LVDS interface level.
Q1, nQ116, 17 O Differential output pair, LVDS interface level.
Q0, nQ019, 20 O Differential output pair, LVDS interface level.
Notes:
1. I = Input, O = Output, P = Power supply connection, I_PD = Input with pull down, I_PU = Input with pull up.
Pin Characteristics
Symbol Parameter Conditions Min. Typ. Max. Units
CIN Input Capacitance 6 pF
R_pullup Input Pullup Resistance 80 kΩ
R_pulldown Input Pulldown Resistance 80
Control Input Function Table
Inputs Outputs
OE CLK_EN CLK_SEL Selected Source Q0:Q3 nQ0:nQ3
1 0 0 CLK0Diasbled: Low Diasbled: High
1 0 1 CLK1Disabled: Low Disabled: High
1 1 0 CLK0Enabled Enabled
1 1 1 CLK1Enabled Enabled
0 x x HiZ HiZ
Notes:
1. After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as show below.
PI6C48545
3.3V Low Skew 1-to-4
LVTTL/LVCMOS to LVDS Fanout Buffer
3PS8770 06/23/05
Figure 1. CLK_EN Timing Diagram
Clock Input Function Table
Inputs Outputs
CLK0 or CLK1Q0:Q3 nQ0:nQ3
0 LOW HIGH
1 HIGH LOW
Absolute Maximum Ratings
Symbol Parameter Conditions Min. Typ. Max. Units
VCC Supply voltage Referenced to GND 4.6
VVIN Input voltage Referenced to GND -0.5 VCC+0.5V
VOUT Output voltage Referenced to GND -0.5 VCC+0.5V
TSTG Storage temperature -65 150 oC
Notes:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress speci
cations only and correct functional operation of the device at these or any other conditions above those listed in the operational sections of
the specications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Operating Conditions
Symbol Parameter Conditions Min. Typ. Max. Units
VCC Power Supply Voltage 3.135 3.3 3.465 V
TAAmbient Temperature -40 85 oC
ICC Power Supply Current 60 mA
Disabled Enabled
CLK
0
CLK
1
CLK_EN
nQ0:nQ3
Q0:Q3
Disabled Enabled
PI6C48545
3.3V Low Skew 1-to-4
LVTTL/LVCMOS to LVDS Fanout Buffer
4PS8770 06/23/05
AC Characteristics (TA = -40oC to 85oC, VCC = 3.135V to 3.465V)
Symbol Parameter Conditions Min. Typ. Max. Units
fmax Output Frequency 650 MHz
tPd Propagation Delay(1) 0.8 2.2 ns
Tsk(o) Output-to-output Skew(2) 40
psTsk(pp) Part-to-part Skew(3) 300
tr/tfOutput Rise/Fall time 20% - 80% 100 300
odc Output duty cycle 48 52 %
Notes:
1. Measured from the VCC/2 of the input to the differential output crossing point
2. Dened as skew between outputs at the same supply voltage and with equal load condition. Measured at the outputs differential crossing point.
3. Dened as skew between outputs on different parts operating at the same supply voltage and with equal load condition. Measured at the
outputs differential crossing point.
4. All parameters are measured at 500MHz unless noted otherwise
LVDS DC Characteristics (TA = -40oC to 85oC, VCC = 3.135V to 3.465V unless otherwise stated below.)
Symbol Parameter Conditions Min. Typ. Max. Units
VOD Differential Output Voltage 200 280 360 mV
∆VOD VOD Magnitude Change 0 40
VOS Offset Voltage 1.125 1.3 1.475 V
∆VOS VOS Magnitude Change 5 25 mV
IOZ High Impedance Leakage Current -10 +10 µA
IOFF Power OFF Leakage -20 ±1 +20
IOSD Differential Output Short Circuit Current -3.5 -5 mA
IOS Output Short Circuit Current -3.5 -5
VOH Output Voltage High 1.34 1.6 V
VOL Output Voltage Low 0.9 1.06
LVCMOS/LVTTL DC Characteristics (TA = -40oC to 85oC, VCC = 3.135V to 3.465V unless otherwise stated below.)
Symbol Parameter Conditions Min. Typ. Max. Units
VIH Input High
Voltage
CLK0, CLK1, CLK_EN,
CLK_SE, OE 2 VCC+0.3 V
VIL Input Low
Voltage
CLK0, CLK1-0.3 1.3 V
CLK_EN, CLK_SEL, OE -0.3 0.8 V
IIH Input High
Current
CLK0, CLK1, CLK_SEL VIN = VCC = 3.465V 150 uA
CLK_EN, OE VIN = VCC = 3.465V 5 uA
IIL Input Low
Current
CLK0, CLK1, CLK_SEL VIN = 0V, VCC = 3.465V -5 uA
CLK_EN, OE VIN = 0V, VCC = 3.465V -150 uA
PI6C48545
3.3V Low Skew 1-to-4
LVTTL/LVCMOS to LVDS Fanout Buffer
5PS8770 06/23/05
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
Packaging Mechanical: 20-Pin TSSOP (L)
Ordering Information
Ordering Code Package Code Package Description
PI6C48545LE L Pb-free & Green 20-pin 173-mil wide TSSOP
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. Number of Transistors = TBD
.252
.260
.047
1.20
.002
.006
SEATING
PLANE
.0256
BSC
.018
.030
.004
.008
.238
.269
1
20
.169
.177
0.05
0.15
6.1
6.7
0.45
0.75
0.09
0.20
4.3
4.5
6.4
6.6
0.65 0.19
0.30
.007
.012
Max
