Memory Module Specifications KVR1333D3S8R9S/2GI 2GB 1Rx8 256M x 72-Bit PC3-10600 CL9 Registered w/Parity 240-Pin DIMM DESCRIPTION SPECIFICATIONS This document describes ValueRAM's 256M x 72-bit (2GB) CL(IDD) 9 cycles DDR3-1333 CL9 SDRAM (Synchronous DRAM), registered w/ Row Cycle Time (tRCmin) 49.5ns (min.) Refresh to Active/Refresh Command Time (tRFCmin) 160ns (min.) based on nine 256M x 8-bit DDR3-1333 FBGA components. The SPD is programmed to JEDEC standard latency DDR3- Row Active Time (tRASmin) 36ns (min.) 1333 timing of 9-9-9. This 240-pin DIMM uses gold contact Power (Operating) 1.545 W* parity, Intel (R) Compatibility Tested, 1Rx8 ECC memory module, fingers. The electrical and mechanical specifications are as follows: UL Rating 94 V - 0 Operating Temperature 0o C to 85o C Storage Temperature -55o C to +100o C FEATURES * JEDEC standard 1.5V (1.425V ~1.575V) Power Supply * VDDQ = 1.5V (1.425V ~ 1.575V) * 667MHz fCK for 1333Mb/sec/pin * 8 independent internal bank * Programmable CAS Latency: 9, 8, 7, 6 * Programmable Additive Latency: 0, CL - 2, or CL - 1 clock * Programmable CAS Write Latency(CWL) = 7 (DDR3-1333) * 8-bit pre-fetch * Burst Length: 8 (Interleave without any limit, sequential with starting address "000" only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS] * Bi-directional Differential Data Strobe * Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm 1%) * On Die Termination using ODT pin * On-DIMM thermal sensor (Grade B) * Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE < 95C * Asynchronous Reset * PCB : Height 1.180" (30.00mm), double sided component *Power will vary depending on the SDRAM and Register/PLL used. Continued >> Document No. VALUERAM0995-001.A00 07/07/11 Page 1 MODULE DIMENSIONS: (units = millimeters) Document No. VALUERAM0995-001.A00 Page 2