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Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers
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to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
April 2017
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 www.onsemi.com
FPF3042 — IntelliMAX™ 18 V-Rated, Dual-Input, Single-Output, Power-Source-Selector Switch
FPF3042
IntelliMAX™ 18 V-Rated, Dual-Input, Single-Output,
Power-Source-Selector Switch
Features
Dual-Input, Single-Output Load Switch (DISO)
Input Supply Operating Range:
- 4.0 V~12.4 V at VIN
- 4.0 V~12.4 V at VBUS
Typical RON:
- 95 mΩ at VIN=5 V
- 70 mΩ at VBUS=5 V
Bidirectional Switch for VIN and VBUS
Slew Rate Controlled:
- 50 µs at VIN for < 4.7 µF COUT
- 90 µs at VBUS for < 4.7 µF COUT
Maximum ISW: 2.7 A per Channel
Break-Before-Make Transition
Under-Voltage Lockout (UVLO)
Over-Voltage Lockout (OVLO)
Thermal Shutdown
Logic CMOS IO Meets JESD76 Standard for GPIO
Interface and Related Power Supply Requirements
ESD Protected:
- Human Body Model: >3 kV
- Charged Device Model: >1.5 kV
- IEC 61000-4-2 Air Discharge: >15 kV
- IEC61000-4-2 Contact Discharge: >8 kV
Description
The FPF3042 is an 18 V-rated Dual-Input Single-Output
(DISO) load switch consisting of two channels of slew-
rate-controlled, low-on-resistance, N-channel MOSFET
switches with protection features. The slew-rate-
controlled turn-on characteristic prevents inrush current
and the resulting excessive voltage droop on the input
power rails. The input voltage range operates from 4.0 V
to 12.4 V at both VBUS and VIN to align with the needs of
high-voltage portable device power rails.
Both VIN and VBUS have the over-voltage protection of
14 V (typical) to avoid damage to the system.
VIN and VBUS bidirectional switching allows reverse
current from VOUT to VIN or VBUS for On-The-Go, (OTG)
Mode. The switching is controlled by logic input EN and
VIN_SEL is capable of interfacing directly with low-voltage
control signal General-Purpose Input / Output (GPIO).
FPF3042 is available in 1.76 mm x 1.96 mm Wafer-
Level Chip-Scale Package (WLCSP), 16-bump, 0.4 mm
pitch.
Applications
Input Power-Selection Block Supporting USB and
Wireless Charging
Smart Phone / Tablet PC
Ordering Information
Part Number
Top
Mark
Channel
Typical RON per
Channel at 5 VIN
Rise Time (tR)
Package
FPF3042UCX
TR
DISO
95 mΩ for VIN
50 µs for VIN
16-Bump, 1.76 mm x 1.96 mm,
Wafer-Level Chip-Scale Package
(WLCSP), 0.4 mm Pitch
70 mΩ for VBUS
90 µs for VBUS
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 2 www.onsemi.com
Application Diagram
COUT
FPF3042
VIN VOUT
VBUS
CIN1
CIN2
OFF
VIN_SEL
DF_IN
Other_VIN_AVA
V_I/O
VIN
VBUS
VOUT
ON
GND
EN
GND
VOUT
VOUT
VIN
VBUS
Figure 1. Typical Application
FPF3042
EN
R1
20 kΩ
R2
30 kΩ
1.8V GPIO
Charger
5V charging voltage at VOUT creates 3V at EN when
Q1 gate is LOW (OFF)
Note:
Q1 gate should be HIGH (ON) when not in OTG mode.
VOUT
Q1
Figure 2. Example Circuit for OTG Operation with Low-Voltage GPIO
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 3 www.onsemi.com
Block Diagram
TSD
VREF Gate Driver
&
Logic Control
VCC
C1
C2
FPP3042
VIN
VBUS
VIN_SEL
Other_VIN_AVA
DF_IN
VOUT
VBUS
VOUT
GND
EN
C1
HV Power Device
SW1
C2
HV Power Device
SW2
VIN
VMAX
OVP
VCC
Startup
Reference Voltage
Reference Current
Thermal Protection
VCC
VGATE
GND
VOUT
VOUT
VIN
VBUS
Figure 3. Functional Block Diagram
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 4 www.onsemi.com
Pin Configuration
Figure 4. Pin Assignment (Top View)
Figure 5. Pin Assignment (Bottom View)
Pin Description
Pin #
Name
Input / Output
Description
A1, B1, C1
VBUS
Input / Output
VBUS at USB: Power input / output; bi-directional switch when
VIN_SEL = LOW.
A4, B4, C4
VIN
Input / Output
VIN Supply Input: Power input / output; bi-directional switch
when VIN_SEL = HIGH.
A2, A3, B3, C3
VOUT
Input / Output
Switch Output: Power input / output
C2
EN
Input
Enable: Active HIGH;
EN voltage ≥ 2.5 V can power internal circuit when VIN and VBUS
are absent.
1 MΩ pull-down resistor is included.
D4
VIN_SEL
Input / Output
Supply Selector & Status: Input power source selection input
and status output. This signal is ignored during EN=LOW.
Selector input during EN=HIGH:
HIGH = switch VIN to VOUT / LOW = switch VBUS to VOUT.
Status output during EN=LOW:
HIGH = VIN is used for VOUT / LOW = VBUS is used for VOUT.
D3
DF_IN
Input
Default Supply Selector during EN=LOW:
Floating = VBUS connects to VOUT.
LOW = VIN connects to VOUT.
This signal is ignored during EN=HIGH. 1 µA pull-up current
source is included.
B2
Other_VIN_AVA
Output
Other Supply Input Status: Open-drain output.
HIGH-Z = both VIN and VBUS are valid.
LOW = the other power source is not valid.
D1, D2
GND
Ground
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 5 www.onsemi.com
Table 1. Truth Table
EN
VIN>VUVLO
VBUS>VUVLO
VIN_SEL
DF_IN
Other_VIN_AVA
VOUT
Comment
HIGH
X
X
LOW
X
HI-Z if VIN & VBUS >VUVLO
LOW if VIN or VBUS <VUVLO
VBUS
VOUT is selected by
VIN_SEL
Bidirectional channel
HIGH
X
X
HIGH
X
HI-Z if VIN & VBUS >VUVLO
LOW if VIN or VBUS <VUVLO
VIN
LOW
YES
NO
HIGH
X
LOW
VIN
Automatic selection to
valid input
VIN_SEL is output.
LOW
NO
YES
LOW
X
LOW
VBUS
LOW
YES
YES
LOW
Floating
HIGH-Z
VBUS
VOUT is selected by
DF_IN
VIN_SEL is output.
LOW
YES
YES
HIGH
LOW
HIGH-Z
VIN
LOW
NO
NO
NO
X
Floating
Floating
OFF
Notes:
1. Internal pull-down at EN.
2. 1 µA pull-up current source at DF_IN.
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 6 www.onsemi.com
Absolute Maximum Ratings
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameters
Min.
Max.
Unit
VPIN
VIN, VBUS to GND
Continuous
-1.4
18.0
V
Pulsed, 100 ms Maximum Non-Repetitive
-2.0
VOUT to GND(3)
-0.3
16.0
EN, DF_IN, VIN_SEL, Other_VIN_AVA to GND
-0.3
6.0
ISW
Maximum Continuous Switch Current per Channel
TA=25°C
2.70
A
TA=65°C
2.70
TA=75°C
2.50
TA=85°C
2.25
tPD
Total Power Dissipation at TA=25°C
2.25
W
TJ
Operating Junction Temperature
-40
+150
°C
TSTG
Storage Junction Temperature
-65
+150
°C
ϴJA
Thermal Resistance, Junction-to-Ambient (1in. Square Pad of 2 oz. Copper)
55(4)
°C/W
ESD
Electrostatic
Discharge Capability
Human Body Model, ANSI/ESDA/JEDEC JS-001-2012
3.0
kV
Charged Device Model, JESD22-C101
1.5
IEC61000-4-2 System Level(5)
Air Discharge
(VIN, VBUS to GND)
15.0
Contact Discharge
(VIN, VBUS to GND)
8.0
Notes:
3. If an external voltage of more than 13 V is applied to VOUT, the slew rate should be <1 V/ms from 13 V.
4. Measured using 2S2P JEDEC standard PCB.
5. System-level ESD can be guaranteed by design.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor
does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameters
Min.
Max.
Unit
VPIN
VIN
4.0
12.4
V
VBUS
4.0
12.4
TA
Ambient Operating Temperature
-40
+85
°C
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 7 www.onsemi.com
Electrical Characteristics
VIN=4 to 12.4 V, VBUS=4 to 12.4 V, TA=-40 to 85°C unless otherwise noted. Typical values are at VIN=VBUS=5 V,
EN=HIGH and TA=25°C unless otherwise noted.
Symbol
Parameters
Condition
Min.
Typ.
Max.
Unit
VIN
Input Voltage from VIN
4.0
12.4
V
VBUS
Input Voltage from VBUS
4.0
12.4
V
IQ
Quiescent Current
IOUT=0 mA, EN=HIGH, VIN or VBUS=5 V
55
120
μA
IOUT=0 mA, EN=5 V, VIN and VBUS=GND
33
70
μA
RON
On Resistance for VIN
VIN=12 V, IOUT=200 mA, TA=25°C
95
mΩ
VIN=8 V, IOUT=200 mA, TA=25°C
95
VIN=5 V, IOUT=200 mA, TA=25°C
95
150
VIN=5 V, IOUT=200 mA,
TA=25°C to 85°C(6)
200
On Resistance for VBUS
VBUS=12 V, IOUT=200 mA, TA=25°C
70
mΩ
VBUS=6 V, IOUT=200 mA, TA=25°C
70
VBUS=5 V, IOUT=200 mA, TA=25°C
70
100
VBUS=5 V, IOUT=200 mA,
TA=25°C to 85°C(6)
140
VIH
Input Logic High Voltage
VIN, VBUS = 4.0 V~12.4 V
1.15
V
VIL
Input Logic Low Voltage
VIN, VBUS =4.0 V~12.4 V
0.52
V
VEN(OTG)
EN Voltage in OTG Mode(6)
VIN & VBUS=Float or VIN & VBUS <VUVLO
2.5
V
REN_PD
Pull-Down Resistance at EN
1000
kΩ
Protection
VUVLO
Under-Voltage Lockout Threshold
VIN or VBUS Rising
3.05
3.50
4.00
V
VIN or VBUS Falling
2.55
3.00
3.55
V
VUVHYS
Under-Voltage Lockout Hysteresis
0.5
V
VOVLO
Over-Voltage Lockout Threshold
VIN Rising Threshold
12.9
14.0
15.0
V
VIN Falling Threshold
12.4
13.5
14.5
V
VBUS Rising Threshold
12.9
14.0
15.0
V
VBUS Falling Threshold
12.4
13.5
14.5
V
VOVHYS
Over-Voltage Lockout Hysteresis
VIN
0.5
V
VBUS
0.5
V
TSDN
Thermal Shutdown Threshold
150
°C
TSDNHYS
Thermal Shutdown Hysteresis
20
°C
Reverse Current Blocking (RCB)
IRCB
VIN or VBUS Current During RCB
VOUT=8 V, VIN or VBUS=GND
30
μA
Dynamic Characteristics
tR
VOUT Rise Time, VBUS(6,7)
VIN=VBUS=5 V, RL=150 Ω, CL=4.7 μF,
TA=25°C
90
μs
VOUT Rise Time, VIN(6,7)
50
tF
VOUT Fall Time(6,7)
1.4
ms
tTRAN
Transition Delay(6,7)
50
100
ms
tSD
Selection Delay(6,7)
50
μs
Notes:
6. This parameter is guaranteed by characterization and/or design; not production tested.
7. tSD/tTRAN/tR/tF are defined in Figure 6.
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 8 www.onsemi.com
Timing Diagram
Figure 6. Transition Delay (VIN=VBUS=5 V)
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 9 www.onsemi.com
Typical Characteristics
Figure 7. VIN Quiescent Current (Iq) vs. Temperature
Figure 8. VBUS Quiescent Current (Iq) vs. Temperature
Figure 9. VIN Quiescent Current vs. Supply Voltage
Figure 10. VBUS Quiescent Current vs. Supply Voltage
Figure 11. VIN On Resistance (mΩ) vs. Temperature
Figure 12. VBUS On Resistance (mΩ) vs. Temperature
Figure 13. VIN On Resistance (mΩ) vs. Supply Voltage
Figure 14. VBUS On Resistance (mΩ) vs. Supply Voltage
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 10 www.onsemi.com
Typical Characteristics (Continued)
Figure 15. VIN_SEL Input Logic HIGH & Low Voltage
vs. Temperature
Figure 16. EN Input Logic HIGH & Low Voltage
vs. Temperature
Figure 17. DF_IN Logic HIGH & Low Voltage
vs. Temperature
Figure 18. VIN_VULVO vs. Temperature
Figure 19. VBUS_VULVO vs. Temperature
Figure 20. VIN_VOVLO vs. Temperature
Figure 21. VBUS_VOVLO vs. Temperature
Figure 22. VOUT tR vs. Temperature
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 11 www.onsemi.com
Typical Characteristics (Continued)
Figure 23. VOUT tF vs. Temperature
Figure 24. tTRAN vs. Temperature
Figure 25. Power Source Transition (VIN=VBUS=5 V,
EN=HIGH, VIN_SEL=LOWHIGHLOW,
COUT=4.7 µF, RL=150 Ω)
Figure 26. VIN On Response (VIN=GND5 V,
VBUS=EN=GND, COUT=4.7 µF, RL=150 Ω)
Figure 27. VBUS On Response (VBUS=GND5 V,
VIN=EN=GND, COUT=4.7 µF, RL=150 Ω)
Figure 28. Off Response (VIN=VBUS=5 V, EN=HIGH,
VIN_SEL=LOHIGH or HIGHLOW, COUT=4.7 µF,
RL=150 Ω)
Figure 29. VIN Over-Voltage Protection Response
(VIN=5 V15 V, VBUS=5 V, EN=VIN_SEL=HIGH,
COUT=4.7 µF, RL=150 Ω)
Figure 30. VBUS Over-Voltage Protection Response
(VBUS=5 V15 V, VIN=5 V, EN=HIGH,
VIN_SEL=LOW, COUT=4.7 µF, RL=150 Ω)
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 12 www.onsemi.com
Operation and Application Information
The FPF3042 is an 18 V, 2.7 A-rated, Dual-Input Single-
Output (DISO) N-channel MOSFET load switch with
slew-rate-controlled and low on resistance. The input
operating range is from 4 V to 12.4 V at VBUS and at VIN.
The internal circuitry is powered from the highest
voltage source among VIN, VBUS, and EN.
Input Power-Source Selection
The input power source can be selected by VIN_SEL and
DF_IN, respectively, depending on the EN state. When
EN is HIGH, the input source is selected by VIN_SEL
regardless of DF_IN. If VIN_SEL is LOW, VBUS is selected.
If VIN_SEL is HIGH, VIN is selected.
Table 2. Input Power Selection by VIN_SEL
EN
VIN>VUVLO
VBUS>VUVLO
VIN_SEL
DF_IN
VOUT
HIGH
X
X
LOW
X
VBUS
HIGH
X
X
HIGH
X
VIN
When EN is LOW, the input source is selected by
DF_IN and the number of valid input sources. If only
one input source is valid (greater than VUVLO(MAX)), the
source is selected automatically, regardless of DF_IN,
to make charging path in case the battery is depleted. If
both VBUS and VIN have valid input sources, the input
source is selected by DF_IN. If DF_IN is LOW, VIN is
selected. If DF_IN is HIGH or floating, VBUS is selected.
DF_IN is biased HIGH with an internal 1 µA pull-up
current source.
Table 3. Input Power Selection by DF_IN
EN
VIN>VUVLO
VBUS>VUVLO
VIN_SEL
DF_IN
VOUT
LOW
YES
NO
HIGH
X
VIN
LOW
NO
YES
LOW
X
VBUS
LOW
YES
YES
LOW
Floating
VBUS
LOW
YES
YES
HIGH
LOW
VIN
LOW
NO
NO
X
X
Floating
VIN_SEL can be the status output to indicate which input
power source is used during EN is LOW. If VIN is used,
VIN_SEL shows HIGH. If VBUS is used, VIN_SEL shows
LOW. The voltage level of HIGH signal is 5.3 V if any
one of VIN, VBUS, or EN is higher than 5.3 V. The signal
is highest voltage among VIN, VBUS, and EN if none of
them is higher than 5.3 V.
EN Voltage for Control Logic Power Supply
Internal control logic is powered from the highest
voltage among VIN, VBUS, and VEN. If valid VIN or VBUS
higher than UVLO is applied, ON/OFF control by EN
should be accomplished with VIH/VIL. If EN powers the
internal control block without valid VIN and VBUS, more
than 2.5 V is required on the EN pin to operate properly.
Over-Voltage Protection (OVP)
The FPF3042 includes over-voltage protection at both VIN
and VBUS. If VIN or VBUS is higher than 14 V (typical), the
power switch is off until input voltage is lower than the
over-voltage trip level by a hysteresis voltage of 0.5 V.
Reverse Power Supply for OTG
The bidirectional switch allows reverse power for On-The-
Go (OTG) operation. Even if both VIN and VBUS are
unavailable, reverse power can be supported if internal
control circuitry is powered by EN.
Reverse-Current Blocking (RCB)
FPF3042 supports reverse-current blocking during EN
LOW and an unselected channel.
Thermal Shutdown
During thermal shutdown, the power switch is turned off
if junction temperature exceeds 150°C to avoid damage.
Wireless Charging System
FPF3042 can be used as an input power selector
supporting Travel Adaptor (TA) and Wireless Charging
(WC) with a single-input-based battery charger or Power
Management IC (PMIC), including a charging block as
shown in Figure 31. The system can recognize an input
power source change between 5 V TA and 5 V WC
without detection circuitry because FPF3042 has a
100 ms transition delay. OTG Mode can be supported
without an additional power path, such as a MOSFET.
Travel Adaptor
Wireless Charging
FPF3042
Li-Pol
BAT
System
PMIC
with
BAT Charger &
OTG Boost &
Power Path
VBUS
VIN
VOUT
EN, VIN_SEL, DF_IN
VIN_SEL, Other_VIN_Ava
Figure 31. Input Power Selector for Wireless Charging System
© 2013 Semiconductor Components Industries, LLC. www.fairchildsemi.com
FPF3042 • Rev. 1.0.1 13 www.onsemi.com
Product Specific Package Information
D
E
X
Y
1.96 mm ±0.03 mm
1.76 mm ±0.03 mm
0.28 mm
0.38 mm
www.onsemi.com
1
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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
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