WPCN384U Legacy-Reduced SuperI/O with Two Serial Ports, Parallel Port and GPIOs for Notebook and Docking Applications
© 2008 Nuvoton Technology Corporation www.nuvoton.com
Product Brief
July 2008
Revision 1.1
WPCN384U
Legacy-Reduced SuperI/O with Two Serial Ports
, Parallel
Port
and GPIOs
for Notebook and Docking Applications
General Description
The WPCN384U, a member of the Nuvoton LPC SuperI/O
family, is targeted for a wide range of notebook and docking
applications. The WPCN384U is PC2001 and ACPI compli-
ant, and features two Serial Ports, Parallel Port and General-
Purpose Input/Output (GPIO) support for a total of 21 ports.
The WPCN384U is an optimized solution for notebook
systems requiring no FIR Port, and for LPC-based docking
stations implementing an on-board SuperI/O.
Outstanding Features
■Pin and software compatible with the Nuvoton 87384
■Two Serial Ports
■LPC bus interface, based on Intel’s LPC Interface
Specification Revision 1.1, August 2002 (supports
CLKRUN and LPCPD signals)
■PC2001 and ACPI Revision 3.0 compliant
■IEEE 1284 Parallel Port
■21 GPIO ports, including 14 with IRQ assertion capa-
bility
■Two testability modes (XOR Tree and TRI-STATE®
device pins).
■5V tolerant and back-drive protected pins (except LPC
bus pins)
■64-pin TQFP package
LPC Bus
South Bridge
TPM
Portable
Platform
I/O
Ports
EC
Parallel
Port
Interface
Serial
Interface
WPCN384U
Serial
Interface
(
WPC876xL
)
(
WPCT200
)
System Block Diagram
www.nuvoton.com 2 Revision 1.1
WPCN384U
Features
■Two Serial Ports (SP1 and SP2)
—Software compatible with the 16550A and the 16450
—Shadow register support for write-only bit monitoring
—UART data rates up to 1.5 Mbaud
■IEEE 1284-Compliant Parallel Port
—ECP, with Level 2 (14 mA sink and source output
buffers)
—Software or hardware control
—Enhanced Parallel Port (EPP) compatible with EPP
1.7 and EPP 1.9
—Supports EPP as mode 4 of the Extended Control
Register (ECR)
—Selection of internal pull-up or pull-down resistor for
Paper End (PE) pin
—Supports a demand DMA mode mechanism and a
DMA fairness mechanism for improved bus utilization
—Protection circuit that prevents damage to the
parallel port when a printer connected to it is pow-
ered up or is operated at high voltages (in both
cases, even if the WPCN384U is in power-down
state)
■21 General-Purpose I/O (GPIO) Ports
—Supports IRQ assertion
—Programmable drive type for each output pin (open-
drain, push-pull or output disable)
—Programmable option for internal pull-up resistor on
each input pin
—Output lock option
—Input debounce mechanism
■LPC System Interface
—8-bit I/O cycles
—LPCPD and CLKRUN support
—Implements PCI mobile design guide recommenda-
tion (PCI Mobile Design Guide 1.1, Dec. 18, 1998)
■PC2001 and ACPI 3.0 Compliant
—PnP Configuration Register structure
—Flexible resource allocation for all logical devices
❏Relocatable base address
❏15 IRQ routing options
❏Optional 8-bit DMA channels (where applicable)
selected from four possible DMA channels
■Clock Sources
—14.318 MHz or 48 MHz clock input
—LPC clock, 0 or 30 MHz to 33 MHz
■Strap Configuration
—Base Address (BADDR) strap to determine the base
address of the Index-Data register pair
—Strap Inputs to select testability mode
■Power Supply
—3.3V supply operation
—All pins are 5V tolerant, except LPC bus pins
—All pins are back-drive protected, except LPC bus pins
■Testability
—XOR Tree
—TRI-STATE device pins
Internal Block Diagram
Serial Port
Bus
Interface
LPC Interface
I/O
Serial Port
Serial
Interface
GPIO Ports
Ports
Parallel Port Interface
Parallel Port
IEEE 1284
14.31818 MHz
Clock
Generator
48 MHz
Serial
Interface
WPCN384U Legacy-Reduced SuperI/O with Two Serial Ports, Parallel Port and GPIOs for Notebook and Docking Applications
www.nuvoton.com
Physical Dimensions
All dimensions are in millimeters
Important Notice
Nuvoton products are not designed, intended, authorized or warranted for use as components in systems or equipment intended
for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic
signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Furthermore, Nu-
voton products are not intended for applications wherein failure of Nuvoton products could result or lead to a situation wherein
personal injury, death or severe property or environmental damage could occur.
Nuvoton customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify
Nuvoton for any damages resulting from such improper use or sales.
Please note that all data and specifications are subject to change without notice.
All trademarks of products and companies mentioned in this document belong to their respective owners.
Headquarters
No. 4, Creation Rd. 3,
Science-Based Industrial Park,
Hsinchu, Taiwan, R.O.C
TEL: 886-3-5770066
FAX: 886-3-5665577
http://www.nuvoton.com.tw/
Nuvoton Technology Corporation America
2727 North First Street,
San Jose, CA 95134, U.S.A.
TEL: 1-408-9436666
FAX: 1-408-5441798
Nuvoton Technology (Shanghai) Ltd.
27F, 2299 Yan An W. Rd.
Shanghai, 200336 China
TEL: 86-21-62365999
FAX: 86-21-62365998
Taipei Office
9F, No.480, Rueiguang Rd.,
Neihu District, Taipei, 114,
Taiwan, R.O.C.
TEL: 886-2-2658-8066
FAX: 886-2-8751-3579
Winbond Electronics Corporation Japan
NO. 2 Ueno-Bldg., 7-18, 3-chome
Shinyokohama Kohoku-ku,
Yokohama, 222-0033
TEL: 81-45-4781881
FAX: 81-45-4781800
Nuvoton Technology (H.K.) Ltd.
Unit 9-15, 22F, Millennium City 2,
378 Kwun Tong Rd.,
Kowloon, Hong Kong
TEL: 852-27513100
FAX: 852-27552064
For Advanced PC Product Line information contact: APC.Support@nuvoton.com
64-Pin Thin Quad Flatpack (TQFP)
Order Number WPCN384U_0MG
(Replace “_” with chip revision: A, B, and so on)
