C1
D1
VIN SW
FB
GND
CTRL
COMP
C2
20 mA
TPS61161–Q1
ON/OFF
DIMMING
CONTROL
38 V Max
L1
22 Hm
1 Fm
C3
220 nF
R
10
set
W
1 Fm
L1: TDK VLCF5020T-220MR75-1
C1: Murata GRM188R61E105K
C2: Murata GRM21BR71H105K
D1: ONsemi MBR0540T1
V 3 V to 18 V
I
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Folder
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61160
,
TPS61161
SLVS791E –NOVEMBER 2007–REVISED JULY 2016
TPS6116x White LED Drivers With Digital and PWM Brightness Control in 2-mm x 2-mm
WSON Package
1
1 Features
1• 2.7-V to 18-V Input Voltage Range
• 26-V Open LED Protection (TPS61160)
• 38-V Open LED Protection (TPS61161)
• 200-mV Reference Voltage With ±2% Accuracy
• Flexible Digital and PWM Brightness Control
• Built-in Soft Start
• Up to 90% Efficiency
2 Applications
• Cellular Phones
• Portable Media Players
• Ultra Mobile Devices
• GPS Receivers
• White LED Backlighting for Media Form Factor
Display
3 Description
With a 40-V rated integrated switch FET, the
TPS61160 and TPS61161 are boost converters that
drive LEDs in series. The boost converters run at
600-kHz fixed switching frequency to reduce output
ripple, improve conversion efficiency, and allow for
the use of small external components.
The default white LED current is set with the external
sensor resistor RSET, and the feedback voltage is
regulated to 200 mV, as shown in the Typical
Application. During the operation, the LED current
can be controlled using the one-wire digital interface
(EasyScale™ protocol) through the CTRL pin.
Alternatively, a pulse width modulation (PWM) signal
can be applied to the CTRL pin through which the
duty cycle determines the feedback reference
voltage. In either digital or PWM mode, the
TPS61160 and TPS61161 do not burst the LED
current; therefore, they do not generate audible
noises on the output capacitor. For maximum
protection, the device features integrated open LED
protection that disable the TPS61160 and/or
TPS61161 to prevent the output voltage from
exceeding the device's absolute maximum voltage
ratings during open LED conditions.
The TPS61160 and TPS61161 are available in a
space-saving, 2-mm × 2-mm WSON package with
thermal pad.
Device Information(1)
PART NUMBER PACKAGE OPEN LED PROTECTION
TPS61160 WSON (6) TPS61160 use 26 V (typical)
TPS61161 TPS61161 use 38 V (typical)
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
2
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 4
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Timing Requirements ............................................... 7
6.7 Typical Characteristics.............................................. 8
7 Detailed Description............................................ 11
7.1 Overview................................................................. 11
7.2 Functional Block Diagram....................................... 11
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 13
7.5 Programming........................................................... 15
8 Application and Implementation Information ... 19
8.1 Application Information............................................ 19
8.2 Typical Applications ............................................... 19
9 Power Supply Recommendations...................... 28
10 Layout................................................................... 29
10.1 Layout Guidelines ................................................. 29
10.2 Layout Example .................................................... 29
10.3 Thermal Considerations........................................ 29
11 Device and Documentation Support................. 30
11.1 Device Support...................................................... 30
11.2 Documentation Support ........................................ 30
11.3 Related Links ........................................................ 30
11.4 Receiving Notification of Documentation Updates 30
11.5 Community Resources.......................................... 30
11.6 Trademarks........................................................... 30
11.7 Electrostatic Discharge Caution............................ 30
11.8 Glossary................................................................ 31
12 Mechanical, Packaging, and Orderable
Information........................................................... 31
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (June 2015) to Revision E Page
• Changed package name from "SON" to "WSON" throughout document .............................................................................. 1
• Deleted the "Duty" rows the Recommended Operating Conditions; added "tPWM_MIN" row.................................................... 5
Changes from Revision C (April 2012) to Revision D Page
• Added Pin Configuration and Functions section, ESD Rating table, Feature Description ,Device Functional Modes,
Application and Implementation,Power Supply Recommendations,Dos and Don'ts, Layout,Device and
Documentation Support , and Mechanical, Packaging, and Orderable Information sections; change package name
from QFN to SON; remove Ordering Information table - info duplicated in POA................................................................... 1
• Deleted Dissipation Ratings table - replaced by updated Thermal Information. ................................................................... 5
• Added paragraph re: not using EasyScale to change feedback voltage from 0 mV............................................................ 14
Changes from Revision B (July 2011) to Revision C Page
• Changed the Maximum duty cycle MIN value From: 90% To: 93% and the TYP value From: 93% To: 95% ...................... 6
• Changed position of VI= 5 V and VI= 3.6 V in Figure 3........................................................................................................ 8
Changes from Revision A (September 2008) to Revision B Page
• Changed Features item From: 26V Open LED Protection for 6 LEDs (TPS61160) To: 26-V Open LED Protection
(TPS61160) ............................................................................................................................................................................ 1
• Changed Features item From: 38V Open LED Protection for 10 LEDs (TPS61161) To: 38-V Open LED Protection
(TPS61161) ............................................................................................................................................................................ 1
• ; added 38V max to Typical Application diagram; . ............................................................................................................... 1
• Changed the COMP and CTRL Description in the Terminal Function Table......................................................................... 4
• Changed text to clarify the "Open LED Protection" description. .......................................................................................... 12
3
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• Changed Figure 13............................................................................................................................................................... 14
• Changed the COMPENSATION CAPACITOR SELECTION section................................................................................... 21
VIN
CTRL
SW
FB
COMP
GND
Thermal
Pad
4
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,
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5 Pin Configuration and Functions
DRV Package
6-Pin WSON with Exposed Thermal Pad
Top View
Pin Functions
PIN I/O DESCRIPTION
NAME NO.
COMP 2 O Output of the transconductance error amplifier. Connect an external capacitor to this pin to
compensate the converter.
CTRL 5 I Control pin of the boost converter. It is a multi-functional pin which can be used for enable control,
PWM and digital dimming.
FB 1 I Feedback pin for current. Connect the sense resistor from FB to GND.
GND 3 O Ground
SW 4 I This is the switching node of the device. Connect the inductor between the VIN and SW pin. This pin
is also used to sense the output voltage for open LED protection
VIN 6 I The input supply pin for the device. Connect VIN to a supply voltage between 2.7 V and 18 V.
Thermal Pad — — Solder the thermal pad to the analog ground plane. If possible, use thermal via to connect to ground
plane for ideal power dissipation.
5
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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground pin.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VI
Supply voltages on VIN(2) –0.3 20 V
Voltages on CTRL(2) –0.3 20 V
Voltage on FB and COMP(2) –0.3 3 V
Voltage on SW(2) –0.3 40 V
TJOperating junction temperature 40 150 °C
Tstg Storage temperature –65 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings VALUE UNIT
V(ESD) Electrostatic
discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) These values are recommended values that have been successfully tested in several applications. Other values may be acceptable in
other applications but should be fully tested by the user.
6.3 Recommended Operating Conditions MIN NOM MAX UNIT
VIInput voltage 2.7 18 V
VOOutput voltage VIN 38 V
L Inductor(1) 10 22 μH
ƒdim PWM dimming frequency 5 100 kHz
tPWM_MIN Minimum pulse width at PWM input 50 ns
CIN Input capacitor 1 μF
COOutput capacitor(1) 0.47 10 μF
TAOperating ambient temperature –40 85 °C
TJOperating junction temperature –40 125 °C
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
6.4 Thermal Information
THERMAL METRIC(1)
TPS61160,
TPS61161 UNIT
DRV (WSON)
6 PINS
RθJA Junction-to-ambient thermal resistance 96.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 89 °C/W
RθJB Junction-to-board thermal resistance 65.9 °C/W
ψJT Junction-to-top characterization parameter 3.2 °C/W
ψJB Junction-to-board characterization parameter 66.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 40.8 °C/W
6
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,
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6.5 Electrical Characteristics
VIN = 3.6 V, CTRL = VIN, TA= –40°C to +85°C, typical values are at TA= 25°C (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
VIInput voltage 2.7 18 V
IQOperating quiescent current into VIN Device PWM switching no load 1.8 mA
ISD Shutdown current CRTL=GND, VIN = 4.2 V 1 μA
UVLO Undervoltage lockout threshold VIN falling 2.2 2.5 V
Vhys Undervoltage lockout hysterisis 70 mV
ENABLE AND REFERENCE CONTROL
V(CTRLh) CTRL logic high voltage VIN = 2.7 V to 18 V 1.2 V
V(CTRLl) CTRL logic low voltage VIN = 2.7 V to 18 V 0.4 V
R(CTRL) CTRL pull down resistor 400 800 1600 kΩ
VOLTAGE AND CURRENT CONTROL
VREF Voltage feedback regulation voltage 196 200 204 mV
V(REF_PWM) Voltage feedback regulation voltage
under brightness control VFB = 50 mV 47 50 53 mV
VFB = 20 mV 17 20 23
IFB Voltage feedback input bias current VFB = 200 mV 2 μA
ƒSOscillator frequency 500 600 700 kHz
Dmax Maximum duty cycle VFB = 100 mV, measured on the
drive signal of the switching FET 93% 95%
tmin_on Minimum on pulse width 40 ns
Isink Comp pin sink current 100 μA
Isource Comp pin source current 100 μA
Gea Error amplifier transconductance 240 320 400 μmho
Rea Error amplifier output resistance 6 MΩ
ƒea Error amplifier crossover frequency 5 pF connected to COMP 500 kHz
POWER SWITCH
RDS(on) N-channel MOSFET on-resistance VIN = 3.6 V 0.3 0.6 Ω
VIN = 3 V 0.7
ILN_NFET N-channel leakage current VSW = 35 V, TA= 25°C 1 μA
7
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Electrical Characteristics (continued)
VIN = 3.6 V, CTRL = VIN, TA= –40°C to +85°C, typical values are at TA= 25°C (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OC and OLP
ILIM N-Channel MOSFET current limit D = Dmax 0.56 0.7 0.84 A
ILIM_Start Start up current limit D = Dmax 0.4 A
tHalf_LIM Time step for half current limit 5 ms
Vovp Open LED protection threshold Measured on the SW pin,
TPS61160
TPS61161
25
37 26
38 27
39 V
V(FB_OVP) Open LED protection threshold on FB Measured on the FB pin,
percentage of VREF
VREF= 200 mV and 20 mV 50%
VACKNL Acknowledge output voltage low Open drain, Rpullup =15 kΩto VIN 0.4 V
THERMAL SHUTDOWN
Tshutdown Thermal shutdown threshold 160 °C
Thysteresis Thermal shutdown threshold hysteresis 15 °C
(1) Acknowledge condition active 0, this condition will only be applied in case the RFA bit is set. Open drain output, line needs to be pulled
high by the host with resistor load.
(2) To select EasyScale mode, the CTRL pin has to be low for more than tes_det during tes_win.
6.6 Timing Requirements MIN NOM MAX UNIT
OC and OLP
tREF VREF filter time constant 180 μs
tstep VREF ramp up time 213 μs
EasyScale
tvalACKN Acknowledge valid time(1) 2μs
tACKN Duration of acknowledge condition(1) 512 μs
toff CTRL pulse width to shutdown, CTRL high to low 2.5 ms
tes_det Easy Scale detection time(2) 260 μs
tes_delay EasyScale detection delay, Measured from CTRL high 100 μs
tes_win EasyScale detection window time 1 ms
tSTART Start time of program stream 2 μs
tEOS End time of program stream 2 360 μs
tH_LB High time low bit, logic 0 2 180 μs
tL_LB Low time low bit, logic 0 2 × tH_LB 360 μs
tH_HB High time high bit, logic 1 2 × tL_HB 360 μs
tL_HB Low time high bit, logic 1 2 180 μs
300
400
500
600
700
800
900
1000
20 30 40 50 60 70 80 90
DutyCycle-%
SwitchCurrentLimit-mA
40
50
60
70
80
90
100
0 10 20 30 40 50
10 LEDs - TPS61161 Q1–
V = 3.6 V
I
V = 12 V
I
Output Current - mA
Efficiency - %
V = 5 V
I
40
50
60
70
80
90
100
0 10 20 30 40 50
6LEDs- TPS61160
V =3.6V
I
V =3V
I
V =4.2V
I
OutputCurrent-mA
Efficiency-%
8
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,
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6.7 Typical Characteristics
6.7.1 Table Of Graphs
FIGURE
Efficiency TPS61160/1 VIN = 3.6 V; 4, 6, 8, 10 LEDs; L = 22 μHFigure 1
Efficiency TPS61160 Figure 2
Efficiency TPS61161 Figure 3
Current limit TA= 25°C Figure 4
Current limit Figure 5
EasyScale step Figure 6
PWM dimming linearity VIN = 3.6 V; PWM Freq = 10 kHz and 40 kHz Figure 6
Output ripple at PWM dimming 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; PWM Freq = 10 kHz Figure 8
Switching waveform 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; L = 22 μHFigure 9
Start-up 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; L =22 μHFigure 10
Open LED protection 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; L = 22 μHFigure 11
Figure 1. Efficiency vs Output Current Figure 2. Efficiency vs Output Current
Figure 3. Efficiency vs Output Current Figure 4. Switch Current Limit vs Duty Cycle
t-1 s/divm
SW
20V/div
VOUT
20mV/div
AC
I
200mA/div
L
t-2ms/div
CTRL
5V/div
VOUT
10V/div
COMP
500mV/div
I
200mA/div
L
0
40
80
120
160
200
0 20 40 60 80 100
PWMDutyCycle-%
10kHz,40kHz
FBVoltage-mV
t-100 s/divm
PWM2V/div
VOUT 20mV/div AC
I 10mA/div
LED
300
400
500
600
700
800
900
1000
-40 -20 0 20 40 60 80 100 120 140
Temperature- C°
SwitchCurrentLimit-mA
0
20
40
60
80
100
120
140
160
180
200
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32
EasyScaleStepStep
FBVoltage-mV
9
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Figure 5. Switch Current Limit vs Temperature Figure 6. FB Voltage vs EasyScale Step
Figure 7. FB Voltage vs PWM Duty Cycle Figure 8. Output Ripple At PWM Dimming
Figure 9. Switching Waveform Figure 10. Start-Up
t-100 s/divm
OPENLED
5V/div
FB
200mV/div
VOUT
10V/div
I
200mA/div
L
10
TPS61160
,
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Figure 11. Open LED Protection
SW
Ramp
Generator
Oscillator
Current
Sensor
OLP
CTRL
GND
C3
L1
+
FB
Reference
Control
D1
Error
Amplifer
2
1
Rset
C2
Vin
C1
PWM Control
4
6
Soft
Start-up
5
3
COMP
11
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7 Detailed Description
7.1 Overview
The TPS61160 and TPS61161 are high-efficiency, high-output voltage boost converters in a small package size.
These devices are ideal for driving white LED in series. The serial LED connection provides even illumination by
sourcing the same output current through all LEDs, eliminating the need for expensive factory calibration. Each
device integrate a 40-V, 0.7-A switch FET and operatea in pulse width modulation (PWM) with 600-kHz fixed
switching frequency. For operation see the block diagram. The duty cycle of the converter is set by the error
amplifier output and the current signal applied to the PWM control comparator. The control architecture is based
on traditional current-mode control; therefore, a slope compensation is added to the current signal to allow stable
operation for duty cycles larger than 50%. The feedback loop regulates the FB pin to a low reference voltage
(200 mV typical), reducing the power dissipation in the current sense resistor.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Soft Start-Up
Soft-start circuitry is integrated into the device to avoid a high inrush current during start-up. After the device is
enabled, the voltage at FB pin ramps up to the reference voltage in 32 steps with each step taking 213 μs. This
ensures that the output voltage rises slowly to reduce the input current. Additionally, for the first 5 msec after the
COMP voltage ramps, the current limit of the switch is set to half of the normal current limit spec. During this
period, the input current is kept below 400 mA (typical). See the start-up waveform of a typical example,
Figure 10.
FB
LED SET
V
IR
12
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Feature Description (continued)
7.3.2 Open LED Protection
Open LED protection circuitry prevents device damage as the result of white LED disconnection. The TPS61160
and TPS61161 monitor the voltage at the SW pin and FB pin during each switching cycle. The circuitry turns off
the switch FET and shuts down the device when both of the following conditions persist for 8 switching clock
cycles:
1. The SW voltage exceeds the VOVP threshold; and
2. The FB voltage is less than half of regulation voltage.
As a result, the output voltage falls to the level of the input supply. The device remains in shutdown mode until it
is enabled by toggling the CTRL pin logic. To allow the use of inexpensive low-voltage output capacitor, the
TPS61160/1 has different open lamp protection thresholds. The threshold is set at 26 V for the TPS61160 and
38 V for the TPS61161. Select the appropriate device so that the product of the number of external LEDs and
each LED's maximum forward voltage plus the 200 mV reference voltage does not exceed the minimum OVP
threshold or (nLEDS × VLED(MAX)) + 200 mV ≤VOVP(MIN).
7.3.3 Current Program
The FB voltage is regulated by a low 0.2-V reference voltage. The LED current is programmed externally using a
current-sense resistor in series with the LED string. The value of the RSET is calculated using Equation 1:
where
• ILED = output current of LEDs
• VFB = regulated voltage of FB
• RSET = current sense resistor (1)
The output current tolerance depends on the FB accuracy and the current sensor resistor accuracy.
7.3.4 LED Brightness Dimming Mode Selection
The CTRL pin is used for the control input for both dimming modes, PWM dimming and one-wire dimming. The
dimming mode for the TPS61160 or TPS61161 is selected each time the device is enabled. The default dimming
mode is PWM dimming. To enter the one-wire mode, the following digital pattern on the CTRL pin must be
recognized by the device every time the device starts from the shutdown mode.
1. Pull CTRL pin high to enable the TPS61160 or TPS61161 and to start the one-wire detection window.
2. After the EasyScale detection delay (tes_delay, 100 μs) expires, drive CTRL low for more than the EasyScale
detection time (tes_detect, 260 μs).
3. The CTRL pin has to be low for more than EasyScale detection time before the EasyScale detection window
(tes_win, 1 msec) expires. EasyScale detection window starts from the first CTRL pin low to high transition.
The device immediately enters the one-wire mode once the above three conditions are met. the EasyScale
communication can start before the detection window expires. Once the dimming mode is programmed, it can
not be changed without another start-up. This means the device needs to be shutdown by pulling the CTRL low
for 2.5 ms and restarts. See Figure 12 for a graphical explanation.
FB
V Duty 200 mV
u
CTRL
low
high
FB
200mVxdutycycle
Insertbattery
CTRL
low
high
FB
Insertbattery
Programming
code
FBramp Shutdowndelay
t
EnterESmode
Timingwindow Programmingcode
50mV 50mV
EnterESmode
PWMsignal
Startup
delay
PWM
mode
Startupdelay
FBramp
Programmedvalue
(ifnotprogrammed, 200mVdefault )
Shutdown
delay
IC
Shutdown
Startupdelay
FBramp
ES
mode ESdetectdelay
ESdetecttime
13
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Feature Description (continued)
Figure 12. Dimming Mode Detection and Soft Start PWM Brightness Dimming
7.3.5 Undervoltage Lockout
An undervoltage lockout prevents operation of the device at input voltages below typical 2.2 V. When the input
voltage is below the undervoltage threshold, the device is shutdown and the internal switch FET is turned off. If
the input voltage rises by undervoltage lockout hysteresis, the device restarts.
7.3.6 Thermal Shutdown
An internal thermal shutdown turns off the device when the typical junction temperature of 160°C is exceeded.
The device is released from shutdown automatically when the junction temperature decreases by 15°C.
7.4 Device Functional Modes
7.4.1 Shutdown
The TPS61160 or TPS61161 enters shutdown mode when the CTRL voltage is logic low for more than 2.5 ms.
During shutdown, the input supply current for the device is less than 1 μA (maximum). Although the internal FET
does not switch in shutdown, there is still a DC current path between the input and the LEDs through the inductor
and Schottky diode. The minimum forward voltage of the LED array must exceed the maximum input voltage to
ensure that the LEDs remain off in shutdown. However, in the typical application with two or more LEDs, the
forward voltage is large enough to reverse bias the Schottky and keep leakage current low.
7.4.2 PWM Brightness Dimming
When the CTRL pin is constantly high, the FB voltage is regulated to 200 mV typically. However, the CTRL pin
allows a PWM signal to reduce this regulation voltage; therefore, it achieves LED brightness dimming. The
relationship between the duty cycle and FB voltage is given by Equation 2.
where
• Duty = duty cycle of the PWM signal
• 200 mV = internal reference voltage (2)
VBG
200 mV
Error
Amplifier
FB
CTRL
COMP
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Device Functional Modes (continued)
As shown in Figure 13, the device chops up the internal 200-mV reference voltage at the duty cycle of the PWM
signal. The pulse signal is then filtered by an internal low pass filter. The output of the filter is connected to the
error amplifier as the reference voltage for the FB pin regulation. Therefore, although a PWM signal is used for
brightness dimming, only the WLED DC current is modulated, which is often referred as analog dimming. This
eliminates the audible noise which often occurs when the LED current is pulsed in replica of the frequency and
duty cycle of PWM control. Unlike other scheme which filters the PWM signal for analog dimming, TPS61160,
TPS61161 regulation voltage is independent of the PWM logic voltage level which often has large variations.
For optimum performance, use the PWM dimming frequency in the range of 5 kHz to 100 kHz. The requirement
of minimum dimming frequency comes from the EasyScale detection delay and detection time specification in the
dimming mode selection. Since the CTRL pin is logic only pin, adding an external RC filter applied to the pin
does not work.
Figure 13. Block Diagram of Programmable FB Voltage Using PWM Signal
To use lower PWM dimming, add an external RC network connected to the FB pin as shown in Figure 19.
7.4.3 Digital One-Wire Brightness Dimming
The CTRL pin features a simple digital interface to allow digital brightness control. The digital dimming can save
the processor power and battery life as it does not require a PWM signal all the time, and the processor can
enter idle mode if available.
The TPS61160 or TPS61161 adopts the EasyScale protocol for the digital dimming, which can program the FB
voltage to any of the 32 steps with single command. The step increment increases with the voltage to produce
pseudo logarithmic curve for the brightness step. See the Table 1 for the FB pin voltage steps. The default step
is full scale when the device is first enabled (VFB = 200 mV). The programmed reference voltage is stored in an
internal register. A power reset clears the register value and reset it to default.
Do not use EasyScale to change the feedback voltage from 0 mV, effectively disabling the device, to any other
voltage. One alternative is to start with VFB = 10 mV and go to a higher voltage. Another alternative is to disable
the device by taking the CTRL pin low for 2.5 ms and then re-enter EasyScale to force a soft start from VFB = 0
mV to the default 200 mV.
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Device Functional Modes (continued)
7.4.4 External PWM Dimming
For assistance in selecting the proper values for RSET, R1-R3, RFLTR, CFLTR and D2 for the specific
application, refer to How to Use Analog Dimming With the TPS6116x (SLVA471) and/or Design Tool for Analog
Dimming Using a PWM Signal (SLVC366). Also see Choosing Component Values.
7.5 Programming
7.5.1 EasyScale: One-Wire Digital Dimming
EasyScale is a simple but flexible one pin interface to configure the FB voltage. The interface is based on a
master-slave structure, where the master is typically a microcontroller or application processor. Figure 14 and
Table 2 give an overview of the protocol. The protocol consists of a device specific address byte and a data byte.
The device specific address byte is fixed to 72 hex. The data byte consists of five bits for information, two
address bits, and the RFA bit. The RFA bit set to high indicates the Request for Acknowledge condition. The
Acknowledge condition is only applied if the protocol was received correctly. The advantage of EasyScale
compared with other one-pin interfaces is that its bit detection is in a large extent independent from the bit
transmission rate. It can automatically detect bit rates from 1.7 kBit/sec and up to 160 kBit/sec.
DATA IN
Start
DATA OUT ACK
RFA A1 A0 D4 D3 D2 D1 D0DA7
0
DA6
1
DA5
1
DA4
1
DA3
0
DA2
0
DA1
1
DA0
0
Device Address DATABYTE
EOS Start EOS
Start
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(1) See Digital One-Wire Brightness Dimming.
Table 1. Selectable FB Voltages(1)
FB voltage
(mV) D4 D3 D2 D1 D0
0 0 0 0 0 0 0
1 5 0 0 0 0 1
2 8 0 0 0 1 0
3 11 0 0 0 1 1
4 14 0 0 1 0 0
5 17 0 0 1 0 1
6 20 0 0 1 1 0
7 23 0 0 1 1 1
8 26 0 1 0 0 0
9 29 0 1 0 0 1
10 32 0 1 0 1 0
11 35 0 1 0 1 1
12 38 0 1 1 0 0
13 44 0 1 1 0 1
14 50 0 1 1 1 0
15 56 0 1 1 1 1
16 62 1 0 0 0 0
17 68 1 0 0 0 1
18 74 1 0 0 1 0
19 80 1 0 0 1 1
20 86 1 0 1 0 0
21 92 1 0 1 0 1
22 98 1 0 1 1 0
23 104 1 0 1 1 1
24 116 1 1 0 0 0
25 128 1 1 0 0 1
26 140 1 1 0 1 0
27 152 1 1 0 1 1
28 164 1 1 1 0 0
29 176 1 1 1 0 1
30 188 1 1 1 1 0
31 200 1 1 1 1 1
Figure 14. EasyScale Protocol Overview
LowBit
(Logic0)
HighBit
(Logic1)
tLow tHigh tLOW tHigh
EasyScaleTiming,withoutacknowledgeRFA =0
DA7
0
tStart
StaticHigh StaticHigh
DATA IN
tStart
TEOS TEOS
DA0
0
RFA
0
D0
1
AddressByte DATA Byte
EasyScaleTiming,withacknowledgeRFA =1
StaticHigh
tACKN
Acknowledge
true,DataLine
pulleddownby
device
DATA IN
DATA OUT Acknowledge
false,nopull
down
Controllerneedsto
PullupDataLineviaa
resistortodetect ACKN
ACKN
DA7
0
StaticHigh
TEOS tvalACK
DA0
0
RFA
1
D0
1
tStart tStart
AddressByte DATA Byte
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Table 2. EasyScale Bit Descriptions
BYTE BIT
NUMBER NAME TRANSMISSION
DIRECTION DESCRIPTION
Device
Address
Byte
72 hex
7 DA7
IN
0 MSB device address
6 DA6 1
5 DA5 1
4 DA4 1
3 DA3 0
2 DA2 0
1 DA1 1
0 DA0 0 LSB device address
Data byte
7 (MSB) RFA
IN
Request for acknowledge. If high, acknowledge is applied by device
6 A1 0 Address bit 1
5 A0 0 Address bit 0
4 D4 Data bit 4
3 D3 Data bit 3
2 D2 Data bit 2
1 D1 Data bit 1
0 (LSB) D0 Data bit 0
ACK OUT Acknowledge condition active 0, this condition will only be applied in case RFA bit is
set. Open drain output, Line needs to be pulled high by the host with a pullup
resistor. This feature can only be used if the master has an open drain output stage.
In case of a push pull output stage Acknowledge condition may not be requested!
Figure 15. EasyScale Bit Coding
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All bits are transmitted MSB first and LSB last. Figure 15 shows the protocol without acknowledge request (Bit
RFA = 0) as well as the with acknowledge (Bit RFA = 1) request. Prior to both bytes, device address byte and
data byte, a start condition must be applied. For this, the CTRL pin must be pulled high for at least tstart (2 μs)
before the bit transmission starts with the falling edge. If the CTRL pin is already at high level, no start condition
is needed prior to the device address byte. The transmission of each byte is closed with an End-of-Stream
condition for at least tEOS (2 μs).
The bit detection is based on a Logic Detection scheme, where the criterion is the relation between tLOW and
tHIGH. It can be simplified to:
High Bit: tHIGH > tLOW, but with tHIGH at least 2 × tLOW, see Figure 15.
Low Bit: tHIGH < tLOW, but with tLOW at least 2 × tHIGH, see Figure 15.
The bit detection starts with a falling edge on the CTRL pin and ends with the next falling edge. Depending on
the relation between tHIGH and tLOW, the logic 0 or 1 is detected.
The acknowledge condition is only applied if:
• Acknowledge is requested by a set RFA bit.
• The transmitted device address matches with the device address of the device.
• 16 bits is received correctly.
If the device turns on the internal ACKN-MOSFET and pulls the CTRL pin low for the time tACKN, which is 512 μs
maximum then the Acknowledge condition is valid after an internal delay time tvalACK. This means that the internal
ACKN-MOSFET is turned on after tvalACK, when the last falling edge of the protocol was detected. The master
controller keeps the line low in this period. The master device can detect the acknowledge condition with its input
by releasing the CTRL pin after tvalACK and read back a logic 0. The CTRL pin can be used again after the
acknowledge condition ends.
Note that the acknowledge condition may only be requested in case the master device has an open drain output.
For a push-pull output stage, the use a series resistor in the CRTL line to limit the current to 500 μA is
recommended to for such cases as:
• an accidentally requested acknowledge, or
• to protect the internal ACKN-MOSFET.
C1
D1
VIN SW
FB
GND
CTRL
COMP
C2
20 mA
TPS61161–Q1
ON/OFF
DIMMING
CONTROL
38 V Max
L1
22 Hm
1 Fm
C3
220 nF
R
10
set
W
1 Fm
L1: TDK VLCF5020T-220MR75-1
C1: Murata GRM188R61E105K
C2: Murata GRM21BR71H105K
D1: ONsemi MBR0540T1
V 3 V to 18 V
I
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8 Application and Implementation Information
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS61160 and TPS61161 provide a complete high-performance LED lighting solution for mobile devices
supporting a single string of 6 (TPS61160) or 10 (TPS61161) white LEDs.
8.2 Typical Applications
8.2.1 Typical Application of TPS61161
Figure 16. Typical Application of TPS61161
8.2.1.1 Design Requirements
Example requirements for white-LED-driver applications:
Table 3. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
Inductor 22 µH
Minimum input voltage 3 V
Number of series LED 10
LED maximum forward voltage (Vf) 3.2 V
Schottky diode forward voltage (Vf) 0.2 V
Efficiency (η) 85%
Switching frequency (SW) 600 kHz
OUT OUT
IN_DC IN
V I
IV
u
u K
P
IN LIM
OUT_MAX OUT
I
V I 2
IV
§ ·
u u K
¨ ¸
© ¹
P
SOUT F IN IN
1
I1 1
L F V V V V
ª º
§ ·
u u
« »
¨ ¸
« »
© ¹
¬ ¼
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Applying Equation 3 and Equation 4, when VIN is 3 V, 10 LEDs output equivalent to VOUT of 32.2 V, the inductor
is 22 μH, the Schottky forward voltage is 0.2 V, the maximum output current is 47 mA in typical condition.
8.2.1.2 Detailed Design Procedure
8.2.1.2.1 Maximum Output Current
The overcurrent limit in a boost converter limits the maximum input current and thus maximum input power for a
given input voltage. Maximum output power is less than maximum input power due to power conversion losses.
Therefore, the current limit setting, input voltage, output voltage and efficiency can all change maximum current
output. The current limit clamps the peak inductor current; therefore, the ripple has to be subtracted to derive
maximum DC current. The ripple current is a function of switching frequency, inductor value and duty cycle.
Equation 3 and Equation 4 take into account of all the above factors for maximum output current calculation.
where
• Ip= inductor peak-to-peak ripple
• L = inductor value
• Vf= Schottky diode forward voltage
• Fs = switching frequency
• Vout = output voltage of the boost converter. It is equal to the sum of VFB and the voltage drop across
LEDs. (3)
where
• Iout_max = maximum output current of the boost converter
• Ilim = overcurrent limit
•η= efficiency (4)
For instance, when VIN is 3 V, 8 LEDs output equivalent to VOUT of 26 V, the inductor is 22 μH, the Schottky
forward voltage is 0.2 V; and then the maximum output current is 65 mA in typical condition. When VIN is 5 V, 10
LEDs output equivalent to VOUT of 32 V, the inductor is 22 μH, the Schottky forward voltage is 0.2 V; and then
the maximum output current is 85 mA in typical condition.
8.2.1.2.2 Inductor Selection
The selection of the inductor affects steady state operation as well as transient behavior and loop stability. These
factors make it the most important component in power regulator design. There are three important inductor
specifications, inductor value, DC resistance and saturation current. Considering inductor value alone is not
enough.
The inductor value determines the inductor ripple current. Choose an inductor that can handle the necessary
peak current without saturating, according to half of the peak-to-peak ripple current given by Equation 3, pause
the inductor DC current given by:
(5)
Inductor values can have ±20% tolerance with no current bias. When the inductor current approaches saturation
level, its inductance can decrease 20% to 35% from the 0A value depending on how the inductor vendor defines
saturation current. Using an inductor with a smaller inductance value forces discontinuous PWM when the
inductor current ramps down to zero before the end of each switching cycle. This reduces the boost converter’s
maximum output current, causes large input voltage ripple and reduces efficiency. Large inductance value
RIPPLE_ESR OUT ESR
V I R u
OUT IN OUT
OUT OUT S RIPPLE
(V V )I
CV F V
u u
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provides much more output current and higher conversion efficiency. For these reasons, a 10-μH to 22-μH
inductor value range is recommended. A 22-μH inductor optimized the efficiency for most application while
maintaining low inductor peak-to-peak ripple. Table 4 lists the recommended inductor for the TPS61160 or
TPS61161. When recommending inductor value, the factory has considered –40% and 20% tolerance from its
nominal value.
The TPS61160 and TPS61161 have built-in slope compensation to avoid sub-harmonic oscillation associated
with current mode control. If the inductor value is lower than 10 μH, the slope compensation may not be
adequate, and the loop can be unstable. Therefore, customers need to verify the inductor in their application if it
is different from the recommended values.
Table 4. Recommended Inductors for TPS61160 and TPS61161
PART NUMBER L (μH) DCR MAX (Ω) SATURATION CURRENT (mA) SIZE
(L × W × H mm) VENDOR
LQH3NPN100NM0 10 0.3 750 3 ×3 ×1.5 Murata
VLCF5020T-220MR75-1 22 0.4 750 5 ×5 × 2.0 TDK
CDH3809/SLD 10 0.3 570 4 × 4 × 1.0 Sumida
A997AS-220M 22 0.4 510 4 × 4 × 1.8 TOKO
8.2.1.2.3 Schottky Diode Selection
The high switching frequency of the TPS61160, TPS61161 demands a high-speed rectification for optimum
efficiency. Ensure that the diode average and peak current rating exceeds the average output current and peak
inductor current. In addition, the diode’s reverse breakdown voltage must exceed the open LED protection
voltage. The ONSemi MBR0540 and the ZETEX ZHCS400 are recommended for TPS61160 and TPS61161.
8.2.1.2.4 Compensation Capacitor Selection
The compensation capacitor C3 (see the Functional Block Diagram), connected from COMP pin to GND, is used
to stabilize the feedback loop of the TPS61160, TPS61161. A 220-nF ceramic capacitor for C3 is suitable for
most applications.
8.2.1.2.5 Input and Output Capacitor Selection
The output capacitor is mainly selected to meet the requirements for the output ripple and loop stability. This
ripple voltage is related to the capacitor’s capacitance and its equivalent series resistance (ESR). Assuming a
capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by:
where
• Vripple = peak-to-peak output ripple (6)
The additional output ripple component caused by ESR is calculated using:
(7)
Due to its low ESR, Vripple_ESR can be neglected for ceramic capacitors, but must be considered if tantalum or
electrolytic capacitors are used.
Care must be taken when evaluating a ceramic capacitor’s derating under DC bias, aging and AC signal. For
example, larger form factor capacitors (in 1206 size) have a resonant frequencies in the range of the switching
frequency. So the effective capacitance is significantly lower. The DC bias can also significantly reduce
capacitance. Ceramic capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore,
leave the margin on the voltage rating to ensure adequate capacitance at the required output voltage.
The capacitor in the range of 1 μF to 4.7 μF is recommended for input side. The output requires a capacitor in
the range of 0.47 μF to 10 μF. The output capacitor affects the loop stability of the boost regulator. If the output
capacitor is below the range, the boost regulator can potentially become unstable. For example, when using an
output capacitor of 0.1 μF, a 470-nF compensation capacitor has to be used for the loop stable.
L1
10 Hm
C1
D1
RSET
10 W
VIN SW
FB
GND
CTRL
COMP
C2
220 nF
TPS61160
ON/OFF
DIMMING
CONTROL
R1
100 Ω
RFLTR
CFLTR
C3
L1: Murata LQH3NPN100NM0
C1: Murata GRM188R61A105K
C2: Murata GRM188R61E474K
D1: ONsemi MBR0540T1
D2: ONsemi MMSZ4711
D2
R2
0
10
20
30
40
50
60
70
80
90
100
0 10 20 30 40 50 60 70 80 90 100
EFFICIENCY (%)
DIMMING DUTY CYCLE (%)
VIN = 3.0 V
VIN = 3.6 V
VIN = 4.2 V
VIN = 5.0 V
C002
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The popular vendors for high value ceramic capacitors are:
TDK (http://www.component.tdk.com/components.php)
Murata (http://www.murata.com/cap/index.html)
8.2.1.3 Application Curves
Figure 17. Efficiency vs Dimming Duty Cycle Figure 18. Start-Up with 10 Series LEDs (DPWM = 100%)
8.2.2 Li-Ion Driver for 6 White LEDs with External PWM Dimming Network
Figure 19. Li-Ion Driver for 6 White LEDs with External PWM Dimming
FLTR pwm
FLTR 1
1
C =
2 (R // R ) 10
f
p
2 LED(max) PW M(max) FB LED(min) PW M(min) FB PWM(max) PWM(min)
1 FLTR
FB LED(max) LED(min) LE D(max) LED(min)
R (I (V V ) I (V V )) V V
R + R = +
V (I I ) I I
- - - -
- -
( )
FB PWM(max) PWM(min)
SET
P WM(ma x) LE D(max) FB LED(max) F B L ED(min ) PWM(min) L ED(min )
V V V
R = V I V I + V I V I
-
-
PWM(max) (ma x) PWM(H) (max) PWM(L)
V = D V + (1 D )V-
PWM(min) (min) PWM(H) (min) PWM(L )
V = D V + (1 D )V-
FLTR
)L(PWM)H(PWM
FLTR
FB
FB
RR
V)D(VD
R//)RR(
V
I
error%
+
-+´
-
+
=
121
1
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8.2.2.1 Design Requirements
Example parameters for white LEDs with external PWM dimming:
Table 5. Design Parameters for White LEDs with External PWM Dimming
DESIGN PARAMETER EXAMPLE VALUE
Inductor 10 µH
Minimum input voltage 3.6 V
Number of series LED 6
LED maximum forward voltage (Vf) 3.2 V
Schottky diode forward voltage (Vf) 0.2 V
Efficiency 90%
Switching frequency (fSW) 600 kHz
External PWM output voltage 3 V
External PWM frequency 20 kHz
Applying Equation 3 and Equation 4 when VIN is 3 V, 6 LEDs output equivalent to VOUT of 19.4 V, the inductor is
10 μH, the Schottky forward voltage is 0.2 V, the maximum output current is 76 mA in typical condition.
8.2.2.2 Detailed Design Procedure
8.2.2.2.1 Choosing Component Values
As per SLVA471, the values of RFLTR, CFLTR, R1, R2, and RSET are determined by the system parameters and
error tolerance. The main source of LED current error is leakage current from the FB pin. The error gets worse
as the LED current decreases. The error due to leakage current is given by Functional Block Diagram, where the
impedance seen by the FB pin has a major impact. To reduce error due to the leakage current, the impedance
seen by the FB pin needs to be small. Because R2is much smaller than R1+ RFLTR, R2must be chosen to be
small to minimize the impedance seen by the FB pin. In general, R2must be chosen to be 1 kΩor less. If greater
accuracy at smaller currents is needed, then R2must be chosen to be even smaller.
(8)
Once R2has been chosen, the value of RSET and R1+ RFLTR can be calculated using Equation 9,Equation 10,
Equation 11, and Equation 12. The individual values of R1and RFLTR can be any combination that sums up to R1
+ RFLTR . In general, choosing R1and RFLTR to be the same value gives a minimum requirement for CFLTR.
(9)
(10)
(11)
(12)
Finally, CFLTR can be chosen based on the amount of filtering desired or to provide a gradual dimming effect that
is popular in many lighting products. At a minimum, CFLTR must be chosen to provide at least 20 dB of
attenuation at the PWM frequency. Equation 13 can be used to calculate the minimum capacitor value to provide
this attenuation.
(13)
0
10
20
30
40
50
60
70
80
90
100
0 10 20 30 40 50 60 70 80 90 100
EFFICIENCY (%)
DIMMING DUTY CYCLE (%)
VIN = 3.0 V
VIN = 3.6 V
VIN = 4.2 V
VIN = 5.0 V
C002
FLTR
FLTR 1 RC
1
C = 2 (R // R ) fp
RC
r
0.35
=
t
f
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To provide gradual dimming, a large capacitor must be chosen to provide a long transient time when changing
the PWM duty cycle. Equation 14 shows how to calculate the recommended corner frequency of the RC filter
based on the 10% to 90% rise time. Once the corner frequency is known, it can be used to calculate the required
capacitor using Equation 15.
(14)
(15)
For example, a design with RFLTR and R1equal to 10 kΩand a desired rise time of 500 ms requires a corner
frequency of 0.7 Hz and a capacitor of 47 μF.
8.2.2.3 Application Curves
Figure 20. Efficiency vs Dimming Duty Cycle Figure 21. Start-Up with 6 Series LEDs (External PWM,
DPWM = 50%)
Figure 22. Start-Up with 6 Series LEDs (External PWM, DPWM = 100%)
V 3 V to 5 V
IN
L1
10 Hm
C1
1 Fm
D1
RSET
10 W
VIN SW
FB
GND
CTRL
COMP
C2
0.47 Fm
20 mA
C3
220 nF
TPS61160
ON/OFF
DIMMING
CONTROL
L1: Murata LQH3NPN100NM0
C1: Murata GRM188R61A105K
C2: Murata GRM188R61E474K
D1: ONsemi MBR0540T1
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8.2.3 Li-Ion Driver for 6 White LEDs
Figure 23. Li-Ion Driver for 6 White LEDs
8.2.3.1 Design Requirements
Example parameters for Li-Ion drivers with 6 white LEDs:
Table 6. Design Parameters for Li-Ion Driver with 6 White LEDs
DESIGN PARAMETER EXAMPLE VALUE
Inductor 10 µH
Minimum input voltage 3 V
Number of series LED 6
LED maximum forward voltage (Vf) 3.2 V
Schottky diode forward voltage (Vf) 0.6 V
Efficiency (η) 88%
Switching frequency 600 kHz
Applying Equation 3 and Equation 4, when VIN is 3 V, 6 LEDs output equivalent to VOUT of 19.4 V, the inductor is
10 μH, the Schottky forward voltage is 0.2 V, the maximum output current is 66 mA in typical condition.
8.2.3.2 Detailed Design Procedure
See Detailed Design Procedure.
0
10
20
30
40
50
60
70
80
90
100
0 10 20 30 40 50 60 70 80 90 100
EFFICIENCY (%)
DIMMING DUTY CYCLE (%)
VIN = 3.0 V
VIN = 3.6 V
VIN = 4.2 V
VIN = 5.0 V
C002
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8.2.3.3 Application Curves
Figure 24. Efficiency vs Duty Cycle Figure 25. Start-Up with 6 Series LEDs (DPWM = 50%)
Figure 26. Start-Up with 6 Series LEDs (DPWM = 100%)
8.2.4 Li-Ion Driver for 8 White LEDs
For assistance in selecting the proper values for RSET, R1-R3, RFLTR, CFLTR and D2 for the specific
application, refer to SLVA471 and/or SLVC366.
Vin 3 V to 5 V
L1
22 HmD1
Rset
10 W
VIN SW
FB
GND
CTRL
COMP
C2
20mA
C3
220 nF
TPS61161
ON/OFF
DIMMING
CONTROL
C1
L1: TDK VLCF5020T-220MR75-1
C1: Murata GRM188R61A105K
C2: Murata GRM21BR71H105K
D1: ONsemi MBR0540T1
27
TPS61160
,
TPS61161
www.ti.com
SLVS791E –NOVEMBER 2007–REVISED JULY 2016
Product Folder Links: TPS61160 TPS61161
Submit Documentation FeedbackCopyright © 2007–2016, Texas Instruments Incorporated
Figure 27. Li-Ion Driver for 8 White LEDs
8.2.4.1 Design Requirements
Example parameters for Li-Ion driver with 8 white LEDs:
Table 7. Design Parameters for Li-Ion Driver with 8 White LEDs
DESIGN PARAMETER EXAMPLE VALUE
Inductor 22 µH
Minimum input voltage 3 V
Number of series LED 8
LED maximum forward voltage (Vf) 3.2 V
Schottky diode forward voltage 0.2 V
Efficiency (η) 85%
Switching frequency 600 kHz
Applying Equation 3 and Equation 4, when VIN is 3 V, 8 LEDs output equivalent to VOUT of 25.8 V, the inductor is
22 μH, the Schottky forward voltage is 0.2 V, the maximum output current is 60 mA in typical condition.
8.2.4.2 Detailed Design Procedure
See Detailed Design Procedure.
0
10
20
30
40
50
60
70
80
90
100
0 10 20 30 40 50 60 70 80 90 100
EFFICIENCY (%)
DIMMING DUTY CYCLE (%)
VIN = 3.0 V
VIN = 3.6 V
VIN = 4.2 V
VIN = 5.0 V
C002
28
TPS61160
,
TPS61161
SLVS791E –NOVEMBER 2007–REVISED JULY 2016
www.ti.com
Product Folder Links: TPS61160 TPS61161
Submit Documentation Feedback Copyright © 2007–2016, Texas Instruments Incorporated
8.2.4.3 Application Curves
Figure 28. Efficiency vs Duty Cycle Figure 29. Start-Up with 8 Series LEDs (DPWM = 100%)
9 Power Supply Recommendations
The TPS61160 and TPS61161 are designed to operate from an input supply range of 2.7 V to 18 V. This input
supply must be well regulated and be able to provide the peak current required by the LED configuration and
inductor selected without voltage drop under load transients (start-up or rapid brightness change). The resistance
of the input supply rail must be low enough such that the input current transient does not cause the TPS61160
and TPS61161 supply voltage to droop more than 5%. Additional bulk decoupling located close to the input
capacitor (CIN) may be required to minimize the impact of the input supply rail resistance.
A
D(max)
JA
125 C T
PRq
° -
=
CTRL
GND
C3
L1
Rset
Vin
CTRL
SW
FB
COMP
GND
C1 Vin
C2
LEDs IN
LEDs Out
Minimize the
area of this
trace
Place enough
VIAs around
thermal pad to
enhance thermal
performance
29
TPS61160
,
TPS61161
www.ti.com
SLVS791E –NOVEMBER 2007–REVISED JULY 2016
Product Folder Links: TPS61160 TPS61161
Submit Documentation FeedbackCopyright © 2007–2016, Texas Instruments Incorporated
10 Layout
10.1 Layout Guidelines
As for all switching power supplies, especially those high frequency and high current ones, layout is an important
design step. If layout is not carefully done, the regulator could suffer from instability as well as noise problems.
To reduce switching losses, the SW pin rise and fall times are made as short as possible. To prevent radiation of
high frequency resonance problems, proper layout of the high frequency switching path is essential. Minimize the
length and area of all traces connected to the SW pin and always use a ground plane under the switching
regulator to minimize inter-plane coupling. The loop including the PWM switch, Schottky diode, and output
capacitor, contains high current rising and falling in nanosecond and must be kept as short as possible. The input
capacitor must not only be close to the VIN pin, but also to the GND pin in order to reduce the device supply
ripple. Figure 30 shows a sample layout.
10.2 Layout Example
Figure 30. TPS6116x Sample Layout
10.3 Thermal Considerations
The maximum device junction temperature should be restricted to 125°C under normal operating conditions. This
restriction limits the power dissipation of the TPS61160 or TPS61161. Calculate the maximum allowable
dissipation, PD(max), and keep the actual dissipation less than or equal to PD(max). The maximum-power-dissipation
limit is determined using values in Equation 16:
where
• TAis the maximum ambient temperature for the application
• RθJA is the thermal resistance junction-to-ambient given in Thermal Information. (16)
The TPS61160 and TSP61161 come in a thermally enhanced WSON package. This package includes a thermal
pad that improves the thermal capabilities of the package. The RθJA of the WSON package greatly depends on
the PCB layout and thermal pad connection. The thermal pad must be soldered to the analog ground on the
PCB. Using thermal vias underneath the thermal pad as illustrated in the layout example. Also see the QFN/SON
PCB Attachment application report (SLUA271).
30
TPS61160
,
TPS61161
SLVS791E –NOVEMBER 2007–REVISED JULY 2016
www.ti.com
Product Folder Links: TPS61160 TPS61161
Submit Documentation Feedback Copyright © 2007–2016, Texas Instruments Incorporated
11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation, see the following:
•QFN/SON PCB Attachment
•How to Use Analog Dimming With the TPS6116x
•Design Tool for Analog Dimming Using a PWM Signal
11.3 Related Links
11.3.1 Related Links
Table 8 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to sample or buy.
Table 8. Related Links
PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL
DOCUMENTS TOOLS &
SOFTWARE SUPPORT &
COMMUNITY
TPS61160 Click here Click here Click here Click here Click here
TPS61161 Click here Click here Click here Click here Click here
11.4 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.5 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.6 Trademarks
EasyScale, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.7 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
31
TPS61160
,
TPS61161
www.ti.com
SLVS791E –NOVEMBER 2007–REVISED JULY 2016
Product Folder Links: TPS61160 TPS61161
Submit Documentation FeedbackCopyright © 2007–2016, Texas Instruments Incorporated
11.8 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 15-Apr-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
HPA00667DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZR
HPA00810-2/2 ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZR
TPS61160DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZQ
TPS61160DRVRG4 ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZQ
TPS61160DRVT ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZQ
TPS61160DRVTG4 ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZQ
TPS61161DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZR
TPS61161DRVRG4 ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZR
TPS61161DRVT ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZR
TPS61161DRVTG4 ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BZR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 15-Apr-2017
Addendum-Page 2
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS61161 :
•Automotive: TPS61161-Q1
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS61160DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS61160DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS61161DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS61161DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Jan-2017
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS61160DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS61160DRVT WSON DRV 6 250 210.0 185.0 35.0
TPS61161DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS61161DRVT WSON DRV 6 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Jan-2017
Pack Materials-Page 2
GENERIC PACKAGE VIEW
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
DRV 6 WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
4206925/F
www.ti.com
PACKAGE OUTLINE
C
6X 0.35
0.25
1.6 0.1
6X 0.3
0.2
2X
1.3
1 0.1
4X 0.65
0.8
0.7
0.05
0.00
B2.1
1.9 A
2.1
1.9
(0.2) TYP
WSON - 0.8 mm max heightDRV0006A
PLASTIC SMALL OUTLINE - NO LEAD
4222173/B 04/2018
PIN 1 INDEX AREA
SEATING PLANE
0.08 C
1
34
6
(OPTIONAL)
PIN 1 ID 0.1 C A B
0.05 C
THERMAL PAD
EXPOSED
7
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
SCALE 5.500
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
(1)
4X (0.65)
(1.95)
6X (0.3)
6X (0.45)
(1.6)
(R0.05) TYP
( 0.2) VIA
TYP
(1.1)
WSON - 0.8 mm max heightDRV0006A
PLASTIC SMALL OUTLINE - NO LEAD
4222173/B 04/2018
SYMM
1
34
6
SYMM
LAND PATTERN EXAMPLE
SCALE:25X
7
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
SOLDER MASK
OPENING
SOLDER MASK
METAL UNDER
SOLDER MASK
DEFINED
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
www.ti.com
EXAMPLE STENCIL DESIGN
6X (0.3)
6X (0.45)
4X (0.65) (0.7)
(1)
(1.95)
(R0.05) TYP
(0.45)
WSON - 0.8 mm max heightDRV0006A
PLASTIC SMALL OUTLINE - NO LEAD
4222173/B 04/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD #7
88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:30X
SYMM
1
34
6
SYMM
METAL
7
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Copyright © 2018, Texas Instruments Incorporated
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Texas Instruments:
TPS61161EVM-243 TPS61160EVM-243