DEMO MANUAL DC1565A LTC2153-14, LTC2153-12, LTC2152-14, LTC2152-12, LTC2151-14, LTC2151-12, LTC2150-14, LTC2150-12 12-Bit/14-Bit, 170Msps to 310Msps ADCs Description Demonstration circuit 1565A supports a family of 12Bit/14Bit 170Msps to 310Msps ADCs. Each assem bly features one of the following devices: LTC2153-14/ LTC2153-12, LTC2152-14/LTC2152-12, LTC2151-14/ LTC2151-12, LTC2150-14/LTC2150-12, high speed ADCs. The versions of the 1565A demo board are listed in Table 1. Depending on the required resolution and sample rate, the DC1565A is supplied with the appropriate ADC. The circuitry on the analog inputs is optimized for analog input frequencies from 5MHz to 140MHz. Refer to the data sheet for proper input networks for different input frequencies. Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, Module, Linear Technology and the Linear logo are registered trademarks and PScope is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Table 1. DC1565A Variants DC1565A VARIANTS ADC PART NUMBER RESOLUTION MAXIMUM SAMPLE RATE INPUT FREQUENCY 1565A-A LTC2152-14 14-Bit 250Msps 5MHz to 140MHz 1565A-B LTC2151-14 14-Bit 210Msps 5MHz to 140MHz 1565A-C LTC2150-14 14-Bit 170Msps 5MHz to 140MHz 1565A-D LTC2152-12 12-Bit 250Msps 5MHz to 140MHz 1565A-E LTC2151-12 12-Bit 210Msps 5MHz to 140MHz 1565A-F LTC2150-12 12-Bit 170Msps 5MHz to 140MHz 1565A-G LTC2153-14 14-Bit 310Msps 5MHz to 140MHz 1565A-H LTC2153-12 12-Bit 310Msps 5MHz to 140MHz PERFORMANCE SUMMARY (TA = 25C) PARAMETER CONDITIONS MIN TYP MAX 3 3.6 6 Supply Voltage - DC1565A Depending on Sampling Rate and the A/D Converter Provided, This Supply Must Provide Up to 500mA. Analog Input Range Depending on SENSE Pin Voltage Logic Input Voltages Minimum Logic High Maximum Logic Low 1.3 0.6 V V Logic Output Voltages (Differential) Nominal Logic Levels (100 Load, 3.5mA Mode) Common Mode Minimum Logic Levels (100 Load, 3.5mA Mode) Common Mode 350 1.25 247 1.25 mV V mV V Sampling Frequency (Convert Clock Frequency) See Table 1 Encode Clock Level Differential Encode Mode (ENC - Not Tied to GND) Resolution See Table 1 1.5 or 1.32 0.2 UNITS V VP-P 1.9 V dc1565afa 1 DEMO MANUAL DC1565A PERFORMANCE SUMMARY (TA = 25C) Input Frequency Range See Table 1 SFDR See Applicable Data Sheet SNR See Applicable Data Sheet quick start procedure Demonstration circuit 1565A is easy to set up to evaluate the performance of the LTC2152 A/D converter family. Refer to Figure 1 for proper measurement equipment setup and follow the procedure below: Setup If a DC1371 Data Acquisition and Collection System was supplied with the DC1565A demonstration circuit, fol low the DC1371 Quick Start Guide to install the required software and for connecting the DC1371 to the DC1565A and to a PC. DC1565A Demonstration Circuit Board Jumpers The DC1565A demonstration circuit board should have the following jumper settings as default positions: (as per Figure 1) JP2 PAR/SER: Selects parallel or serial programming mode. (default - serial) 3.6V TO 6V PARALLEL/SERIAL TO PROVIDED POWER SUPPLY TO PROVIDED USB CABLE CHANNEL 1 dc1565a F01 SINGLE-ENDED ENCODE CLOCK (USE A LOW JITTER SIGNAL GENERATOR WITH PROPER FILTERING) Figure 1. DC1565 Setup dc1565afa 2 DEMO MANUAL DC1565A quick start procedure Applying Power and Signals to the DC1565A Demonstration Circuit The DC1371 is used to acquire data from the DC1565A, the DC1371 must first be connected to a powered USB port and have 5V applied power before applying 3.6V to 6V across the pins marked V+ and GND on the DC1565A. DC1565A requires 3.6V for proper operation. Regulators on the board produce the voltages required for the ADC. The DC1565A demonstration circuit requires up to 500mA depending on the sampling rate and the A/D converter supplied. The DC1565A should not be removed, or connected to the DC1371 while power is applied. Analog Input Network For optimal distortion and noise performance the RC network on the analog inputs may need to be optimized for different analog input frequencies. For input frequen cies above 140MHz, refer to the LTC2152 data sheet for a proper input network. Other input networks may be more appropriate for input frequencies less that 5MHz. In almost all cases, filters will be required on both analog input and encode clock to provide data sheet SNR. The filters should be located close to the inputs to avoid reflections from impedance discontinuities at the driven end of a long transmission line. Most filters do not present 50 outside the passband. In some cases, 3dB to 10dB pads may be required to obtain low distortion. If your generator cannot deliver full-scale signals without distortion, you may benefit from a medium power amplifier based on a Gallium Arsenide Gain block prior to the final filter. This is particularly true at higher frequencies where IC based operational amplifiers may be unable to deliver the combination of low noise figure and High IP3 point required. A high order filter can be used prior to this final amplifier, and a relatively lower Q filter used between the amplifier and the demo circuit. Apply the analog input signal of interest to the SMA connector on the DC1565A demonstration circuit board marked J4 AINA. This input is capacitively coupled to a balun transformer ETC11-13 (lead free part number: MABA007159-000000). Encode Clock NOTE: Apply an encode clock to the SMA connector on the DC1565A demonstration circuit board marked CLK+. As a default the DC1565A is populated to have a singleended input. For the best noise performance, the encode input must be driven with a very low jitter, sine wave source. The amplitude should be large, up to 3VP-P or 13dBm. Using bandpass filters on the clock and the analog input will improve the noise performance by reducing the wideband noise power of the signals. Data sheet FFT plots are taken with 10-pole LC filters made by TTE (Los Angeles, CA) to suppress signal generator harmonics, non-harmonically related spurs and broadband noise. Low phase noise Agilent 8644B generators are used for both the clock input and the analog input. Digital Outputs The data outputs, data clock, and frame clock signals are available on J1 of the DC1565A. This connector follows the VITA-57/FMC standard, but all signals should be verified when using an FMC carrier card other than the DC1371. Software The DC1371 is controlled by the PScopeTM System Soft ware provided or downloaded from the Linear Technology website at http://www.linear.com/software/. To start the data collection software if PScope.exe, is in stalled (by default) in \Program Files\LTC\PScope\, double click the PScope icon or bring up the run window under the start menu and browse to the PScope directory and select PScope. If the DC1565A demonstration circuit is properly connected to the DC1371, PScope should automatically detect the DC1565A, and configure itself accordingly. If everything is hooked up properly, powered and a suit able convert clock is present, clicking the Collect button should result in time and frequency plots displayed in the PScope window. Additional information and help for PScope is available in the DC1371 Quick Start Guide and in the online help available within the PScope program itself. dc1565afa 3 DEMO MANUAL DC1565A quick start procedure Serial Programming Figure 2. PScope Toolbar PScope has the ability to program the DC1565A board serially through the DC1371. There are several options available in the LTC2152 family that are only available through serially programming. PScope allows all of these features to be tested. These options are available by first clicking on the Set Demo Bd Options icon on the PScope toolbar (Figure 2). This will bring up the menu shown in Figure 3. This menu allows any of the options available for the LTC2152 family to be programmed serially. The LTC2152 family has the following options: Sleep Mode: Selects between normal operation, sleep mode. * Off (Default): Entire ADC is powered, and active * On: The entire ADC is powered down NAP: Selects between normal operation and nap mode. * Off (Default): Channel one is active * On: Channel one is in nap mode Clock Inversion: Selects the polarity of the CLKOUT signal: * Normal (Default): Normal CLKOUT polarity * Inverted: CLKOUT polarity is inverted ClkOut Phase: Selects the phase delay of the CLKOUT signal: * None (Default): No CLKOUT delay * 45 deg: CLKOUT delayed by 45 degrees Figure 3. Demobd Configuration Options * 90 deg: CLKOUT delayed by 90 degrees * 135 deg: CLKOUT delayed by 135 degrees Clock Duty Cycle: Enable or disables duty cycle stabilizer * Stabilizer off (Default): Duty cycle stabilizer disabled * Stabilizer on: Duty cycle stabilizer enabled dc1565afa 4 DEMO MANUAL DC1565A quick start procedure Output Current: Selects the LVDS output drive current Alternate Bit: Alternate bit polarity mode * 1.75mA (Default): LVDS output driver current * Off (Default): Disables alternate bit polarity * 2.1mA: LVDS output driver current * On: Enables alternate bit polarity (Before enabling ABP, be sure the part is in offset binary mode) * 2.5mA: LVDS output driver current * 3.0mA: LVDS output driver current * 3.5mA: LVDS output driver current * 4.0mA: LVDS output driver current * 4.5mA: LVDS output driver current Internal Termination: Enables LVDS internal termination * Off (Default): Disables internal termination * On: Enables internal termination Outputs: Enables digital outputs * Enabled (Default): Enables digital outputs * Disabled: Disables digital outputs Test Pattern: Selects digital output test patterns * All out = 0 (default): All digital outputs are 0 TP Enable: Selects digital output test patterns. The desired test pattern can be entered into the text boxes provided. * Off(default): ADC input data is displayed * On: Test pattern is displayed. Randomizer: Enables data output randomizer * Off (Default): Disables data output randomizer * On: Enables data output randomizer Two's Complement: Enables two's complement mode * Off (Default): Selects offset binary mode * On: Selects two's complement mode Once the desired settings are selected hit OK and PScope will automatically update the register of the device on the DC1565A demo board. * All out = 1: All digital outputs are 1 * Checkerboard: OF, and D13-D0 Alternate between 101 0101 1010 0101 and 010 1010 0101 1010 on alternat ing samples. * Alternating: Digital outputs alternate between all 1's and all 0's on alternating samples dc1565afa 5 DEMO MANUAL DC1565A parts list ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Required Circuit Components 1 4 C1, C3, C8, C10 Capacitor, X7R, 1F, 10V, 10%, 0603 AVX, 0603ZC105KAT2A 2 2 C2, C9 Capacitor, X5R, 0.1F, 10V, 10%, 0603 AVX, 0603ZD104KAQ2A 3 2 C4, C11 Capacitor, X7R, 47F, 10V, 10%, 1210 Murata, GRM32ER71A476KE15L 4 8 C5, C6, C12, C16, C21, C23, Capacitor, X5R, 0.1F, 10V, 10%, 0402 AVX, 0402ZD104KAQ2A C34, C35 5 1 C7 Capacitor, X5R, 4.7F, 6.3V, 20%, 0603 AVX, 06036D475MAT2A 6 1 C13 Capacitor, X5R, 2.2F, 10V, 20%, 0603 AVX, 0603ZD225MAT2A 7 2 C14, C19 Capacitor, X7R, 0.01F, 50V, 10%, 0603 AVX, 06035C103KAQ2A 8 3 C15, C26, C27 Capacitor, C0G, 4.7pF, 50V, 5%, 0402 AVX, 04025A4R7JAT2A 9 2 C17, C18 Capacitor, C0G, 8.2pF, 50V, 5%, 0402 AVX, 04025A8R2JAT2A 10 5 C20, C24, C28, C29, C36 Capacitor, X7R, 0.01F, 16V, 10%, 0402 Murata, GRM155R71C103KA01D 11 1 C22 Capacitor, X5R, 2.2F, 10V, 20%, 0603 AVX, 0603ZD225MAT2A 12 0 R15, C25 OPT 0402 13 4 C30, C31, C32, C33 Capacitor, C0G, 47pF, 16V, 10%, 0402 AVX, 0402YA470KA 14 1 D1 Diode Schottky, RF SER, 15V, SOT-23 Avago, HSMS-2822-TR1G 15 1 JP1 Header, 2-Pin 0.079 Single Row Samtec, TMM-102-02-L-S 16 1 J1 BGA Connector, 40 x 10 Samtec, SEAM-40-02.0-S-10-2-A-K-TR 17 2 J2, J3 Connector, SMA, 50, Straight Mount Connex., 132134 18 1 J4 Connector, SMA, 50, EDGE-LANCH E. F. Johnson, 142-0701-851 19 1 L1 Inductor, 56nH, 0603 Murata, LQP18MN56NG02D 20 0 L2 OPT 0603 21 3 L3, L4, L5 Ferrite Bead, 1206 22 0 L6 Bead, OPT 1206 Murata, BLM31PG330SN1L 23 22 R1, R2, R3, R4, R5, R6, R7, R8, R10, R16, R20, R21, R23, R24, R25, R27, R28, R33, R34, R35, R36, R47 Resistor, Chip, 100, 1/16W, 5%, 0402 NIC, NRC04J101TRF 24 5 R9, R37, R38, R39, R40 Resistor, Chip, 1k, 1/16W, 5%, 0402 Yageo, RC0402FR-071KL 25 2 R11, R18 Resistor, Chip, 33.2, 1/16W, 1%, 0402 NIC, NRC04F33R2TRF 26 1 R12 Resistor, Chip, 86.6, 1/16W, 1%, 0402 NIC, NRC04F86R6TRF 27 2 R13, R17 Resistor, Chip, 86.6, 1/16W, 1%, 0603 Vishay, CRCW060386R6FNEA 28 2 R14, R19 Resistor, Chip, 10, 1/16W, 5%, 0402 Vishay, CRCW040210R0JNED dc1565afa 6 DEMO MANUAL DC1565A parts list ITEM QTY 29 2 REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER R26, R32 Resistor, Chip, 5.1, 1/16W, 1%, 0402 Vishay, CRCW04025R10FKED 30 1 R29 PES., Chip, 0, 0402 Vishay, CRCW04020000Z0ED 31 2 R30, R31 Resistor, Chip, 49.9, 1/16W, 1%, 0402 Yageo, RC0402FR-0749R9L 32 3 R41, R42, R43 Resistor, Chip, 5.1k, 1/16W, 1%, 0402 NIC, NRC04F5101TRF 33 3 TP1, TP2, TP3 Testpoint, Turret, 0.094" pbf Mill-Max, 2501-2-00-80-00-00-07-0 34 2 T1, T3 Transformer, MABA-007159-000000 M/A-COM, MABA-007159-000000 35 1 T2 Transformer, WBC1-1L Coilcraft, WBC1-1L 36 1 U1 IC, LTC2152CUJ, 40-Pin QFN 6mm x 6mm Linear Technology, LTC2152CUJ#PBF 37 1 U3 IC, LT1763CS8-1.8, SO8 Linear Technology, LT1763CS8-1.8#TRPBF 38 1 U4 IC, LT1763CS8-3-3, SO8 Linear Technology, LT1763CS8-3.3#TRPBF 39 1 U5 IC, EEPROM, 32k, 400khz, 8TSSOP MICROChip, 24LC32A-I/ST 40 1 Fab, Printed Circuit Board Demo Circuit 1565A 41 2 Top & Botton Stencil for Proto Stencil 1565A dc1565afa 7 A B C D V+ CLK+ CLK- AINA SENSE GND J2 J3 J4 TP3 JP2 1 2 3 C7 4.7uF 0.01uF 0603 C14 5 4 1 2 C19 0.01uF 0603 4 5 R35 OPT 0.01uF C29 R15 OPT C20 0.01uF T3 R25 OPT 1 2 3 C10 1uF 4 5 R36 OPT C28 0.01uF 3 2 1 4 VDD R20 5 R10 5 + C11 47uF 1210 C21 0.1uF MABA-007159-000000 T2 WBC1-1L 6 4 R24 OPT 0.01uF C24 3 2 1 C9 0.1uF 0 C18 8.2pF R29 T1 MABA-007159-000000 C17 8.2pF 86.6 5 R13 86.6 0603 L1 R12 C8 1uF U3 LT1763CS8-1.8 56nH R17 0603 86.6 0603 C36 0.01uF R22 1K VDD PAR_SER TP2 TP1 8 3 6 7 3V - 6V 4 R31 49.9 R30 49.9 OPT L6 R21 50 R32 5.1 R26 5.1 R18 54 OPT R23 R19 5 C15 4.7pF R14 5 R34 OPT R33 OPT R27 OPT R16 100 C23 OPT C16 0.1uF 100 3 sense VDD R28 C35 0.1uF aina+ C13 2.2uF 0603 R9 1K C34 0.1uF aina- C12 0.1uF sense OVDD C22 2.2uF VDD R11 54 BEAD L5 BEAD L4 3 41 1 2 3 4 5 6 7 8 9 10 0 0 R45 R44 OVDD 30 29 28 27 26 25 24 23 22 21 OVDD R47 100 C6 0.1uF gnd of- of+ C5 0.1uF 2 2 U1 LTC2152UJ CS SCK SDI SDO VDD 40 39 38 37 36 35 34 33 32 31 8 11 12 13 14 15 16 17 18 19 20 5 DA0_1+ DA2_3+ DA4_5+ DA6_7+ CLKOUT+ DA8_9+ DA10_11+ DA12_13+ 1 DA0_1- DA2_3- DA4_5- DA6_7- CLKOUT- DA8_9- DA10_11- DA12_13- TECHNOLOGY 1 A B C D DEMO MANUAL DC1565A Schematic Diagram dc1565afa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. A B C D SEAM-10X40PIN J1A A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 5 CHANNEL 1 SEAM-10X40PIN DA2_3- DA2_3+ DA6_7- DA6_7+ DA10_11- J1B CHANNEL 0 DA10_11+ B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 F32 F33 F34 F35 F36 F37 F38 F39 F40 VDD 4 SEAM-10X40PIN J1H SEAM-10X40PIN J1F H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29 H30 H31 H32 H33 H34 H35 H36 H37 H38 H39 H40 SEAM-10X40PIN J1E DA0_1- DA0_1+ DA4_5- DA4_5+ DA8_9- DA8_9+ DA12_13- DA12_13+ E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 E20 E21 E22 E23 E24 E25 E26 E27 E28 E29 E30 E31 E32 E33 E34 E35 E36 E37 E38 E39 E40 J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 J23 J24 J25 J26 J27 J28 J29 J30 J31 J32 J33 J34 J35 J36 J37 J38 J39 J40 SEAM-10X40PIN J1G SEAM-10X40PIN J1J G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G23 G24 G25 G26 G27 G28 G29 G30 G31 G32 G33 G34 G35 G36 G37 G38 G39 G40 CLKOUT- CLKOUT+ 3 SEAM-10X40PIN J1K 3 U5 SEAM-10X40PIN 24LC32A-I /ST +3.3V J1D 2 WP JP1 R42 5K C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 1 1 TECHNOLOGY SEAM-10X40PIN J1C R43 5K R39 1K R38 1K R37 1K 2 R41 5K R40 1K C32 47pF C31 47pF C30 47pF 6 5 7 3 2 1 C33 47pF SCK SDI SDO CS 2 K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 K19 K20 K21 K22 K23 K24 K25 K26 K27 K28 K29 K30 K31 K32 K33 K34 K35 K36 K37 K38 K39 K40 100K R46 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 8 4 4 1 5 A B C D DEMO MANUAL DC1565A Schematic Diagram dc1565afa 9 DEMO MANUAL DC1565A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC applica tion engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright (c) 2004, Linear Technology Corporation dc1565afa 10 Linear Technology Corporation LT 1211 REV A * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 2011