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ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FSA644 -- 2:1 MIPI D-PHY (1.5Gbps) 4-Data Lane Switch Features Description Switch Type SPDT (10x) Signal Types MIPI, D-PHY VCC 1.65 to 4.5 V Input Signals 0 to VCC 6 Typical HS MIPI 8 Typical LP MIPI RON RON The FSA644 is a four-data-lane, MIPI, D-PHY switch. This single-pole, double-throw (SPDT) switch is optimized for switching between two high-speed or low-power MIPI sources. The FSA644 is designed for the MIPI specification and allows connection to a CSI or DSI module. 0.6 Typical HS & LP MIPI 0.3 Typical RON_FLAT ICCZ 0.5 A Maximum ICC 32 A Maximum OIRR -40 dB Typical XTALK -25 dB Typical Bandwidth 1100 MHz Minimum Channel-to-Channel Skew 6 ps Typical CON Applications Cellular Phones, Smart Phones Displays Related Resources FSA644 Demonstration Board 5.2 pF Operating Temperature -40 to +85C Package 36-Ball WLCSP FSA644UCX Top Mark M7 Ordering Information FSA644UCX KM FSA644BUCX Top Mark Ordering Information FSA644BUCX Typical Application CLK MIPI Module #1 CSI / DSI Data [1:4] CLK FSA644 CLK MIPI Module #2 CSI / DSI Data [1:4] 4-Data Lane MIPI Switch Processor Data [1:4] Figure 1. Mobile Phone Example (c) 2011 Fairchild Semiconductor Corporation FSA644 * Rev. 1.17 www.fairchildsemi.com FSA644 -- 2:1 MIPI D-PHY (1.5Gbps) 4-Data-Lane Switch January 2015 FSA644 -- 2:1 MIPI D-PHY (1.5Gbps) 4-Data-Lane Switch Pin Descriptions CLKAP CLKBP CLKAN CLKBN DA1P DB1P DA1N DB1N DA2P DB2P /OE CLKP CLKN D1P D1N D2P DA2N DB2N D2N DA3P DB3P D3P DA3N DB3N D3N DA4P DB4P D4P DA4N DB4N D4N Pin Name Description CLKP/N Common Clock Path D1P/N Common Data Path 1 D2P/N Common Data Path 2 D3P/N Common Data Path 3 D4P/N Common Data Path 4 CLKAP/N A-Side Clock Path DA1P/N A-Side Data Path 1 DA2P/N A-Side Data Path 2 DA3P/N A-Side Data Path 3 DA4P/N A-Side Data Path 4 CLKBP/N B-Side Clock Path DB1P/N B-Side Data Path 1 DB2P/N B-Side Data Path 2 DB3P/N B-Side Data Path 3 DB4P/N B-Side Data Path 4 Control Pin SEL SEL=0 CLKP=CLKAP, CLKN=CLKAN, Dn(P/N)=DAn(P/N) SEL=1 CLKP=CLKBP, CLKN=CLKBN, Dn(P/N)=DBn(P/N) /OE Output Enable VCC Power GND Ground No Connect NC SEL Figure 2. Analog Symbol (c) 2011 Fairchild Semiconductor Corporation FSA644 * Rev. 1.17 www.fairchildsemi.com 2 A CLKN B D1N C D2N D D3N E D4N F /OE 1 CLKP D1P D2P D3P D4P SEL 2 CLKAP CLKAN NC GND DB4P DB4N 3 DA1P DA2P DA2N DA1N DA3P DA3N VCC DA4P DA4N NC DB3P DB3N 4 CLKBN DB1N DB2N 5 CLKBP DB1P DB2P 6 Figure 3. Top Through View Table 1. Ball-to-Pin Mappings Ball Pin Name A1 CLKN A2 CLKP A3 CLKAP A4 DA1P A5 DA2P A6 DA2N B1 D1N B2 D1P B3 CLKAN B4 DA1N B5 DA3P B6 DA3N C1 D2N C2 D2P C3 NC C4 VCC C5 DA4P C6 DA4N D1 D3N D2 D3P D3 GND D4 NC D5 CLKBN D6 CLKBP E1 D4N E2 D4P E3 DB4P E4 DB3P E5 DB1N E6 DB1P F1 /OE F2 SEL F3 DB4N F4 DB3N F5 DB2N F6 DB2P Truth Table SEL /OE Function LOW LOW CLKP=CLKAP, CLKN=CLKAN, Dn(P/N)=DAn(P/N) HIGH LOW CLKP=CLKBP, CLKN=CLKBN, Dn(P/N)=DBn(P/N) X HIGH DAn(P/N), DBn(P/N) Data Ports High Impedance (c) 2011 Fairchild Semiconductor Corporation FSA644 * Rev. 1.17 www.fairchildsemi.com 3 FSA644 -- 2:1 MIPI D-PHY (1.5Gbps) 4-Data-Lane Switch Pin Definitions Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC Parameter Supply Voltage (1) VCNTRL DC Input Voltage (/OE) VSW DC Switch I/O Voltage IIK DC Input Diode Current IOUT DC Output Current TSTG Storage Temperature (1) Max. Unit -0.50 +5.25 V -0.5 VCC V -0.50 5.25 V -50 -65 Human Body Model, JEDEC: JESD22-A114 ESD Min. 50 mA +150 C All Pins 3.5 I/O to GND 3.5 Power to GND 8.0 Charged Device Model, JEDEC: JESD22-C101 IEC 61000-4-2 System mA kV 1.5 Contact 8.0 Air Gap 15.0 Note: 1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VCNTRL VSW TA Parameter Min. Max. Unit 1.65 4.50 V 0 VCC V HS Mode 0.1 0.3 LP Mode 0 1.2 -40 +85 Supply Voltage Control Input Voltage (S, /OE) (2) Switch I/O Voltage (CLKn, CLKAn, CLKBn, Dn, DAn, DBn) Operating Temperature V C Note: 2. The control input must be held HIGH or LOW; it must not float. (c) 2011 Fairchild Semiconductor Corporation FSA644 * Rev. 1.17 www.fairchildsemi.com 4 FSA644 -- 2:1 MIPI D-PHY (1.5Gbps) 4-Data-Lane Switch Absolute Maximum Ratings All typical values are at TA=25C unless otherwise specified. Symbol Parameter Conditions VIK Clamp Diode Voltage VIH Input Voltage High 1.65 to 4.50 VIL Input Voltage Low 1.65 to 4.50 IIN Control Input Leakage (SEL,/OE) INO(OFF), INC(OFF) IIN=-18 mA VCC (V) VSW=0 to VCC CLKn, Dn=0.3 V; VCC-0.3 V; Off Leakage Current of Port CLKAn, DAn, or CLKBn; CLKAn, DAn, CLKBn, DBn DBn= VCC-0.3 V, 0.3 V, or Floating; /OE=0 V CLKn, Dn = 0.3 V; VCC-0.3 V; CLKAn, DAn, or CLKBn; DBn=VCC-0.3 V, 0.3 V, or Floating; /OE=0 V IA(ON) IOFF CLKn, Dn, or CLKAn; DAn or Power-Off Leakage Current CLKBn, DBn; VIN=0 V to 4.5 V; VCC=0 V IOZ Off-State Leakage 0 CLKn, Dn, CLKAn, CLKBn, DAn, DBn 3.6 V, /OE=High Switch On Resistance for (3) HS MIPI Applications ION=-10 mA, /OE=0 V, SEL=VCC or 0V, CLKA, B, DBn or DAn=0.1, 0.2, 0.3 RON_MIPI_LP RON_MIPI_HS RON_MIPI_LP RON_FLAT_MIPI_HS RON_FLAT_MIPI_LP Switch On Resistance for (3) LP MIPI Applications On Resistance Matching Between HS MIPI (4) Channels On Resistance Matching Between LP MIPI (4) Channels On Resistance Flatness for (4) HS MIPI Signals On Resistance Flatness for (4) LP MIPI Signals Min. Typ. 2.8 On Leakage Current of Common Ports (CLKn, Dn) RON_MIPI_HS TA=- 40C to +85C ION=-10 mA, /OE=0 V, SEL=VCC or 0V, CLKA, B, DBn or DAn=0, 0.6, 1.2 V ION=-10 mA, /OE=0 V, SEL=VCC or 0 V, CLKA, B, DBn or DAn=0.1, 0.2, 0.3 ION=-10 mA, /OE=0 V, SEL=VCC or 0 V, CLKA,B, DBn or DAn= 0.0, 0.6, 1.2 V ION=-10 mA, /OE=0 V, SEL=VCC or 0 V, CLKA, B, DBn or DAn=0.1, 0.2, 0.3 ION=-10 mA, /OE=0 V, SEL=VCC or 0 V, CLKA, B, DBn or DAn=0.0, 0.6, 1.2 V Max. -1.2 1.0 Unit V V 0.4 V 1.65 to 4.50 -100 100 nA 1.65 to 4.50 -100 100 nA 1.65 to 4.50 -100 100 nA 0 -100 100 nA 4.5 -100 100 nA 1.8 7 12 2.5 6 9 3.6 6 9 4.5 6 9 1.8 6.7 12.0 2.5 6.4 9.0 3.6 6.2 9.0 4.5 6.0 9.0 1.8 0.8 2.5 0.6 3.6 0.5 4.5 0.5 1.8 0.8 2.5 0.6 3.6 0.5 4.5 0.5 1.8 1.5 2.5 0.5 3.6 0.3 4.5 0.2 1.8 35 2.5 2 3.6 1 4.5 0.5 Continued on the following page... (c) 2011 Fairchild Semiconductor Corporation FSA644 * Rev. 1.17 www.fairchildsemi.com 5 FSA644 -- 2:1 MIPI D-PHY (1.5Gbps) 4-Data-Lane Switch DC Electrical Characteristics All typical values are at TA=25C unless otherwise specified. Symbol Parameter Conditions ICCZ Quiescent Hi-Z Supply Current VIN=0 or VCC, IOUT=0 ICC Quiescent Supply Current VIN=0 or VCC, IOUT=0 ICCT Increase in ICC Current Per Control Voltage and VCC VSEL,/OE=1.65 V TA=- 40C to +85C VCC (V) Min. Typ. Max. 4.5 0.5 2.5 to 4.5 32 1.8 22 4.5 4 2.5 0.1 Unit A A A Notes: 3. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltage on the two (A or B ports). 4. Guaranteed by characterization. AC Electrical Characteristics All typical values are for VCC=3.3V at TA=25C unless otherwise specified. Symbol Parameter Conditions tINIT Initalization Time (5) VCC to Output RL=50 , CL=5 pF, VSW=1.2 V tEN Enable Turn-On Time, /OE to Output RL=50 , CL=5 pF, VSW=1.2 V tDIS Disable Turn-Off Time, /OE to Output RL=50 , CL=5 pF, VSW=1.2 V tON Turn-On Time, SEL to Output RL=50 , CL=5 pF, VSW=1.2 V tOFF Turn-Off Time SEL to Output RL=50 , CL=5 pF, VSW=1.2 V tBBM Break-Before-Make Time RL=50 , CL=5 pF, VSW=1.2 V OIRR Off Isolation for MIPI XTALK Crosstalk for MIPI BW SDD21 -3db Bandwidth (5) (5) (5) Differential Data Rate VCC (V) TA=- 40C to +85C Min. Typ. Max. 2.5 to 4.5 100 1.8 150 2.5 to 4.5 120 200 1.8 250 500 2.5 to 4.5 25 50 1.8 50 90 2.5 to 4.5 50 100 1.8 75 125 2.5 to 4.5 50 200 1.8 200 325 10 Unit s ns ns ns ns 50 ns RL=50 , f=750 MHz, /OE=VCC VSW=-1 dBm (200 mVPP) 1.65 to 4.5 -18 dB RL=50 , f=750 MHz, VSW=-1 dBm (200 mVPP) 1.65 to 4.5 -25 dB 1600 MHz 1.5 Gbps RL=50 , CL=0 pF 3.0 Inter-operability Data Rate 3.0 1100 Note: 5. Guaranteed by characterization. (c) 2011 Fairchild Semiconductor Corporation FSA644 * Rev. 1.17 www.fairchildsemi.com 6 FSA644 -- 2:1 MIPI D-PHY (1.5Gbps) 4-Data-Lane Switch DC Electrical Characteristics Symbol Parameter Conditions VCC (V) TA=- 40C to +85C Min. Typ. Max. Unit tSK(O) Channel-to-Channel Single(6) Ended Skew TDR-Based Method (VSW=0.2 VPP, CL=CON) 3.3 6 20 ps tSK(P) Skew of Opposite Transitions of (6) the Same Output TDR-Based Method (VSW=0.2 VPP, CL=CON) 3.3 6 20 ps Note: 6. Guaranteed by characterization. Capacitance Symbol Parameter TA=- 40C to +85C Conditions Min. Typ. CIN Control Pin Input Capacitance VCC=0 V, f=1 MHz 2.1 CON Out On Capacitance VCC=3.3 V, /OE=0 V, f=1 MHz 5.2 COFF Out Off Capacitance VCC and /OE=3.3 V, f=1 MHz 2.0 Max. Unit pF Ordering Information Part Number Top Mark FSA644UCX M7 FSA644BUCX KM Package D E X Y 36-Ball WLCSP, Non-JEDEC 2.36 mm x 2.36 mm, 0.4 mm Pitch 2.36 mm 2.36 mm 0.18 mm 0.18 mm 36-Ball WLCSP, Non-JEDEC 2.415 mm x 2.415 mm, 0.4 mm Pitch 2.415 mm 2.415 mm 0.208 mm 0.208 mm (c) 2011 Fairchild Semiconductor Corporation FSA644 * Rev. 1.17 www.fairchildsemi.com 7 FSA644 -- 2:1 MIPI D-PHY (1.5Gbps) 4-Data-Lane Switch High-Speed-Related AC Electrical Characteristics ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. "Typical" parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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