DS04-28212-1E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP Image Processing
30MHz 8-bit A/D Converter
(With AMP)
MB40C218
■DESCRIPTION
MB40C218 is a high-speed converter using a fast CMOS technology.
■FEATURES
• Reso lut ion : 8 bit
•Linearity error : ±0.2% (standard)
• Differential linearity error : ±0.12% (standard)
• Maximum conversion rate : 30 MSPS(minimum)
• Supply voltage : Amplifier +5.00 ± 0.25 [V]
A/D converter +3.00 ± 0.30 [V]
• Digital input voltage range : TTL compatible
• Digital output voltage range : 3 V CMOS level compatible (tristate output)
• Analog input voltage range : 0 to 1.5 V (1.5 VP-P)
• analog input capacitance : 15 pF (standard)
• Power dissipation : 90 mW (standard: @ AVDD5 = 5.00 V, AVDD3 = DVDD = 3.00 V)
• Additional features : 1:3 gain amp with dual input selector (bandwidth: 20 MHz, inverting amp)
VRT reference voltage adjustment amp
Power saving capability
Digital output test capability
Analog input offset resistor
• Package : 32-pin plastic QFP
■PACKAGE
(FPT-32P-M21)
32 pin, Plastic QFP
2
MB40C218
■PIN ASSIGNMENT
32
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
NC
V RTC
V RT
AV DD3
NC
TEST
CLK
DV DD
V RB
AV SS
AV SS
SEL
CE
NC
AV SS
DV SS
31 30 29 28 27 26 25
9 10111213141516
D 7
(MSB) D 6 D 5 D 4 D 3 D 2 D 1 D 0
(LSB)
OE AV SS OPO ADIN AV SS V IN2 AV DD5 V IN1
3
MB40C218
■DESCRIPTION OF PINS
The values in parentheses are standard.
■PRECAUTIONS ON USE
Be sure to ground the pins of AVDD5, AVDD3, DVDD and VRT via high-frequency capacitor.
Place the high-frequency capacitor as close as possible to the pin.
You c an mi nim ize th e power su ppl y cu rrent dissi pation due to the int erna l l ogic in dete rmi nat ion by maki ng CE
to high on power turning on.
Pin No. Symbol Description
26 AVDD5 Analog section power supply (+ 5.00 V)
21 AVDD3 A/D converter analog power supply (+ 3 V)
17 DVDD A/D converter digital power supply (+ 3 V)
2, 3, 7, 28, 31 AVSS Analog power supply ground pin (0 V)
8DV
SS Digital power supply ground pin (0 V)
9 to 16 D7 to D0Digital out put pin
18 CLK Clock input pin
29 ADIN A/D converter analog input pin.
Input range is VRB to VRT (0 to 1.5 V)
Relationship between analog input and digital output is defined by Test function.
23 VRTC Input pin for reference voltage adjustment amp (VRT reference voltage adjustment)
VRT is adjusted so that it is 1.5 V with the input pin opened.
22 VRT Ref erence voltage output pin on top side.
The voltage fed to VRTC is output.
1V
RB Reference voltage input pin on bottom side (0V)
25 VIN1 Input pin 1 for 1:3 gain amp Dual input selector for inverting amp
27 VIN2 Input pin 2 for 1:3 gain amp
30 OPO Input pin for 1:3 gain (at standby: high impedance)
4SEL
Toggle input pin for dual input selector for 1:3 gain amp
Input "L": VIN1, Input "H": VIN2
Test function
5CE
Input pin for toggling standby function.
Input high signal brings the standby state to the A/D
converter, 1:3 gain amp, and reference voltage adjustment
amp.
32 OE Output (D7 to D0) enable input pin.
Input low signal readies digital output.
Input high signal induces high-impedance state.
19 TEST Test input pin.
6, 20, 24 N.C. No connection pins
4
MB40C218
■ABSOLUTE MAXIMUM RATINGS
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.
In the norm al operations, it i s recommen ded to use the dev ice in the re commende d conditio ns; exceedi ng
the conditions may affect device reliability.
■RECOMMENDED OPERATIN G CONDITIONS
Parameter Symbol Rating Units
Min. Max.
Power supply voltage AVDD5, AVDD3, DVDD –0.3 +7.0 V
Input/output voltage
SEL, CE, OE
CLK, TEST
VRB, VRT, VRTC
ADIN, VIN1, VIN2
OPO
–0.3 AVDD5 + 0.3 V
Digital output voltage D0 to D7–0.3 DVDD + 0.3 V
Storage temperature Tstg –55 +125 °C
Parameter Symbol Value Units
Min. Typ. Max.
Power supply voltage
AVDD5 4.75 5.00 5.25 V
AVDD3 2.70 3.00 3.30 V
DVDD 2.70 3.00 3.30 V
Analog conversion range VADIN VRB —VRT V
Analog conversion voltage VRT to VRB 1.05 — 2.10 V
Analog reference input voltage: T VRTC 1.05 — 2.10 V
Analog reference voltage: B VRB 0——V
Digital "H" level input voltage VIHD 2.1 — — V
Digital "L" level input voltage VILD ——0.8V
Digital input current IID ——5µA
Clock frequency fCLK 0.5 — 30 MHz
"H" level minimum clock pulse widt h tW+14.0 — — ns
"L" level minimum clock pulse width tW–14.0 — — ns
Operating temperature range Ta –20 — 75 °C
5
MB40C218
■ELECTRICAL CHARACTERISTICS
1. DC Characterist ics
(1) Analog Section (AVDD5 = 4.75 to 5.25V, AVDD3 = DVDD = 2.70 to 3.30V, Ta = –20 to +75°C)
(2) Digital Section (AVDD5 = 4.75 to 5.25V, AVDD3 = DVDD = 2.70 to 3.30V, Ta = –20 to +75°C)
Parameter Symbol Value Units
Min. Typ. Max.
Resolution — — 8 — bit
Linearity erro r Condit ion al DC
precision
VRT = 1.5V
VRB = 0V
LE — ±0.2 ±0.4 %
Differential linearity error DLE — ±0.12 ±0.2 %
Analog input capacity CADIN —15—pF
Analog su ppl y cur r en t AVDD5 —7.0—mA
AVDD3 — 16.0 — mA
Digital supply current DVDD —3.0—mA
Standby supply current ISTB —100—µA
1:3 amp gain DC to 10 MHz Gamp 9.0 9.5 10.0 dB
10 to 20 MHz 6.0 6.5 — dB
VIN1, 2 bias voltage VBI1, 2 —AVDD5/2 — V
VIN1, 2 input resistance RI1, 2 19 27 35 kΩ
VIN1, 2 input capacity CI1, 2 —15—pF
1:3 gain amp group delay (DC to 10 MHz) G-Delay — — ±10 ns
1:3 gain amp
(fin = 4, 5, 7 MHz)
2nd order harmonic
distortion H2 — — –50 dB
3rd order harmonic
distortion H3 — — –55 dB
Dual power cross talk (fin = 7 MHz) CT — — –50 dB
Setup voltage with open VRTC VRTCO —AVDD3/2 — V
VRTC input resistance VRTC —25—kΩ
ADIN input resistance RADIN —4.5—kΩ
Parameter Symbol Value Units
Min. Typ. Max.
Digital "H" level output voltage VOHD 2.4 — DVDD V
Digital "L" level output voltage VOLD ——0.4V
Digital " H" level output current IOHD –400 — — µA
Digital "L" level output current IOLD ——1.6mA
6
MB40C218
(3) Switching Section (AVDD5 = 4.75 to 5.25V, AVDD3 = DVDD = 2.70 to 3.30V, Ta = –20 to +75°C)
■TIMING DIAGRAM
■DIGITAL OUTPUT BUFFER LOAD CIRCUIT
Parameter Symbol Value Unit
Min. Typ. Max.
Maximum conversion rate fS30 — — MSPS
Digital output delay time tpd 71325ns
3 V
0 V
V OH
V OL
CLK
ADIN
D 0 to D 7
SANPLENSANPLEN+1
DATAN–2 DATAN–1 DATAN0.5 DV DD
tpd
1.5V
tw+tw–
C L = 15 pF
DV SS (Note) CL includes a stray capacitance of a probe and a fixture.
Measurement point
To the
measurement
point
7
MB40C218
■TEST FUNCTION
■DIGITAL OUTPUT CODE
TEST CE SEL OE D0D1D2D3D4D5D6D7
L
L
H
H
H
X
L
H
L
H
H
X
X
X
X
L
H
X
L
L
L
L
L
H
D0
L
D0
H
L
D1
L
D1
L
H
D2
L
D2
H
L
D3
L
D3
L
H
D4
L
D4
H
L
D5
L
D5
L
H
D6
L
D6
H
L
D7
L
D7
L
H
ADIN input voltage Step Digital output code
TEST = “L” TEST = “H”
VRT
•
•
•
•
•
•
VRB
0
•
•
127
128
•
•
255
0000 0000
•
•
0111 1111
1000 0000
•
•
1111 1111
1111 1111
•
•
1000 0000
0111 1111
•
•
0000 0000
High impeda nc e
Condition: CE = OE = “L”
8
MB40C218
■BLOCK DIAGRAM
AMP
AMP
32
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
NC
DC
control
DC 3 V
L/H
L/H
DC3 V
V RTC
V RT
AV DD3
NC
TEST
CLK
DV DD
V RB
AV SS
AV SS
SEL
VB1
CE
NC
L/H
L/H
AV SS
DV SS
31 30 29 28 27 26 25
910111213141516
D 7
(MSB) D 6 D 5 D 4
Di
g
ital out
8 bit 30 MSPS
A/DConverter
D 3 D 2 D 1 D 0
(LSB)
OE AV SS OPO ADIN AV SS
500 mV p-p
(max.) 500 mV p-p
(max.)
DC 5 V
V IN2 AV DD5 V IN1
9.5 dB
9
MB40C218
■ORDERING INFORMATION
Part number Package Remark
MB40C218PFQ 32 pin, Plastic QFP
(FPT-32P-M02)
10
MB40C218
■PACKAGE DIMENSIONS
(FPT-32P-M21)
32 pin, Plastic QFP
+0.20
–0.10
+.008
–.004
+0.05
–0.02
+.002
–.001
(.020±.008)
(.004±.004)
0.10±0.10
0.50±0.20
0 10°
Details of "A" part
32
25
24 17
16
9
81 "A"
1.50
.059
0.127
.005
1 PIN INDEX
0.10(.004)
M
0.16(.006)
(.012±.004)
NOM
(.315)
REF
(.220) 8.00
5.60
0.30±0.100.80(.0315)TYP
7.00±0.10(.276±.004)SQ
9.00±0.20(.354±.008)SQ
1994 FUJITSU LIMITED F32032S-1C-2
CDimensions in mm (inch).
MB40C218
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F9703
FUJITSU LIMITED Printed in Japan
