SCES553A − M AY 2004 − REVISED JULY 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DMember of the Texas Instruments
Widebus+ Family
DControl Inputs VIH/VIL Levels Are
Referenced to VCCA Voltage
DVCC Isolation Feature − If Either VCC Input
Is at GND, Both Ports Are in the
High-Impedance State
DOvervoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
DFully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.2-V to
3.6-V Power-Supply Range
DIoff Supports Partial-Power-Down Mode
Operation
DI/Os Are 4.6-V Tolerant
DLatch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
DESD Protection Exceeds JESD 22
− 4000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
This 32-bit noninverting bus transceiver uses two separate configurable power-supply rails. The
SN74AVC32T245 i s optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB
as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The
B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVC32T245 is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVC32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1OE, 2OE, 3OE, and 4OE)
are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The V CC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
LFBGA − GKE
SN74AVC32T245GKER
°
°
LFBGA − ZKE (Pb-free)
SN74AVC32T245ZKER
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
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