NVMFS5C638NL MOSFET - Power, Single N-Channel 60 V, 3.0 mW, 133 A Features * * * * * * Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses NVMFS5C638NLWF - Wettable Flank Option for Enhanced Optical Inspection AEC-Q101 Qualified and PPAP Capable These Devices are Pb-Free and are RoHS Compliant www.onsemi.com V(BR)DSS RDS(ON) MAX 3.0 mW @ 10 V 60 V Symbol D (5) Value Unit Drain-to-Source Voltage VDSS 60 V Gate-to-Source Voltage VGS 20 V ID 133 A Continuous Drain Current RqJC (Notes 1, 3) TC = 25C Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2, 3) Steady State TC = 100C TC = 25C TC = 100C TA = 25C Power Dissipation RqJA (Notes 1 & 2) Pulsed Drain Current Steady State S (1,2,3) W 100 ID A 26 PD W 4 2 IDM 811 A TJ, Tstg -55 to + 175 C IS 84 A Single Pulse Drain-to-Source Avalanche Energy (IL(pk) = 13 A) EAS 180 mJ Lead Temperature for Soldering Purposes (1/8 from case for 10 s) TL 260 C Operating Junction and Storage Temperature Source Current (Body Diode) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Parameter MARKING DIAGRAM 18 TA = 100C TA = 25C, tp = 10 ms N-CHANNEL MOSFET 50 TA = 100C TA = 25C G (4) 94 PD 133 A 4.2 mW @ 4.5 V MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Parameter ID MAX Symbol 1 DFN5 (SO-8FL) CASE 488AA STYLE 1 D S S S G D XXXXXX AYWZZ D D XXXXXX = 5C638L XXXXXX = (NVMFS5C638NL) or XXXXXX = 638LWF XXXXXX = (NVMFS5C638NLWF) A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability ORDERING INFORMATION Value Unit C/W Junction-to-Case - Steady State RqJC 1.5 Junction-to-Ambient - Steady State (Note 2) RqJA 40.1 See detailed ordering, marking and shipping information on page 5 of this data sheet. 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface-mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. (c) Semiconductor Components Industries, LLC, 2017 July, 2019 - Rev. 0 1 Publication Order Number: NVMFS5C638NL/D NVMFS5C638NL ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter Symbol Test Condition Min Drain-to-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 60 Drain-to-Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate-to-Source Leakage Current V 26 VGS = 0 V, VDS = 60 V mV/C TJ = 25 C 10 TJ = 125C 250 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 250 mA 100 mA nA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Threshold Temperature Coefficient VGS(TH)/TJ Drain-to-Source On Resistance Forward Transconductance RDS(on) 1.2 2.0 -5.0 VGS = 10 V ID = 50 A 2.6 3.0 VGS = 4.5 V ID = 50 A 3.6 4.2 gFS VDS =15 V, ID = 50 A V mV/C 130 mW S CHARGES AND CAPACITANCES Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 2880 VGS = 0 V, f = 1 MHz, VDS = 25 V 1680 pF 22 Total Gate Charge QG(TOT) VGS = 4.5 V, VDS = 48 V; ID = 50 A 18.4 nC Total Gate Charge QG(TOT) VGS = 10 V, VDS = 48 V; ID = 50 A 40.7 nC Threshold Gate Charge QG(TH) 4.5 Gate-to-Source Charge QGS Gate-to-Drain Charge QGD Plateau Voltage VGP 3.0 td(ON) 15 VGS = 10 V, VDS = 48 V; ID = 50 A 8.6 nC 3.8 V SWITCHING CHARACTERISTICS (Note 5) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time tr td(OFF) VGS = 10 V, VDS = 48 V, ID = 50 A, RG = 1 W tf 58 ns 66 96 DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD VGS = 0 V, IS = 50 A TJ = 25C 0.84 TJ = 125C 0.73 tRR ta tb 1.2 V 42 VGS = 0 V, dIs/dt = 100 A/ms, IS = 50 A QRR 21 ns 22 28 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NVMFS5C638NL TYPICAL CHARACTERISTICS 120 100 ID, DRAIN CURRENT (A) 3.6 V to 10 V 3.2 V 80 3.0 V 60 2.8 V 40 100 80 60 40 20 20 0 0 0 0.5 1.0 1.5 2.5 2.0 TJ = 125C 0 16 14 12 10 8 6 4 2 3 4 5 6 8 7 9 10 VGS, GATE-TO-SOURCE VOLTAGE (V) 4 5 6 TJ = 25C 5 4 VGS = 4.5 V 3 VGS = 10 V 2 1 0 10 30 70 50 90 110 130 150 ID, DRAIN CURRENT (A) Figure 3. On-Resistance vs. Gate-to-Source Voltage Figure 4. On-Resistance vs. Drain Current and Gate Voltage 100K VGS = 10 V ID = 50 A TJ = 150C IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN-TO- SOURCE RESISTANCE 3 Figure 2. Transfer Characteristics 18 1.8 TJ = -55C 2 Figure 1. On-Region Characteristics TJ = 25C ID = 50 A 2.0 1 VGS, GATE-TO-SOURCE VOLTAGE (V) 20 2 TJ = 25C VDS, DRAIN-TO-SOURCE VOLTAGE (V) RDS(on), DRAIN-TO-SOURCE RESISTANCE (mW) RDS(on), DRAIN-TO-SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 120 1.6 1.4 1.2 1.0 10K TJ = 125C 1K TJ = 85C 100 0.8 0.6 -50 -25 0 25 50 75 100 125 150 175 10 5 15 25 35 45 55 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Voltage www.onsemi.com 3 NVMFS5C638NL TYPICAL CHARACTERISTICS VGS, GATE-TO-SOURCE VOLTAGE (V) 10K C, CAPACITANCE (pF) CISS COSS 1K 100 10 VGS = 0 V TJ = 25C f = 1 MHz 1 0 CRSS 20 10 40 30 50 60 5 QGS 4 QGD 3 VDS = 48 V ID = 50 A TJ = 25C 2 1 0 0 15 10 5 20 30 25 35 40 50 VGS = 0 V IS, SOURCE CURRENT (A) t, TIME (ns) 6 Figure 8. Gate-to-Source Voltage vs. Total Charge 100 tr td(on) 10 VGS = 10 V VDS = 48 V 1 11 21 31 40 30 20 10 0 41 TJ = 125C 0.3 0.4 0.5 TJ = 25C 0.6 0.7 TJ = -55C 0.8 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 1000 10 ms 100 TC = 25C VGS 10 V Single Pulse 1 RDS(on) Limit Thermal Limit Package Limit 0.1 TJ (initial) = 25C IPEAK, (A) ID, DRAIN CURRENT (A) 7 Figure 7. Capacitance Variation tf 0.1 8 QG, TOTAL GATE CHARGE (nC) td(off) 10 9 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 1K 1 10 1 10 10 TJ (initial) = 100C 0.5 ms 1 ms 10 ms 1 100 1000 0.00001 0.0001 0.001 VDS, DRAIN-TO-SOURCE VOLTAGE(V) TIME IN AVALANCHE (s) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. IPEAK vs. Time in Avalanche www.onsemi.com 4 0.01 NVMFS5C638NL TYPICAL CHARACTERISTICS 100 RqJA (C/W) 50% Duty Cycle 10 20% 10% 5% 1 2% 1% 0.1 0.01 0.000001 Single Pulse 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 13. Thermal Characteristics DEVICE ORDERING INFORMATION Device Marking Package Shipping NVMFS5C638NLT1G 5C638L DFN5 (Pb-Free) 1500 / Tape & Reel NVMFS5C638NLWFT1G 638LWF DFN5 (Pb-Free, Wettable Flanks) 1500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 NVMFS5C638NL PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO-8FL) CASE 488AA ISSUE M 2X 0.20 C D 2 A B D1 2X 0.20 C 2 2 3 DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q 4X E1 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. q E c A1 4 TOP VIEW C SEATING PLANE DETAIL A 0.10 C A 0.10 C SIDE VIEW 0.10 8X b C A B 0.05 c DETAIL A RECOMMENDED SOLDERING FOOTPRINT* e/2 2X 0.495 e L 1 MILLIMETERS MIN NOM MAX 1.10 0.90 1.00 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.00 5.30 5.15 4.70 4.90 5.10 3.80 4.00 4.20 6.00 6.30 6.15 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.575 0.71 1.20 1.35 1.50 0.51 0.575 0.71 0.125 REF 3.00 3.40 3.80 0_ --- 12 _ STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 4.560 2X 1.530 4 K PIN 5 (EXPOSED PAD) G 3.200 E2 L1 4.530 M D2 1.330 2X 0.905 1 BOTTOM VIEW 0.965 4X 1.000 4X 0.750 1.270 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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