IRFP450A, SiHFP450A Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) * Low Gate Charge Qg Results in Simple Drive Requirement 500 RDS(on) () VGS = 10 V 0.40 Qg (Max.) (nC) 64 Qgs (nC) 16 Qgd (nC) * Improved Gate, Avalanche and Dynamic dV/dt Ruggedness * Fully Characterized Capacitance Avalanche Voltage and Current 26 Configuration Single Available RoHS* COMPLIANT and * Effective Coss Specified * Lead (Pb)-free Available D APPLICATIONS TO-247 * Switch Mode Power Supply (SMPS) * Uninterruptable Power Supply G * High Speed Power Switching TYPICAL SMPS TOPOLOGIES S D G S * Two Transistor Forward N-Channel MOSFET * Half Bridge, Full Bridge * PFC Boost ORDERING INFORMATION Package TO-247 IRFP450APbF SiHFP450A-E3 IRFP450A SiHFP450A Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque SYMBOL VDS VGS VGS at 10 V TC = 25 C TC = 100 C ID IDM TC = 25 C for 10 s 6-32 or M3 screw EAS IAR EAR PD dV/dt TJ, Tstg LIMIT 500 30 14 8.7 56 1.5 760 14 19 190 4.1 - 55 to + 150 300d 10 1.1 UNIT V A W/C mJ A mJ W V/ns C lbf * in N*m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 C, L = 7.8 mH, RG = 25 , IAS = 14 A (see fig. 12). c. ISD 14 A, dI/dt 130 A/s, VDD VDS, TJ 150 C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91230 S-81271-Rev. A, 16-Jun-08 www.vishay.com 1 IRFP450A, SiHFP450A Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 40 Case-to-Sink, Flat, Greased Surface RthCS 0.24 - Maximum Junction-to-Case (Drain) RthJC - 0.65 UNIT C/W SPECIFICATIONS TJ = 25 C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient VDS VGS = 0 V, ID = 250 A 500 - - V VDS/TJ Reference to 25 C, ID = 1 mA - 0.58 - V/C VGS(th) VDS = VGS, ID = 250 A 2.0 - 4.0 V Gate-Source Leakage IGSS VGS = 30 V - - 100 nA Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 25 VDS = 400 V, VGS = 0 V, TJ = 125 C - - 250 Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs ID = 8.4 Ab VGS = 10 V VDS = 50 V, ID = 8.4 Ab A - - 0.40 7.8 - - S - 2038 - - 307 - 10 - Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Coss VGS = 0 V; VDS = 1.0 V, f = 1.0 MHz 2859 Coss VGS = 0 V; VDS = 400 V, f = 1.0 MHz 81 Coss eff. VGS = 0 V; VDS = 0 V to 400 Vc 96 Output Capacitance Effective Output Capacitance Total Gate Charge Qg Gate-Source Charge Qgs VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 10 V - ID = 14 A, VDS = 400 V, see fig. 6 and 13b - - 64 - - 16 Gate-Drain Charge Qgd - - 26 Turn-On Delay Time td(on) - 15 - Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = 250 V, ID = 14 A, RG = 6.2 , RD = 17 , see fig. 10b tf pF nC - 36 - - 35 - - 29 - - - 14 - - 56 - - 1.4 V - 487 731 ns - 3.9 5.8 C ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 C, IS = 14 A, VGS = 0 Vb TJ = 25 C, IF = 14 A, dI/dt = 100 A/sb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. www.vishay.com 2 Document Number: 91230 S-81271-Rev. A, 16-Jun-08 IRFP450A, SiHFP450A Vishay Siliconix TYPICAL CHARACTERISTICS 25 C, unless otherwise noted Fig. 1 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91230 S-81271-Rev. A, 16-Jun-08 www.vishay.com 3 IRFP450A, SiHFP450A Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area Document Number: 91230 S-81271-Rev. A, 16-Jun-08 IRFP450A, SiHFP450A Vishay Siliconix RD VDS VGS D.U.T. RG + - VDD 10 V Pulse width 1 s Duty factor 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case VDS 15 V tp L VDS D.U.T. RG IAS 20 V tp Driver + A - VDD IAS 0.01 Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91230 S-81271-Rev. A, 16-Jun-08 Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 IRFP450A, SiHFP450A Vishay Siliconix Fig. 12c - Maximum Avalanche Energy vs. Drain Current Fig. 12d - Typical Drain-to-Source Voltage vs. Avalanche Current Current regulator Same type as D.U.T. 50 k QG 10 V 12 V 0.2 F 0.3 F QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91230 S-81271-Rev. A, 16-Jun-08 IRFP450A, SiHFP450A Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations * Low stray inductance * Ground plane * Low leakage inductance current transformer + - - RG * * * * dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test Driver gate drive P.W. + Period D= + - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage VDD Body diode forward drop Inductor current Ripple 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91230. Document Number: 91230 S-81271-Rev. A, 16-Jun-08 www.vishay.com 7 Package Information www.vishay.com Vishay Siliconix TO-247AC (High Voltage) A A 4 E B 3 R/2 E/2 7 OP O k M DBM A2 S (Datum B) OP1 A D2 Q 5 2xR (2) D1 D 1 2 4 D 3 Thermal pad 5 L1 C L A See view B 2 x b2 3xb 0.10 M C A M 5 E1 0.01 M D B M View A - A C 2x e A1 b4 Planting D DE (b1, b3, b5) Base metal E C (c) C c1 (b, b2, b4) (4) Section C - C, D - D, E - E View B MILLIMETERS DIM. MIN. MAX. A 4.58 5.31 A1 2.21 2.59 A2 1.17 2.49 b 0.99 1.40 b1 0.99 1.35 b2 1.53 2.39 b3 1.65 2.37 b4 2.42 3.43 b5 2.59 3.38 c 0.38 0.86 c1 0.38 0.76 D 19.71 20.82 D1 13.08 ECN: X12-0167-Rev. B, 24-Sep-12 DWG: 5971 INCHES MIN. MAX. 0.180 0.209 0.087 0.102 0.046 0.098 0.039 0.055 0.039 0.053 0.060 0.094 0.065 0.093 0.095 0.135 0.102 0.133 0.015 0.034 0.015 0.030 0.776 0.820 0.515 - DIM. D2 E E1 e Ok L L1 N OP O P1 Q R S MILLIMETERS MIN. MAX. 0.51 1.30 15.29 15.87 13.72 5.46 BSC 0.254 14.20 16.25 3.71 4.29 7.62 BSC 3.51 3.66 7.39 5.31 5.69 4.52 5.49 5.51 BSC INCHES MIN. MAX. 0.020 0.051 0.602 0.625 0.540 0.215 BSC 0.010 0.559 0.640 0.146 0.169 0.300 BSC 0.138 0.144 0.291 0.209 0.224 0.178 0.216 0.217 BSC Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Contour of slot optional. 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body. 4. Thermal pad contour optional with dimensions D1 and E1. 5. Lead finish uncontrolled in L1. 6. O P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154"). 7. Outline conforms to JEDEC outline TO-247 with exception of dimension c. 8. Xian and Mingxin actually photo. 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