SN74HC14-Q1
HEX SCHMITT-TRIGGER INVERTERS
SCLS532 – AUGUST 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Qualification in Accordance With
AEC-Q100
D
Qualified for Automotive Applications
D
Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
2-V to 6-V VCC Operation
D
Outputs Can Drive Up To 10 LSTTL Loads
D
Low Power Consumption, 20-µA Max ICC
Contact factory for details. Q100 qualification data available on
request.
D
Typical tpd = 11 ns
D
±4-mA Output Drive at 5 V
D
Low Input Current of 1 µA Max
description/ordering information
This Schmitt-trigger device contains six independent inverters. It performs the Boolean function
Y = A in positive logic.
ORDERING INFORMATION
TAPACKAGEORDERABLE
PART NUMBER TOP-SIDE
MARKING
–40°C to 125°C
SOIC – D Tape and reel SN74HC14QDRQ1 HC14QQ1
–40°C to 125°C
TSSOP – PW Tape and reel SN74HC14QPWRQ1 HC14QQ1
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT
AOUTPUT
Y
H L
L H
logic diagram (positive logic)
AY
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
D OR PW PACKAGE
(TOP VIEW)
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN74HC14-Q1
HEX SCHMITT-TRIGGER INVERTERS
SCLS532 – AUGUST 2003
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2):D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN NOM MAX UNIT
VCC Supply voltage 2 5 6 V
VIL Low-level input voltage VCC = 6 V 1.8 V
VIInput voltage 0 VCC V
VOOutput voltage 0 VCC V
TAOperating free-air temperature –40 125 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN74HC14-Q1
HEX SCHMITT-TRIGGER INVERTERS
SCLS532 – AUGUST 2003
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C
MIN
MAX
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN TYP MAX
MIN
MAX
UNIT
V
2 V 0.7 1.2 1.5 0.7 1.5
V
VT+
4.5 V 1.55 2.5 3.15 1.55 3.15
V
T+
6 V 2.1 3.3 4.2 2.1 4.2
V
2 V 0.3 0.6 1 0.3 1
V
VT–
4.5 V 0.9 1.6 2.45 0.9 2.45
V
T–
6 V 1.2 2 3.2 1.2 3.2
V – V
2 V 0.2 0.6 1.2 0.2 1.2
V
VT+ – VT–
4.5 V 0.4 0.9 2.1 0.4 2.1
V
T+ T–
6 V 0.5 1.3 2.5 0.5 2.5
V
V = V or V
I = –20 A
2 V 1.9 1.998 1.9
V
V
V = V or V
IOH = –20
µ
A
4.5 V 4.4 4.499 4.4
V
VOH
VI = VIH or VIL
OH
6 V 5.9 5.999 5.9
V
OH
IIH IL
IOH = –4 mA 4.5 V 3.98 4.3 3.7
IOH = –5.2 mA 6 V 5.48 5.8 5.2
V
V = V or V
I = 20 A
2 V 0.002 0.1 0.1
V
V
V = V or V
IOL = 20
µ
A
4.5 V 0.001 0.1 0.1
V
VOL
VI = VIH or VIL
OL
6 V 0.001 0.1 0.1
V
OL
IIH IL
IOL = 4 mA 4.5 V 0.17 0.26 0.4
IOL = 5.2 mA 6 V 0.15 0.26 0.4
IIVI = VCC or 0 6 V ±0.1 ±100 ±1000 nA
ICC VI = VCC or 0, IO = 0 6 V 2 40 µA
Ci2 V to 6 V 3 10 10 pF
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25°C
MIN
MAX
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN TYP MAX
MIN
MAX
UNIT
t
A
Y
2 V 55 125 190
ns
tpd
A
Y
4.5 V 12 25 38
ns
pd
6 V 11 21 32
t
Y
2 V 38 75 110
ns
tt
Y
4.5 V 8 15 22
ns
t
6 V 6 13 19
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance per inverter No load 20 pF
SN74HC14-Q1
HEX SCHMITT-TRIGGER INVERTERS
SCLS532 – AUGUST 2003
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
50%50% 10%10% 90% 90% VCC
0 V
trtf
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50%
50%50% 10%10% 90% 90%
V
CC
VOH
VOL
0 V
trtf
Input
In-Phase
Output
50%
tPLH tPHL
50% 50%
10% 10% 90%90% VOH
VOL
tr
tf
tPHL tPLH
Out-of-Phase
Output
Test
Point
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily . All input pulses are supplied by generators having the following
characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. t
PLH
and t
PHL
are the same as t
pd
.
Figure 1. Load Circuit and Voltage Waveforms
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M
0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
2016
6,60
6,40
4040064/F 01/97
0,30
6,60
6,20
80,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A MAX
A MIN
DIM PINS **
0,05
4,90
5,10
Seating Plane
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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