LT3050MPMSE-3.3#PBF - LINEAR TECHNOLOGY

LT3050 Series

3050fa

TYPICAL APPLICATION

DESCRIPTION

100mA, Linear Regulator

with Precision Current Limit

and Diagnostic Outputs

The LT

3050 series are micro-power, low noise, low

dropout voltage (LDO) linear regulators. The devices

supply 100mA of output current with a dropout voltage of

340mV. A 10nF bypass capacitor reduces output noise to

30VRMS in a 10Hz to 100kHz bandwidth and soft-starts

the reference. The LT3050’s ±45V input voltage rating

combined with its precision current limit and diagnostic

functions make the IC an ideal choice for robust, high

reliability applications.

A single resistor programs the LT3050’s current limit, accurate

to ±5% over a wide input voltage and temperature range.

A single resistor programs the LT3050’s minimum output

current monitor, useful for detecting open-circuit conditions.

The current monitor function sources a current equal to

1/100th of output current. A logic FAULT pin asserts low if

the LT3050 is in current limit, operating below its minimum

output current (open-circuit) or is in thermal shutdown.

The LT3050 optimizes stability and transient response

with low ESR ceramic capacitors, requiring a minimum of

2.2F. The LT3050 is available in ﬁ xed output voltages of

3.3V and 5V, and as an adjustable version with an output

voltage range down to the 0.6V reference.The LT3050 is

available in the thermally-enhanced 12-Lead 3mm × 2mm

DFN and MSOP packages.

5V Supply with 100mA Precision Current Limit, 10mA IMIN

FEATURES

APPLICATIONS

n Output Current Monitor: 1/100th of IOUT

n Fault Indicator: Current Limit, Minimum IOUT or

Thermal Limit

n Output Current: 100mA

n Dropout Voltage: 340mV

n Input Voltage Range: 1.6V to 45V

n Programmable Precision Current Limit: ±5%

n Programmable Minimum IOUT Monitor

n Low Noise: 30μVRMS (10Hz to 100kHz)

n Adjustable Output (VREF = VOUT(MIN) = 0.6V)

n Fixed Output Voltages: 3.3V, 5V

n Output Tolerance: ±2% Over Line, Load and Temperature

n Stable with Low ESR, Ceramic Output Capacitors

(2.2F minimum)

n Shutdown Current: <1A

n Reverse-Battery, Reverse-Output and

Reverse-Current Protection

n Thermal Limit Protection

n 12-Lead 3mm × 2mm DFN and MSOP Packages

n Protected Antenna Supplies

n Automotive Telematics

n Industrial Applications (Trucks, Forklifts, etc.)

n High Reliability Applications

External Current Limit RIMAX = 1.15k

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

1µF

12V

VIN

IMON

IMAX

IMIN

FAULT

SHDN

GND

OUT

REF/BYP

LT3050-5

2.2µF

0.1µF

10nF

(ADC FULL SCALE = 3V)

TO µP ADC

0.1µF 11.3k

(THRESHOLD = 10mA)

10nF 1.15k

(THRESHOLD = 100mA)

120k

3050 TA01 TEMPERATURE (°C)

CURRENT LIMIT FAULT THRESHOLD (mA)

105

100

101

102

103

104

3050 TA01a

–75 –50 –25 0 –25 50 75 100 125 150 175

VIN = 5.6V

VIN = 12V

VIN = 15V

VOUT = 5V

LT3050 Series

3050fa

PIN CONFIGURATION

ABSOLUTE MAXIMUM RATINGS

IN Pin Voltage ........................................................ ±50V

OUT Pin Voltage ..................................................... ±50V

Input-to-Output Differential Voltage ....................... ±50V

ADJ Pin Voltage (Note 16) ..................................... ±50V

REF/BYP Pin Voltage ........................................–0.3V, 1V

SHDN Pin Voltage ...................................................±50V

IMON Pin Voltage ..............................................–0.3V, 7V

IMIN Pin Voltage ...............................................–0.3V, 7V

IMAX Pin Voltage ...............................................–0.3V, 7V

(Note 1)

REF/BYP

IMIN

FAULT

SHDN

IMON

IMAX

GND

ADJ

OUT

TOP VIEW

MSE PACKAGE

12-LEAD PLASTIC MSOP

GND

TJMAX = 125°C, θJA = 45°C/W, θJC = 5°C/W TO 10°C/W

EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB

TOP VIEW

DDB PACKAGE

12-LEAD (3mm s 2mm) PLASTIC DFN

REF/BYP

IMIN

FAULT

SHDN

IMON

IMAX

GND

ADJ

OUT

GND

TJMAX = 125°C, θJA = 49°C/W, θJC = 13.5°C/W

EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3050EMSE#PBF LT3050EMSE#TRPBF 3050 12-Lead Plastic MSOP –40°C to 125°C

LT3050IMSE#PBF LT3050IMSE#TRPBF 3050 12-Lead Plastic MSOP –40°C to 125°C

LT3050MPMSE#PBF LT3050MPMSE#TRPBF 3050 12-Lead Plastic MSOP –55°C to 125°C

LT3050EMSE-3.3#PBF LT3050EMSE-3.3#TRPBF 305033 12-Lead Plastic MSOP –40°C to 125°C

LT3050IMSE-3.3#PBF LT3050IMSE-3.3#TRPBF 305033 12-Lead Plastic MSOP –40°C to 125°C

LT3050MPMSE-3.3#PBF LT3050MPMSE-3.3#TRPBF 305033 12-Lead Plastic MSOP –55°C to 125°C

LT3050EMSE-5#PBF LT3050EMSE-5#TRPBF 30505 12-Lead Plastic MSOP –40°C to 125°C

LT3050IMSE-5#PBF LT3050IMSE-5#TRPBF 30505 12-Lead Plastic MSOP –40°C to 125°C

LT3050MPMSE-5#PBF LT3050MPMSE-5#TRPBF 30505 12-Lead Plastic MSOP –55°C to 125°C

LT3050EDDB#PBF LT3050EDDB#TRPBF LFGC 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LT3050IDDB#PBF LT3050IDDB#TRPBF LFGC 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LT3050EDDB-3.3#PBF LT3050EDDB-3.3#TRPBF LFWR 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LT3050IDDB-3.3#PBF LT3050IDDB-3.3#TRPBF LFWR 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

FAULT Pin Voltage ..........................................–0.3V, 50V

Output Short-Circuit Duration .......................... Indeﬁ nite

Operating Junction Temperature Range (Notes 2, 3)

E, I Grades .........................................–40°C to 125°C

MP Grade ...........................................–55°C to 125°C

Storage Temperature Range ...................–65°C to 150°C

Lead Temperature: Soldering, 10 sec .................... 300°C

(MSOP Package Only)

LT3050 Series

3050fa

ELECTRICAL CHARACTERISTICS

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Input Voltage (Notes 3, 11) ILOAD = 100mA l1.6 2.2 V

Regulated Output Voltage LT3050-3.3: VIN = 3.9V, ILOAD = 1mA

3.9V < VIN < 15V, 1mA < ILOAD < 100mA (Note 15) l

3.267

3.234

3.3

3.333

3.366

LT3050-5: VIN = 5.6V, ILOAD = 1mA

5.6V < VIN 15V, 1mA < ILOAD < 100mA (Note 15) l

4.95

4.9

5.05

5.1

ADJ Pin Voltage (Notes 3, 4) VIN = 2.2V, ILOAD = 1mA

2.2V < VIN < 15V, 1mA < ILOAD < 100mA (Note 15) l

594

588

600

606

612

Line Regulation (Note 3) LT3050-3.3: ∆VIN = 3.9V to 45V, ILOAD = 1mA

LT3050-5: ∆VIN = 5.6V to 45V, ILOAD = 1mA

LT3050: ∆VIN = 2.2V to 45V, ILOAD = 1mA

2.2

3.3

0.4

16.5

Load Regulation (Note 3) LT3050-3.3: VIN = 3.9V, ILOAD = 1mA to 100mA

LT3050-5: VIN = 5.6V, ILOAD = 1mA to 100mA

LT3050: VIN = 2.2V, ILOAD = 1mA to 100mA

7.2

8.4

0.2

The l denotes the speciﬁ cations which apply over the full operating

temperature range, otherwise speciﬁ cations are at TA = 25°C. (Note 2)

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3050EDDB-5#PBF LT3050EDDB-5#TRPBF LFWS 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LT3050IDDB-5#PBF LT3050IDDB-5#TRPBF LFWS 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3050EMSE LT3050EMSE#TR 3050 12-Lead Plastic MSOP –40°C to 125°C

LT3050IMSE LT3050IMSE#TR 3050 12-Lead Plastic MSOP –40°C to 125°C

LT3050MPMSE LT3050MPMSE#TR 3050 12-Lead Plastic MSOP –55°C to 125°C

LT3050EMSE-3.3 LT3050EMSE-3.3#TR 305033 12-Lead Plastic MSOP –40°C to 125°C

LT3050IMSE-3.3 LT3050IMSE-3.3#TR 305033 12-Lead Plastic MSOP –40°C to 125°C

LT3050MPMSE-3.3 LT3050MPMSE-3.3#TR 305033 12-Lead Plastic MSOP –55°C to 125°C

LT3050EMSE-5 LT3050EMSE-5#TR 30505 12-Lead Plastic MSOP –40°C to 125°C

LT3050IMSE-5 LT3050IMSE-5#TR 30505 12-Lead Plastic MSOP –40°C to 125°C

LT3050MPMSE-5 LT3050MPMSE-5#TR 30505 12-Lead Plastic MSOP –55°C to 125°C

LT3050EDDB LT3050EDDB#TR LFGC 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LT3050IDDB LT3050IDDB#TR LFGC 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LT3050EDDB-3.3 LT3050EDDB-3.3#TR LFWR 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LT3050IDDB-3.3 LT3050IDDB-3.3#TR LFWR 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LT3050EDDB-5 LT3050EDDB-5#TR LFWS 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

LT3050IDDB-5 LT3050IDDB-5#TR LFWS 12-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C

Consult LTC Marketing for parts speciﬁ ed with wider operating temperature ranges. *The temperature grade is identiﬁ ed by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁ cations, go to: http://www.linear.com/tapeandreel/

ORDER INFORMATION

LT3050 Series

3050fa

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁ cations which apply over the full operating

temperature range, otherwise speciﬁ cations are at TA = 25°C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Dropout Voltage

VIN = VOUT(NOMINAL) (Notes 5, 6)

ILOAD = 1mA

ILOAD = 1mA l

110 150

220

ILOAD = 10mA

ILOAD = 10mA l

195 240

340

ILOAD = 50mA

ILOAD = 50mA l

280 330

450

ILOAD = 100mA

ILOAD = 100mA l

340 400

550

GND Pin Current

VIN = VOUT(NOMINAL) + 0.6V (Notes 6, 7, 11)

ILOAD = 0mA

ILOAD = 1mA

ILOAD = 10mA

ILOAD = 50mA

ILOAD = 100mA

175

0.85

2.2

160

370

5.2

µA

Quiescent Current in Shutdown VIN = 12V, VSHDN = 0V 0.17 1 µA

ADJ Pin Bias Current (Notes 3, 12) VIN = 12V l12.5 60 nA

Output Voltage Noise COUT = 10F, ILOAD = 100mA, VOUT = 600mV,

BW = 10Hz to 100kHz

90 µVRMS

Output Voltage Noise COUT = 10F, CBYP = 0.01F, ILOAD = 100mA, VOUT = 600mV

BW = 10Hz to 100kHz

30 µVRMS

Shutdown Threshold VOUT = Off to On

VOUT = On to Off

l0.3

0.7

0.6

1.5 V

SHDN Pin Current (Note 13) VSHDN = 0V

VSHDN = 45V

l0.9

µA

Ripple Rejection VIN – VOUT = 2V, VRIPPLE = 0.5VP-P,

fRIPPLE = 120Hz, ILOAD = 100mA

LT3050

LT3050-3.3

LT3050-5

FAULT Pin Logic Low Voltage VIN = 2.2V, FAULT Asserted, IFAULT = 100A l140 250 mV

FAULT Pin Leakage Current FAULT = 5V, FAULT Not Asserted 0.01 1 µA

Input Reverse Leakage Current VIN = –45V, VOUT = 0 l 300 µA

Reverse Output Current (Note 14) VOUT = 1.2V, VIN = 0 0.2 10 µA

Internal Current Limit (Note 3) VIN = 2.2V or VOUT(NOMINAL) + 0.6V, VOUT = 0V, IMAX = 0V

VIN = 2.2V or VOUT(NOMINAL) + 0.6V, ΔVOUT = –5% l110

240 mA

External Programmed Current Limit

(Notes 6, 8)

LT3050-3.3

3.9V < VIN < 13.3V, RIMAX = 2.26k

FAULT Pin Threshold (IFAULT)

3.9V < VIN < 13.3V, RIMAX = 1.5k

FAULT Pin Threshold (IFAULT)

3.9V < VIN < 13.3V, RIMAX = 1.15k

FAULT Pin Threshold (IFAULT)

LT3050, LT3050-5

5.6V < VIN < 15V, RIMAX = 2.26k

FAULT Pin Threshold (IFAULT)

5.6V < VIN < 15V, RIMAX = 1.5k

FAULT Pin Threshold (IFAULT)

5.6V < VIN < 15V, RIMAX = 1.15k

FAULT Pin Threshold (IFAULT)

48.8

73.6

47.8

72.1

94.4

51.4

77.5

101

50.4

75.9

99.3

81.4

106

52.9

79.7

104.3

LT3050 Series

3050fa

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime. Absolute maximum input-to-output differential

voltage is not achievable with all combinations of rated IN pin and OUT pin

voltages. With the IN pin at 50V, the OUT pin may not be pulled below 0V.

The total differential voltage from IN to OUT must not exceed ±50V.

Note 2: The LT3050 is tested and speciﬁ ed under pulse load conditions

such that TJ ~ TA. The LT3050E is 100% production tested at TA = 25°C.

Performance at –40°C and 125°C is assured by design, characterization

and correlation with statistical process controls. The LT3050I is

guaranteed over the full –40°C to 125°C operating junction temperature

range. The LT3050MP is 100% tested over the –55°C to 125°C operating

junction temperature range.

Note 3: The LT3050 adjustable version is tested and speciﬁ ed for these

conditions with ADJ pin connected to the OUT pin.

Note 4: Maximum junction temperature limits operating conditions.

Regulated output voltage speciﬁ cations do not apply for all possible

combinations of input voltage and output current. If operating at the

maximum input voltage, limit the output current range. If operating at the

maximum output current, limit the input voltage range.

Note 5: Dropout voltage is the minimum differential IN-to-OUT voltage

needed to maintain regulation at a speciﬁ ed output current. In dropout,

the output voltage equals (VIN - VDROPOUT). For some output voltages,

minimum input voltage requirements limit dropout voltage.

Note 6: To satisfy minimum input voltage requirements, the LT3050

adjustable version is tested and speciﬁ ed for these conditions with an

external resistor divider (60k bottom, 440k top) which sets VOUT to 5V.

The external resistor divider adds 10A of DC load on the output. This

external current is not factored into GND pin current.

Note 7: GND pin current is tested with VIN = VOUT(NOMINAL) + 0.6V and

a current source load. GND pin current increases in dropout. For the

ﬁ xed output voltage versions, an internal resistor divider adds about

10µA to GND pin current. See the GND Pin Current curves in the Typical

Performance Characteristics section.

Note 8: Current limit varies inversely with the external resistor value tied

from the IMAX pin to GND. For detailed information on how to set the

IMAX pin resistor value, please see the Operation section. If a programmed

current limit is not needed, the IMAX pin must be tied to GND and internal

protection circuitry implements short-circuit protection as speciﬁ ed.

Note 9: The IMIN fault condition asserts if the output current falls below the

IMIN threshold deﬁ ned by an external resistor from the IMIN pin to GND.

For detailed information on how to set the IMIN pin resistor value, please

see the Operation section. IMIN settings below the Minimum IMIN Accuracy

speciﬁ cation in the Electrical Characteristics section are not guaranteed

to ± 10% tolerance. If the IMIN fault condition is not needed, the IMIN pin

must be left ﬂ oating (unconnected).

Note 10: The current monitor ratio varies slightly when VIMON ≠ VOUT. For

detailed information on how to calculate the output current from the IMON

pin, please see the Operation section. If the current monitor function is not

needed, the IMON pin must be tied to GND.

Note 11: To satisfy requirements for minimum input voltage, current limit

is tested at VIN = VOUT(NOMINAL) +1V or VIN = 2.2V, whichever is greater.

Note 12: ADJ pin bias current ﬂ ows out of the ADJ pin:

Note 13: SHDN pin current ﬂ ows into the SHDN pin.

Note 14: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the speciﬁ ed voltage. This current ﬂ ows into the OUT pin

and out of the GND pin.

Note 15: 100mA of output current does not apply to the full range of input

voltage due to the internal current limit foldback.

Note 16: The ADJ pin cannot be externally driven for ﬁ xed output voltage

options. LTC allows the use of a small feedforward capacitor from OUT

to ADJ to reduce noise and improve transient response. See the Bypass

Capacitance section of the Applications Information.

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁ cations which apply over the full operating

temperature range, otherwise speciﬁ cations are at TA = 25°C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum IMIN Threshold Accuracy

(Notes 6, 9)

LT3050-3.3: 3.9V < VIN < 13.3V, RIMIN = 110K

LT3050, LT3050-5: 5.6V < VIN < 15V, RIMIN = 110K

0.92

0.9

1.03

1.13

1.1

IMIN Threshold Accuracy (Notes 6, 9) LT3050-3.3: 3.9V < VIN < 13.3V, RIMIN = 11.3K

LT3050, LT3050-5: 5.6V < VIN < 15V, RIMIN = 11.3K

9.2

10.3

11.3

Current Monitor Ratio (Notes 6, 10)

Ratio = IOUT/IMON

ILOAD = 5mA, 25mA, 50mA, 75mA, 100mA

LT3050-3.3: VIMON = VOUT

, 3.9V < VIN < 13.3V

LT3050, LT3050-5: VIMON = VOUT

, 5.6V < VIN < 15V

100

105

LT3050 Series

3050fa

TYPICAL PERFORMANCE CHARACTERISTICS

Adjustable Quiescent Current ADJ Pin Voltage

Quiescent Current

Typical Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage

TJ = 25°C, unless otherwise noted.

OUTPUT CURRENT (mA)

DROPOUT VOLTAGE (mV)

600

300

350

400

450

550

500

250

3050 G01

100

150

200

0 10 20 30 40 50 60 70 80 90 100

TJ ≤ 125°C

TJ ≤ 25°C

OUTPUT CURRENT (mA)

DROPOUT VOLTAGE (mV)

600

300

350

400

450

550

500

250

3050 G02

100

150

200

0 10 20 30 40 50 60 70 80 90 100

TJ = 125°C

=TEST POINTS

TJ = 25°C

TEMPERATURE (°C)

–75

DROPOUT VOLTAGE (mV)

450

500

550

400

350

300

250

200

150

100

600

–50 75 100 125 150 175–25 0 25

3050 G03

IL = 100mA

IL = 50mA

IL = 10mA

IL = 1mA

TEMPERATURE (°C)

–75

QUIESCENT CURRENT (µA)

–50 75 100 125 150 175–25 0 25

3050 G04

VIN = VSHDN = 12V

VOUT = 5V

IL = 5µA

VIN = 12V

ALL OTHER PINS = 0V

VIN (V)

QUIESCENT CURRENT (µA)

100

3050 G06

0 5 10 15 20 25 30 35 40 45

LT3050-5

LT3050-3.3

VSHDN = 0V, RL = 0

TJ = 25°C

ILOAD = 10µA

TEMPERATURE (°C)

–75

588

ADJ PIN VOLTAGE (mV)

606

608

610

604

602

600

598

596

594

592

590

612

–50 75 100 125 150 175–25 0 25

3050 G05

ILOAD = 1mA

INPUT VOLTAGE (V)

GND PIN CURRENT (mA)

2.50

1.50

1.75

2.00

2.25

1.25

3050 G07a

0.25

0.50

0.75

1.00

0123456789101112

RL = 33, IL = 100mA

RL = 66, IL = 50mA

RL = 330, IL = 10mA

RL = 3.3k, IL = 1mA

GND Pin Current LT3050-3.3

TEMPERATURE (°C)

–75

3.234

OUTPUT VOLTAGE (V)

3.333

3.344

3.355

3.322

3.311

3.300

3.289

3.278

3.267

3.256

3.245

3.366

–50 75 100 125 150 175–25 0 25

3050 G05a

ILOAD = 1mA

Output Voltage LT3050-3.3

TEMPERATURE (°C)

–75

4.900

OUTPUT VOLTAGE (V)

5.100

5.075

5.050

5.025

5.000

4.975

4.950

4.925

–50 75 100 125 150 175–25 0 25

3050 G05b

ILOAD = 1mA

Output Voltage LT3050-5

LT3050 Series

3050fa

GND Pin Current LT3050-5 GND Pin Current vs ILOAD SHDN Pin Threshold

INPUT VOLTAGE (V)

GND PIN CURRENT (mA)

2.50

1.50

1.75

2.00

2.25

1.25

3050 G07

0.25

0.50

0.75

1.00

0123456789101112

RL = 50, IL = 100mA

RL = 100, IL = 50mA

RL = 500, IL = 10mA

RL = 5k, IL = 1mA

ILOAD (mA)

GND PIN CURRENT (mA)

5.0

2.0

2.5

3.0

3.5

4.5

4.0

1.5

3050 G08

0.5

1.0

0102030405060708090100

VIN = 5.6V

VOUT = 5V

TEMPERATURE (°C)

SHDN PIN THRESHOLD (V)

1.5

0.4

0.5

0.6

0.7

0.9

1.0

1.1

1.2

1.3

1.4

0.8

0.3

3050 G09

0.1

0.2

–75 –50 0–25 25 50 75 100 125 150 175

IL = 1mA

OFF TO ON

ON TO OFF

Internal Current Limit Internal Current Limit

Internal Current Limit

vs Output Voltage

SHDN Pin Input Current SHDN Pin Input Current ADJ Pin Bias Current

TYPICAL PERFORMANCE CHARACTERISTICS

TJ = 25°C, unless otherwise noted.

TEMPERATURE (°C)

SHDN PIN INPUT CURRENT (µA)

3.0

1.0

2.0

2.5

1.5

0.5

3050 G10

–75 –50 –25 0 25 50 75 100 125 150 175

VSHDN = 45V

SHDN PIN VOLTAGE (V)

SHDN PIN INPUT CURRENT (µA)

2.0

0.6

1.2

1.4

1.6

1.8

0.8

1.0

0.2

0.4

3050 G11

00 1020304050

TEMPERATURE (°C)

ADJ PIN BIAS CURRENT (nA)

3050 G12

–75 –50 –25 0 25 50 75 100 125 150 175

TEMPERATURE (°C)

CURRENT LIMIT (mA)

350

100

200

250

300

150

3050 G13

–75 –50 –25 0 25 50 75 100 125 150 175

VIN = 12V

VOUT = 0V

INPUT/OUTPUT DIFFERENTIAL (V)

CURRENT LIMIT (mA)

250

100

125

150

175

200

225

3050 G14

00 5 10 15 20 25 30 35 40 45

TJ = –55°C

TJ = –40°C

TJ = 25°C

TJ = 125°C

CURRENT LIMIT

AT FAULT

THRESHOLD

OUTPUT VOLTAGE (V)

CURRENT LIMIT (mA)

225

100

125

150

175

200

3050 G15

00 5 10 15 20 25 30 35 40 45

TJ = –55°C

TJ = –40°C

TJ = 25°C

TJ = 125°C

VIN – VOUT(NOMINAL) = 1V

CURRENT LIMIT

AT FAULT

THRESHOLD

LT3050 Series

3050fa

Input Ripple Rejection Minimum Input Voltage

Load Regulation

TYPICAL PERFORMANCE CHARACTERISTICS

TJ = 25°C, unless otherwise noted.

FREQUENCY (Hz)

INPUT RIPPLE REJECTION (dB)

3050 G19

10 100 1K 10K 100K 1M 10M

IL = 100mA

CREF/BYP = 100pF

VOUT = 5V

VIN = 5.8V + 50mVRMS RIPPLE

COUT = 2.2µF

COUT = 10µF

TEMPERATURE (°C)

MINIMUM INPUT VOLTAGE (V)

2.2

1.2

1.4

1.6

1.8

2.0

1.0

3050 G20

0.2

0.4

0.6

0.8

–75 –50 –25 0 25 50 75 100 125 150 175

IL =100mA

TEMPERATURE (°C)

LOAD REGULATION (mV)

3050 G21

–4

–2

–1

–3

–75 –50 0 25–25 50 75 100 125 150 175

∆IL = 1mA TO 100mA

VOUT = 0.6V

VIN = 2.2V

TEMPERATURE (°C)

RIPPLE REJECTION (dB)

100

3050 G19a

–75 –50 –25 0 25 50 75 100 125 150 175

IL = 100mA

VOUT = 5V

VIN = 5.8V + 0.5VP-P RIPPLE AT f = 120Hz

COUT = 10µF

CREF/BYP = 10nF

Ripple Rejection vs Temperature

Reverse Output Current Reverse Output Current Input Ripple Rejection

VOUT (V)

IOUT (µA)

1.0

0.3

0.6

0.7

0.8

0.9

0.4

0.5

0.1

0.2

3050 G16

00 1020304050

ALL PINS GROUNDED EXCEPT FOR OUT

FREQUENCY (Hz)

RIPPLE REJECTION (dB)

3050 G18

10 100 1K 10K 100K 1M 10M

IL = 100mA

COUT = 10µF

VOUT = 5V

VIN = 5.8V + 50mVRMS RIPPLE

CREF/BYP = 0

CREF/BYP = 100pF

CREF/BYP = 10nF

TEMPERATURE (°C)

CURRENT(µA)

3050 G17

–75 –50 –25 0 25 50 75 100 125 150 175

VOUT = VADJ = 1.2V

VIN = 0

IADJ

IOUT

TEMPERATURE (°C)

LOAD REGULATION (mV)

–9

–6

–3

–0

–18

–15

–12

–21

3050 G21a

–33

–27

–24

–30

–75 –50 0 25–25 50 75 100 125 150 175

∆IL = 1mA TO 100mA

VOUT = 3.3V

VIN = 3.9V

TEMPERATURE (°C)

LOAD REGULATION (mV)

–10

–5

–0

–25

–20

–15

–30

3050 G21b

–50

–40

–35

–45

–75 –50 0 25–25 50 75 100 125 150 175

∆IL = 1mA TO 100mA

VOUT = 5V

VIN = 5.6V

Load Regulation Load Regulation

LT3050 Series

3050fa

Output Noise Spectral Density

CREF/BYP = 0, CFF = 0

Output Noise Spectral Density

vs CREF/BYP

, CFF = 0

RMS Output Noise vs Load

Current vs CREF/BYP

RMS Output Noise vs Load

Current CREF/BYP = 10nF

LOAD CURRENT (mA)

0.01

OUTPUT NOISE VOLTAGE (µVRMS)

110

100

101 100

3050 G24

0.1

VOUT = 0.6V

COUT = 10µF CREF/BYP = 0

CREF/BYP = 10pF

CREF/BYP = 100pF

CREF/BYP = 1nF

CREF/BYP = 10nF

CREF/BYP = 100nF

LOAD CURRENT (mA)

0.01

OUTPUT NOISE VOLTAGE (µVRMS)

170

120

130

140

150

160

110

100

101 100

3050 G25

0.1

VOUT = 5V

VOUT = 3.3V

VOUT = 1.2V

VOUT = 2.5V

VOUT = 1.8V

VOUT = 1.5V

VOUT = 0.6V

fOUT = 10Hz TO 100kHz

COUT = 10µF

FREQUENCY (Hz)

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

3050 G22

0.01

0.1

10 100 1K 10K 100k

IL = 100mA

COUT = 10µF

VOUT = 1.5V

VOUT = 1.2V

VOUT = 0.6V

VOUT = 1.8V

VOUT = 2.5V

VOUT = 3.3V

VOUT = 5V

FREQUENCY (Hz)

0.01

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

0.1

10k1k 100k

3050 G23

100

VOUT = 5V

CREF/BYP = 10nF

CREF/BYP = 1nF

VOUT = 0.6V

COUT = 10µF

IL = 100mA

CREF/BYP = 100pF

Startup Time

vs REF/BYP Capacitor

REF/BYP CAPACITOR (nF)

STARTUP TIME (ms)

3050 G33

0 102030405060708090100

TYPICAL PERFORMANCE CHARACTERISTICS

TJ = 25°C, unless otherwise noted.

5V 10Hz to 100kHz Output Noise

CREF/BYP = 10nF, CFF = 0

1ms/DIVCOUT = 10µF

ILOAD = 100mA

VOUT

100µV/DIV

3050 G27 1ms/DIVCOUT = 10µF

ILOAD = 100mA

VOUT

100µV/DIV

3050 G26

Output Noise Spectral Density

vs CFF, CREF/BYP = 10nF

RMS Output Noise

vs Feedforward Capacitor (CFF)

FREQUENCY (Hz)

0.01

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

0.1

10k1k 100k

3050 G23a

100

CFF = 0

CFF = 100pF

CFF = 10nF

VOUT = 5V

COUT = 10µF

IL = 100mA

CFF = 1nF

FEEDFORWARD CAPACITOR, CFF (F)

10p

OUTPUT NOISE VOLTAGE (µVRMS)

120

100

110

1n 10n

3050 G25a

100p

f = 10Hz TO 100kHz

CREF/BYP = 10nF

COUT = 10µF

IFB-DIVIDER = 5µA

IL = 100mA

VOUT = 0.6V

VOUT = 5V

VOUT = 1.8V

VOUT = 1.5V

VOUT = 1.2V

VOUT = 2.5V

VOUT = 3.3V

5V 10Hz to 100kHz Output Noise

CREF/BYP = 10nF, CFF = 10nF

LT3050 Series

3050fa

TYPICAL PERFORMANCE CHARACTERISTICS

TJ = 25°C, unless otherwise noted.

SHDN Transient Response

CREF/BYP = 10nF

External Current Limit

RIMAX = 2.26k

Transient Response (Load Dump)

SHDN Transient Response

CREF/BYP =0

OUT

5V/DIV

IL=100mA

REF/BYP

500mV/DIV

SHDN

1V/DIV

2ms/DIV 3050 G30

OUT

5V/DIV

IL = 100mA

REF/BYP

500mV/DIV

SHDN

1V/DIV

2ms/DIV 3050 G31

TEMPERATURE (°C)

CURRENT LIMIT FAULT THRESHOLD (mA)

52.8

50.3

50.8

51.3

51.8

52.3

49.3

49.8

3050 G34

47.8

48.3

48.8

–75 –50 0 25–25 50 75 100 125 150 175

VOUT = 5V

VIN = 5.6V

VIN = 12V

VIN = 15V

3050 G29

VOUT

20mV/DIV

VIN

10V/DIV

1ms/DIV

45V

12V

VOUT = 5V

IOUT = 50mA

COUT = 2.2µF

VOUT = 5V

50mV/DIV

IOUT

50mA/DIV

100µs/DIV 3050 G28a

VIN = 6V

COUT = CIN = 10µF

IFB-DIVIDER = 10µA

VOUT = 5V

20mV/DIV

IOUT

50mA/DIV

100µs/DIV 3050 G28b

VIN = 6V

COUT = CIN = 10µF

IFB-DIVIDER = 10µA

5V Transient Response

CFF = 0, IOUT = 10mA to 100mA

5V Transient Response

CFF = 10nF, IOUT = 10mA to 100mA

TEMPERATURE (°C)

CURRENT LIMIT FAULT THRESHOLD (mA)

52.0

52.4

52.8

53.2

53.6

54.0

50.8

51.2

51.6

50.4

3050 G34a

48.8

49.6

50.0

49.2

–75 –50 0 25–25 50 75 100 125 150 175

VOUT = 3.3V

VIN = 13.3V

VIN = 3.9V

TEMPERATURE (°C)

CURRENT LIMIT FAULT THRESHOLD (mA)

79.60

80.35

81.10

77.35

78.10

78.85

76.60

3050 G35a

73.60

75.10

75.85

74.35

–75 –50 0 25–25 50 75 100 125 150 175

VOUT = 3.3V

VIN = 13.3V

VIN = 3.9V

TEMPERATURE (°C)

CURRENT LIMIT FAULT THRESHOLD (mA)

104

105

106

101

102

103

100

3050 G36a

–75 –50 0 25–25 50 75 100 125 150 175

VOUT = 3.3V

VIN = 13.3V

VIN = 3.9V

External Current Limit

RIMAX = 2.26k

External Current Limit

RIMAX = 1.5k

External Current Limit

RIMAX = 1.15k

LT3050 Series

3050fa

Minimum Output Current

Threshold RIMIN = 11.3k

Minimum Output Current

Threshold RIMIN = 110k

TYPICAL PERFORMANCE CHARACTERISTICS

TJ = 25°C, unless otherwise noted.

TEMPERATURE (°C)

MINIMUM OUTPUT CURRENT THRESHOLD (mA)

11.00

10.25

10.50

10.75

9.75

10.00

3050 G38

9.00

9.25

9.50

–75 –50 –25 0 25 50 75 100 125 150 175

VOUT = 5V

VIN = 5.6V

VIN = 12V

VIN = 15V

TEMPERATURE (°C)

MINIMUM OUTPUT CURRENT THRESHOLD (mA)

1.100

1.025

1.050

1.075

0.975

1.000

3050 G37

0.900

0.925

0.950

–75 –50 –25 0 25 50 75 100 125 150 175

VOUT = 5V

VIN = 15V

VIN = 12V

VIN = 5.6V

External Current Limit

RIMAX = 1.5k

External Current Limit

RIMAX = 1.15k

TEMPERATURE (°C)

CURRENT LIMIT FAULT THRESHOLD (mA)

79.50

75.75

76.50

77.25

78.00

78.75

74.25

75.00

3050 G35

72.00

72.75

73.50

–75 –50 –25 0 25 50 75 100 125 150 175

VOUT = 5V

VIN = 5.6V

VIN = 12V

VIN = 15V

TEMPERATURE (°C)

CURRENT LIMIT FAULT THRESHOLD (mA)

105

100

101

102

103

104

3050 G36

–75 –50 –25 0 –25 50 75 100 125 150 175

VIN = 5.6V

VIN = 12V

VIN = 15V

VOUT = 5V

TEMPERATURE (°C)

MINIMUM OUTPUT CURRENT THRESHOLD (mA)

10.7

11.0

11.3

10.4

3050 G38a

9.2

9.8

10.1

9.5

–75 –50 0 25–25 50 75 100 125 150 175

VOUT = 3.3V

VIN = 13.3V

VIN = 3.9V

TEMPERATURE (°C)

MINIMUM OUTPUT CURRENT THRESHOLD (mA)

1.07

1.10

1.13

1.04

3050 G37a

0.92

0.98

1.01

0.95

–75 –50 0 25–25 50 75 100 125 150 175

VOUT = 3.3V

VIN = 13.3V

VIN = 3.9V

IOUT (mA)

IOUT/IMON CURRENT RATIO

102

100

101

3050 G39a

103

0 25 50 75 100 125

VIMON = 3.3V

VIMON = 2V

VIMON = 1V

VIMON = 0V

IOUT (mA)

IOUT/IMON CURRENT RATIO

102

100

101

3050 G40a

0 25 50 75 100 125

VIMON = 3.3V

VIMON = 2V

VIMON = 1V

VIMON = 0V

IOUT (mA)

IOUT/IMON CURRENT RATIO

102

100

101

3050 G41a

0 25 50 75 100 125

125°C

25°C

–55°C

VIMON = 3.3V

VIMON = 0V

Minimum Output Current

Threshold RIMIN = 11.3k

Minimum Output Current

Threshold RIMIN = 110k

IOUT/IMON Current Ratio

VOUT = 3.3V, VIN = 12V

IOUT/IMON Current Ratio

VOUT = 3.3V, VIN = 3.9V

IOUT/IMON Current Ratio

VOUT = 3.3V, VIN = 3.9V

LT3050 Series

3050fa

TYPICAL PERFORMANCE CHARACTERISTICS

TJ = 25°C, unless otherwise noted.

IOUT/IMON Current Ratio

VOUT = 5V, VIN = 5.6V

IOUT/IMON Current Ratio

VOUT = 5V, VIN = 12V

IOUT (mA)

IOUT/IMON CURRENT RATIO

102

100

101

3050 G39

0 25 50 75 100 125

VIMON = 1V

VIMON = 0V

VIMON = 2V

VIMON = 3V

VIMON = 4V

VIMON = 5V

IOUT (mA)

IOUT/IMON CURRENT RATIO

102

100

101

3050 G40

0 25 50 75 100 125

VIMON = 1V

VIMON = 0V

VIMON = 2V

VIMON = 3V

VIMON = 5V

VIMON = 4V

IOUT/IMON Current Ratio

VOUT = 5, VIN = 5.6V

IOUT (mA)

IOUT/IMON CURRENT RATIO

102

100

3050 G41

0 25 50 75 100 125

125°C

25°C

–55°C

VIMON = 5V

VIMON = 0V

IOUT (mA)

IOUT/IMON CURRENT RATIO

103

100

101

102

3050 G42

0 25 50 75 100 125

125°C

25°C

–55°C

VIMON = 5V

VIMON = 0V

IOUT (mA)

%ERROR OF CALCULATION

–2

–1

3050 G43

–5

–4

–3

0 25 50 75 100 125

IOUT = IMONR • •

VIMON

RIMON

70 + VIN – VOUT

VIN=5.6V, RIMON=1k

VIN=5.6V, RIMON=2k

VIN=5.6V, RIMON=3k

VIN=12V, RIMON=1k

VIN=12V, RIMON=2k

VIN=12V, RIMON=3k

(SEE OPERATION SECTION FOR DETAILS)

IOUT/IMON Current Ratio

VOUT = 5V, VIN = 12V

IOUT Calculated From IMON

VOUT = 5V

IOUT (mA)

IOUT/IMON CURRENT RATIO

102

100

101

3050 G42a

103

0 25 50 75 100 125

125°C

25°C

–55°C

VIMON = 3.3V

VIMON = 0V

IOUT/IMON Current Ratio

VOUT = 3.3V, VIN = 12V

LT3050 Series

3050fa

PIN FUNCTIONS

REF/BYP (Pin 1): Bypass/Soft-Start. Connecting a single

capacitor from this pin to GND bypasses the LT3050’s

reference noise and soft-starts the reference. A 10nF by-

pass capacitor typically reduces output voltage noise to

30VRMS in a 10Hz to 100kHz bandwidth. Soft-start time

is directly proportional to the REF/BYP capacitor value.

If the LT3050 is placed in shutdown, REF/BYP is actively

pulled low by an internal device to reset soft-start. If low

noise or soft-start performance is not required, this pin

must be left ﬂ oating (unconnected). Do not drive this pin

with any active circuitry. Because the REF/BYP pin is the

reference input to the error ampliﬁ er, stray capacitance at

this point should be minimized. Special attention should

be given to any stray capacitances that can couple external

signals onto the REF/BYP pin producing undesirable output

transients or ripple. A minimum REF/BYP capacitance of

100pF is recommended.

IMIN (Pin 2): Minimum Output Current Programming

Pin. This pin is the collector of a PNP current mirror that

outputs 1/200th of the power PNP load current. This pin

is also the input to the minimum output current fault com-

parator. Connecting a resistor between IMIN and GND sets

the minimum output current fault threshold. For detailed

information on how to set the IMIN pin resistor value,

please see the Operation section.

A small external decoupling capacitor (10nF minimum)

is required to improve IMIN PSRR. If minimum output

current programming is not required, the IMIN pin must

be left ﬂ oating (unconnected).

FAULT (Pin 3): Fault Pin. This is an open collector logic

pin which asserts during current limit, thermal limit or

a minimum current fault condition. The maximum low

logic output level is deﬁ ned for sinking 100A of current.

Off state logic may be as high as 45V without damaging

internal circuitry regardless of the VIN used.

SHDN (Pin 4): Shutdown. Pulling the SHDN pin low puts

the LT3050 into a low power state and turns the output

off. Drive the SHDN pin with either logic or an open collec-

tor/drain with a pull-up resistor. The resistor supplies the

pull-up current to the open collector/drain logic, normally

several microamperes, and the SHDN pin current, typi-

cally less than 2A. If unused, connect the SHDN pin to

IN. The LT3050 does not function if the SHDN pin is not

connected. The SHDN pin cannot be driven below GND

unless tied to the IN pin. If the SHDN pin is driven below

GND while IN is powered, the output may turn on. SHDN

pin logic cannot be referenced to a negative rail.

IN (Pin 5,6): Input. These pins supply power to the device.

The LT3050 requires a local IN bypass capacitor if it is

located more than six inches from the main input ﬁ lter

capacitor. In general, battery output impedance rises

with frequency, so adding a bypass capacitor in battery

powered circuits is advisable. A minimum input of 1µF

generally sufﬁ ces.

OUT (Pin 7,8): Output. These pins supply power to the

load. Stability requirements demand a minimum 2.2F

ceramic output capacitor to prevent oscillations. Large

load transient applications require larger output capaci-

tors to limit peak voltage transients. See the Applications

Information section for details on transient response and

reverse output characteristics. Permissible output voltage

range for the adjustable voltage version is 600mV to 44.5V.

The top of the resistor divider setting output voltage in

the ﬁ xed 3.3V and 5V versions connects directly to OUT

on the IC.

ADJ (Pin 9): Adjust. This pin is the error ampliﬁ er’s inverting

terminal. Its typical bias of 16nA current ﬂ ows out of the

pin (see curve of ADJ Pin Bias Current vs. Temperature

in the Typical Performance Characteristics section). The

typical ADJ pin voltage is 600mV referenced to GND.

GND (PIN 10, Exposed Pad Pin 13): Ground. The exposed

pad of the DFN and MSOP packages is an electrical con-

nection to GND. To ensure proper electrical and thermal

performance, solder Pin 13 to the PCB ground and tie

directly to Pin 10. Connect the bottom of the output volt-

age setting resistor divider directly to GND (Pin 10) for

optimum load regulation performance.

IMAX (Pin 11): Precision Current Limit Programming

Pin. This pin is the collector of a current mirror PNP that

is 1/200th the size of the output power PNP. This pin is

also the input to the current limit ampliﬁ er. Current limit

threshold is set by connecting a resistor between the IMAX

pin and GND.

LT3050 Series

3050fa

For detailed information on how to set the IMAX pin resistor

value, please see the Operation section.

The IMAX pin requires a 10nF decoupling capacitor to

ground. If not used, tie IMAX to GND.

IMON (Pin 12): Output Current Monitor. This pin is the

collector of a PNP current mirror that outputs 1/100th

PIN FUNCTIONS

of the power PNP current. When OUT = IMON, the pin

current exactly equals 1/100th that of the output current.

For detailed information on how to calculate the output

current from the IMON pin, please see the Operation section.

The IMON pin requires a small (22nF minimum) external

decoupling capacitor. If the IMON pin is not used, it must

be tied to GND.

BLOCK DIAGRAM

–

5, 6

QIMIN

1/200

QIMON

1/100

QIMAX

1/200 QPOWER

IMAX

IMIN

FAULT

IMON

QFAULT

GND

10, 13

REF/BYP

SHDN

ADJ

30k

OUT

IDEAL

DIODE

ERROR

AMPLIFIER

THERMAL/

CURRENT LIMITS

CURRENT

LIMIT

AMPLIFIER 100k

IMIN

COMPARATOR

100k

600mV

REFERENCE

3050 BD01

OUT

7, 8

–

FIXED VOUT R1 R2

3.3V 60k 270k

5V 60k 440k

LT3050 Series

3050fa

OPERATION

IMON Pin Operation (Current Monitor)

The IMON pin is the collector of a PNP which mirrors the

LT3050 output PNP at a ratio of 1:100 (see block diagram

on page 11). The current sourced by the IMON pin is

~1/100th of the current sourced by the OUT pin when the

IMON and OUT pin voltages are equal and the device is not

operating in dropout. If the IMON and OUT pin voltages

are not the same, the ratio deviates from 1/100 due to

the Early voltages of the IMON and OUT PNPs according

to the equation:

IIMON

IOUT

1

IMONR

v70 VIN VIMON

70 VIN VOUT

¦´

Early Voltage Compensation

124443444

where the Early voltage of the PNPs is 70V and IMONR is

a variable which represents the IOUT to IMON current ratio.

IMONR varies with VIN to VOUT voltage according to the

empirically derived equation:

MONR = 97 + 5 • log10 (1+VIN – VOUT) for (VIN – VOUT)

≥0.5

MONR = 96 + 2 • (VIN – VOUT) for (VIN – VOUT) < 0.5

The IMON pin current can be converted into a voltage for

use by monitoring circuitry simply by connecting the IMON

pin to a resistor.

Connecting a resistor from IMON to GND converts the

IMON pin current into a voltage that can be monitored by

circuitry such as an ADC.

For example, a 1.2k resistor results in a IMON pin voltage

of 1.2V for an output current of 100mA and an output

voltage of 1.2V.

The output current of the device can be calculated from

the IMON pin voltage by the following equation:

IOUT IMONR

IOUT

IMON

Ratio

{

vVIMON

RIMON

IIMON

123

v70 VIN VOUT

70 VIN VIMON

¦´

Early VoltageCompensation

124443444

A small decoupling capacitor (22nF minimum) from IMON

to GND is required to improve IMON pin power supply

rejection. If the current monitor is not needed, it must be

tied to GND.

Open Circuit Detection (IMIN Pin)

The IMIN pin is the collector of a PNP which mirrors the

LT3050 output at a ratio of approximately 1:200 (see block

diagram on page 11). The IMIN fault comparator asserts

the FAULT pin if the IMIN pin voltage is below 0.6V. This

low output current fault threshold voltage (IOPEN) is set

by attaching a resistor from IMIN to GND.

RIV

IMIN OPEN OUT

OPEN

=119 85 1 68 36 8.–(.–.• )•

This equation is empirically derived and partially

compensates for early voltage effects in the IMIN current

mirror. It is valid for an input voltage range from 0.6V

above the output to 10V above the output. It is valid for

output voltages up to 12V. The accuracy of this equation

for setting the resistor value is approximately ±2%. Unit

values are Amps, Volts, and Ohms.

If the open circuit detection function is not needed, the IMIN

pin must be left ﬂ oating (unconnected). A small decoupling

capacitor (10nF minimum) from IMIN to GND is required

to improve IMIN pin power supply rejection and to prevent

FAULT pin glitches.

See the Typical Performance Characteristics section for

additional information.

LT3050 Series

3050fa

External Programmable Current Limit (IMAX Pin)

The IMAX pin is the collector of a PNP which mirrors the

LT3050 output at a ratio of approximately 1:200 (see Block

Diagram). The IMAX pin is also the input to the precision

current limit ampliﬁ er. If the output load increases to the

point where it causes the IMAX pin voltage to reach 0.6V,

the current limit ampliﬁ er takes control of output regula-

tion so that the IMAX pin clamps at 0.6V, regardless of the

output voltage. The current limit threshold (ILIMIT) is set

by attaching a resistor (RIMAX) from IMAX to GND:

R119.22 0.894 V

IMAX OUT

LIMIT

=−•

This equation is empirically derived and partially compen-

sates for early voltage effects in the IMAX current mirror.

It is valid for an input voltage range from 0.6V above the

output to 10V above the output. It is valid for output volt-

ages up to 12V. The accuracy of this equation for setting

the resistor value is approximately ±1%. Unit values are

Amps, Volts, and Ohms.

In cases where the IN to OUT voltage exceeds 10V, fold-

back current limit will lower the internal current level limit,

possibly causing it to preempt the external programmable

current limit. See the Internal Current Limit vs VIN – VOUT

graph in the Typical Performance Characteristics section.

If the external programmable current limit is not needed,

the IMAX pin must be connected to GND. The IMAX pin

requires a 10nF decoupling capacitor.

OPERATION

See the Typical Performance Characteristics section for

additional information.

FAULT Pin Operation

The FAULT pin is an open collector logic pin which asserts

during internal current limit, precision current limit, ther-

mal limit, or a minimum current fault. There is no internal

pull-up on the FAULT pin; an external pull-up resistor is

required. The FAULT pin provides drive for up to 100A

of pull-down current. Off state logic may be as high as

45V, regardless of the input voltage used. When asserted,

the FAULT pin drive circuitry adds 50A (nominal) of GND

pin current.

Depending on the IMIN capacitance, BYP capacitance,

and OUT capacitance, the FAULT pin may assert during

startup. Consideration should be given to masking the

FAULT signal during startup. The FAULT pin circuitry is

inactive (not asserted) during shutdown and when the

OUT pin is pulled above the IN pin.

Operation in Dropout

The LT3050 contains circuitry which prevents the PNP

output power device from saturating in dropout. This also

keeps the IMON, IMIN, and IMAX current mirrors functioning

accurately, even in dropout. However, this anti-saturation

circuitry becomes less active at lower output currents, so

there is some degradation of current mirror function for

output currents less than 10mA.

LT3050 Series

3050fa

The LT3050 is a micropower, low noise and low dropout

voltage, 100mA linear regulator with micropower shutdown,

programmable current limit, and diagnostic functions. The

device supplies up to 100mA at a typical dropout voltage

of 340mV and operates over a 2.2V to 45V input range.

A single external capacitor can provide low noise reference

performance and output soft-start functionality. For

example, connecting a 10nF capacitor from the REF/BYP pin

to GND lowers output noise to 30VRMS over a 10Hz to

100kHz bandwidth. This capacitor also soft-starts the

reference and prevents output voltage overshoot at turn-on.

The LT3050’s quiescent current is merely 45A but

provides fast transient response with a minimum low ESR

2.2F ceramic output capacitor. In shutdown, quiescent

current is less than 1A and the reference soft-start

capacitor is reset.

The LT3050 optimizes stability and transient response

with low ESR, ceramic output capacitors. The regulator

does not require the addition of ESR as is common with

other regulators. The LT3050 typically provides 0.1% line

regulation and 0.1% load regulation. Internal protection

circuitry includes reverse-battery protection, reverse-

output protection, reverse-current protection, current limit

with fold-back and thermal shutdown.

This “bullet-proof” protection set makes it ideal for use in

battery-powered, automotive and industrial systems.

In battery backup applications where the output is held

up by a backup battery and the input is pulled to ground,

the LT3050 acts like it has a diode in series with its output

and prevents reverse current ﬂ ow.

Adjustable Operation

The adjustable LT3050 has an output voltage range of

0.6V to 44.5V. The output voltage is set by the ratio of

two external resistors, as shown in Figure 1. The device

servos the output to maintain the ADJ pin voltage at 0.6V

APPLICATIONS INFORMATION

Figure 1. Adjustable Operation

referenced to ground. The current in R1 is then equal to

0.6V/R1, and the current in R2 is the current in R1 minus

the ADJ pin bias current.

VIN

VOUT

IN OUT

LT3050

SHDN ADJ

GND

3050 F01

VOUT =0.6V 1+R2

R1 –I

ADJ

()

•R2

VADJ =0.6V

IADJ =16nA at 25°C

OUTPUT RANGE =0.6V to 44.5V

The ADJ pin bias current, 16nA at 25°C, ﬂ ows from the

ADJ pin through R1 to GND. Calculate the output voltage

using the formula in Figure 1. The value of R1 should be

no greater than 124k to provide a minimum 5A load

current so that output voltage errors, caused by the ADJ

pin bias current, are minimized. Note that in shutdown,

the output is turned off and the divider current is zero.

Curves of ADJ Pin Voltage vs Temperature and ADJ Pin Bias

Current vs Temperature appear in the Typical Performance

Characteristics Section.

The LT3050 is tested and speciﬁ ed with the ADJ pin tied

to the OUT pin, yielding VOUT = 0.6V. Speciﬁ cations for

output voltages greater than 0.6V are proportional to the

ratio of the desired output voltage to 0.6V: VOUT/0.6V. For

example, load regulation for an output current change

of 1mA to 100mA is –0.2mV (typical) at VOUT = 0.6V.

at VOUT = 12V, load regulation is:

06 02 4

VmV mV

.–. –•

()

LT3050 Series

3050fa

Table 1 shows 1% resistor divider values for some common

output voltages with a resistor divider current of 5µA.

Table 1. Output Voltage Resistor Divider Valves

VOUT (V) R1 (kΩ) R2 (kΩ)

1.2 118 118

1.5 121 182

1.8 124 249

2.5 115 365

3124499

3.3 124 562

5115845

Bypass Capacitance, Output Voltage Noise and

Transient Response

The LT3050 regulator provides low output voltage noise

over the 10Hz to 100kHz bandwidth while operating at

full load with the addition of a reference bypass capacitor

(CREF/BYP) from the REF/BYP pin to GND. A good quality,

low leakage capacitor is recommended. This capacitor will

bypass the internal reference of the regulator, providing a

low frequency noise pole. With the use of 10nF for CREF/BYP,

the output voltage noise decreases to as low as 30µVRMS

when the output voltage is set for 0.6V. For higher output

voltages (generated by using a feedback resistor divider),

the output voltage noise gains up accordingly when using

CREF/BYP by itself.

To lower the output voltage noise for higher output voltages,

include a feedforward capacitor (CFF) from VOUT to the

ADJ pin. A good quality, low leakage capacitor is recom-

mended. This capacitor will bypass the error ampliﬁ er of

the regulator, providing a low frequency noise pole. With

the use of 10nF for both CFF and CREF/BYP, output voltage

noise decreases to 30µVRMS when the output voltage is

set to 5V by a 5µA feedback resistor divider. If the current

in the feedback resistor divider is doubled, CFF must also

be doubled to achieve equivalent noise performance.

Higher values of output voltage noise are often measured if

care is not exercised with regard to circuit layout and test-

ing. Crosstalk from nearby traces induces unwanted noise

onto the LT3050’s output. Power supply ripple rejection

must also be considered. The LT3050 regulator does not

have unlimited power supply rejection and passes a small

portion of the input noise through to the output.

APPLICATIONS INFORMATION

Using a feedforward capacitor (CFF) from VOUT to the ADJ

pin has the added beneﬁ t of improving transient response

for output voltages greater than 0.6V. With no feedforward

capacitor, the settling time will increase as the output

voltage is raised above 0.6V. Use the equation in Figure 2

to determine the minimum value of CFF to achieve a

transient response that is similar to 0.6V output voltage

performance regardless of the chosen output voltage

(See Figure 3 and Transient Response in the Typical Perf-

ormance Characteristics section).

During start-up, the internal reference will soft-start if a

reference bypass capacitor is present. Regulator start-

up time is directly proportional to the size of the bypass

capacitor, slowing to 6ms with a 10nF bypass capacitor

(See Start-up Time vs REF/BYP Capacitor in the Typical

Performance Characteristics section). The reference by-

pass capacitor is actively pulled low during shutdown to

reset the internal reference.

3050 F02

SHDN

OUT

ADJ

GND REF/BYP

LT3050-5

VIN

VOUT

CREF/BYP

CFF COUT

CFF

10nF

10µA •IFB DIVIDER

()

IFB DIVIDER =VOUT

R1+R2 10µA FOR FIXED VOUT

()

100µs/DIV

VOUT = 5V

COUT = 10µF

IFB-DIVIDER = 10µA

1nF

10nF

LOAD CURRENT

100mA/DIV

FEEDFORWARD

CAPACITOR, CFF

100pF

3050 F03

VOUT

50mV/DIV

Figure 2. Feedforward Capacitor for Fast Transient Response

Figure 3. Transient Response vs Feedforward Capacitor

LT3050 Series

3050fa

APPLICATIONS INFORMATION

DC BIAS VOLTAGE (V)

CHANGE IN VALUE (%)

3050 F04

–20

–40

–60

–80

–100 04810

26 12 14

X5R

Y5V

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

TEMPERATURE (°C)

–50

–20

–40

–60

–80

–100 25 75

3050 F05

–25 0 50 100 125

Y5V

CHANGE IN VALUE (%)

X5R

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

Figure 4. Ceramic Capacitor DC Bias Characteristics

Figure 5. Ceramic Capacitor Temperature Characteristics

Start-up time is also affected by the presence of a feed-

forward capacitor. Start-up time is directly proportional to

the size of the feedforward capacitor and the output volt-

age, and is inversely proportional to the feedback resistor

divider current, slowing to 15ms with a 4.7nF feedforward

capacitor and a 10µF output capacitor for an output voltage

set to 5V by a 5µA feedback resistor divider.

Output Capacitance

The LT3050 regulator is stable with a wide range of output

capacitors. The ESR of the output capacitor affects stability,

most notably with small capacitors. Use a minimum output

capacitor of 2.2µF with an ESR of 3 or less to prevent

oscillations. If a feedforward capacitor is used with output

voltages set for greater than 24V, use a minimum output

capacitor of 4.7µF. The LT3050 is a micropower device

and output load transient response is a function of output

capacitance. Larger values of output capacitance decrease

the peak deviations and provide improved transient re-

sponse for larger load current changes. Bypass capacitors,

used to decouple individual components powered by the

LT3050, increase the effective output capacitor value. For

applications with large load current transients, a low ESR

ceramic capacitor in parallel with a bulk tantalum capacitor

often provides an optimally damped response.

Give extra consideration to the use of ceramic capacitors.

Manufacturers make ceramic capacitors with a variety of

dielectrics, each with different behavior across tempera-

ture and applied voltage. The most common dielectrics

are speciﬁ ed with EIA temperature characteristic codes

of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics

provide high C-V products in a small package at low cost,

but exhibit strong voltage and temperature coefﬁ cients, as

shown in Figures 4 and 5. When used with a 5V regulator,

a 16V 10F Y5V capacitor can exhibit an effective value

as low as 1F to 2F for the DC bias voltage applied, and

over the operating temperature range. The X5R and X7R

dielectrics yield much more stable characteristics and are

more suitable for use as the output capacitor.

The X7R type works over a wider temperature range and

has better temperature stability, while the X5R is less

expensive and is available in higher values. Care still must

be exercised when using X5R and X7R capacitors; the X5R

and X7R codes only specify operating temperature range

and maximum capacitance change over temperature.

Capacitance change due to DC bias with X5R and X7R

capacitors is better than Y5V and Z5U capacitors, but can

still be signiﬁ cant enough to drop capacitor values below

appropriate levels. Capacitor DC bias characteristics tend

to improve as component case size increases, but expected

capacitance at operating voltage should be veriﬁ ed.

LT3050 Series

3050fa

Figure 6. Noise Resulting from Tapping on a Ceramic Capacitor

10ms/DIV

VOUT

1mV/DIV

3050 F06

VOUT = 5V

COUT = 10µF

CREF/BYP = 10nF

APPLICATIONS INFORMATION

Voltage and temperature coefﬁ cients are not the only

sources of problems. Some ceramic capacitors have a

piezoelectric response. A piezoelectric device generates

voltage across its terminals due to mechanical stress,

similar to the way a piezoelectric accelerometer or micro-

phone works. For a ceramic capacitor, the stress is induced

by vibrations in the system or thermal transients. The

resulting voltages produced cause appreciable amounts

of noise. A ceramic capacitor produced the trace in

Figure 6 in response to light tapping from a pencil. Similar

vibration induced behavior can masquerade as increased

output voltage noise.

Overload Recovery

Like many IC power regulators, the LT3050 has safe oper-

ating area protection. The safe area protection decreases

current limit as input-to-output voltage increases, and

keeps the power transistor inside a safe operating region

for all values of input-to-output voltage. The LT3050 pro-

vides some output current at all values of input-to-output

voltage up to the device breakdown.

When power is ﬁ rst applied, the input voltage rises and the

output follows the input; allowing the regulator to start-up

into very heavy loads. During start-up, as the input voltage

is rising, the input-to-output voltage differential is small,

allowing the regulator to supply large output currents.

With a high input voltage, a problem can occur wherein

the removal of an output short will not allow the output

to recover. Other regulators, such as the LT1083/LT1084/

LT1085 family and LT1764A also exhibit this phenomenon,

so it is not unique to the LT3050. The problem occurs with

a heavy output load when the input voltage is high and the

output voltage is low. Common situations are: immediately

after the removal of a short-circuit or if the shutdown pin

is pulled high after the input voltage is already turned on.

The load line for such a load intersects the output cur-

rent curve at two points. If this happens, there are two

stable output operating points for the regulator. With this

double intersection, the input power supply needs to be

cycled down to zero and brought up again to make the

output recover.

Thermal Considerations

The LT3050’s maximum rated junction temperature of

125°C limits its power handling capability. Two components

comprise the power dissipated by the device:

1. Output current multiplied by the input/output

voltage differential: IOUT • (VIN – VOUT), and

2. GND pin current multiplied by the input voltage:

GND • VIN

GND pin current is determined using the GND Pin Current

curves in the Typical Performance Characteristics section.

Power dissipation equals the sum of the two components

listed above.

The LT3050 regulator has internal thermal limiting that

protects the device during overload conditions. For con-

tinuous normal conditions, do not exceed the maximum

junction temperature of 125°C. Carefully consider all

sources of thermal resistance from junction-to-ambient

including other heat sources mounted in proximity to the

LT3050.

The undersides of the LT3050 DFN and MSOP packages

have exposed metal from the lead frame to the die attach-

ment. These packages allow heat to directly transfer from

the die junction to the printed circuit board metal to control

maximum operating junction temperature. The dual-in-line

pin arrangement allows metal to extend beyond the ends

of the package on the topside (component side) of a PCB.

Connect this metal to GND on the PCB. The multiple IN

and OUT pins of the LT3050 also assist in spreading heat

to the PCB.

LT3050 Series

3050fa

APPLICATIONS INFORMATION

For surface mount devices, heat sinking is accomplished

by using the heat spreading capabilities of the PC board

and its copper traces. Copper board stiffeners and plated

through-holes also can spread the heat generated by

power devices. The following tables list thermal resis-

tance as a function of copper area in a ﬁ xed board size.

All measurements were taken in still air on a four-layer

FR-4 board with one ounce solid internal planes and two

ounce external trace planes with a total board thickness

of 1.6mm. For further information on thermal resistance

and using thermal information, refer to JEDEC standard

JESD51, notably JESD51-12.

Table 1. MSOP Measured Thermal Resistance

COPPER AREA BOARD

AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)TOPSIDE BACKSIDE

2500 sq mm 2500 sq mm 2500 sq mm 40°C/W

1000 sq mm 2500 sq mm 2500 sq mm 41°C/W

225 sq mm 2500 sq mm 2500 sq mm 43°C/W

100 sq mm 2500 sq mm 2500 sq mm 45°C/W

Table 2. DFN Measured Thermal Resistance

COPPER AREA

TOPSIDE BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

2500 sq mm 2500 sq mm 44°C/W

1000 sq mm 2500 sq mm 45°C/W

225 sq mm 2500 sq mm 47°C/W

100 sq mm 2500 sq mm 49°C/W

Calculating Junction Temperature

Example: Given an output voltage of 5V, an input voltage

range of 12V ±5%, a maximum output current range of

75mA and a maximum ambient temperature of 85°C, what

will the maximum junction temperature be?

The power dissipated by the device equals:

OUT(MAX) * (VIN(MAX) – VOUT) + IGND * VIN(MAX)

where,

OUT(MAX) = 75mA

IN(MAX) = 12.6V

GND at (IOUT = 75mA, VIN = 12V) = 1.5mA

So,

P = 75mA • (12.6V - 5V) + 1.5mA • 12.6V = 0.589W

Using a DFN package, the thermal resistance ranges from

44°C/W to 49°C/W depending on the copper area. So the

junction temperature rise above ambient approximately

equals:

0.589W • 49°C/W = 28.86°C

The maximum junction temperature equals the maximum

ambient temperature plus the maximum junction tempera-

ture rise above ambient or:

JMAX = 85°C + 28.86°C = 113.86°C

Protection Features

The LT3050 incorporates several protection features that

make it ideal for use in battery-powered circuits. In ad-

dition to the normal protection features associated with

monolithic regulators, such as current limiting and thermal

limiting, the device also protects against reverse-input

voltages, reverse-output voltages and reverse output-to-

input voltages.

Current limit protection and thermal overload protection

protect the device against current overload conditions at

the output of the device. For normal operation, do not

exceed a junction temperature of 125°C.

LT3050 Series

3050fa

Figure 7. Reverse Output Current

VOUT (V)

IOUT (µA)

1.0

0.3

0.6

0.7

0.8

0.9

0.4

0.5

0.1

0.2

3050 F07

00 1020304050

ALL PINS GROUNDED EXCEPT FOR OUT

The LT3050 IN pin withstands reverse voltages of 50V. The

device limits current ﬂ ow to less than 300A (typically less

than 10A) and no negative voltage appears at OUT. The

device protects both itself and the load against batteries

that are plugged in backwards.

The SHDN pin cannot be driven below GND unless tied

to the IN pin. If the SHDN pin is driven below GND while

IN is powered, the output may turn on. SHDN pin logic

cannot be referenced to a negative rail.

The LT3050 incurs no damage if its output is pulled be-

low ground. If the input is left open-circuit or grounded,

APPLICATIONS INFORMATION

the output can be pulled below ground by 50V. No cur-

rent ﬂ ows through the pass transistor from the output.

However, current ﬂ ows in (but is limited by) the resistor

divider that sets the output voltage. Current ﬂ ows from

the bottom resistor in the divider and from the ADJ pin’s

internal clamp through the top resistor in the divider to

the external circuitry pulling OUT below ground. If the

input is powered by a voltage source, the output sources

current equal to its current limit capability and the LT3050

protects itself by thermal limiting. In this case, grounding

the SHDN pin turns off the device and stops the output

from sourcing current.

LT3050 Series

3050fa

PACKAGE DESCRIPTION

DDB Package

12-Lead Plastic DFN (3mm × 2mm)

(Reference LTC DWG # 05-08-1723 Rev Ø)

2.00 ±0.10

(2 SIDES)

NOTE:

1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

0.40 ± 0.10

BOTTOM VIEW—EXPOSED PAD

0.64 ± 0.10

(2 SIDES)

0.75 ±0.05

R = 0.115

TYP

R = 0.05

TYP

2.39 ±0.10

(2 SIDES)

3.00 ±0.10

(2 SIDES)

127

PIN 1 BAR

TOP MARK

(SEE NOTE 6)

0.200 REF

0 – 0.05

(DDB12) DFN 0106 REV Ø

0.23 ± 0.05

0.45 BSC

PIN 1

R = 0.20 OR

0.25 s 45°

CHAMFER

0.25 ± 0.05

2.39 ±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

0.64 ±0.05

(2 SIDES)

1.15 ±0.05

0.70 ±0.05

2.55 ±0.05

PACKAGE

OUTLINE

0.45 BSC

LT3050 Series

3050fa

MSOP (MSE12) 0608 REV B

0.53 p 0.152

(.021 p .006)

SEATING

PLANE

0.18

(.007)

1.10

(.043)

MAX

0.22 –0.38

(.009 – .015)

TYP

0.86

(.034)

REF

0.650

(.0256)

BSC

12 11 10 9 8 7

DETAIL “B”

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

0.254

(.010) 0o – 6o TYP

DETAIL “A”

GAUGE PLANE

RECOMMENDED SOLDER PAD LAYOUT

BOTTOM VIEW OF

EXPOSED PAD OPTION

2.845 p 0.102

(.112 p .004)

2.845 p 0.102

(.112 p .004)

4.039 p 0.102

(.159 p .004)

(NOTE 3)

1.651 p 0.102

(.065 p .004)

0.1016 p 0.0508

(.004 p .002)

123456

3.00 p 0.102

(.118 p .004)

(NOTE 4)

0.406 p 0.076

(.016 p .003)

REF

4.90 p 0.152

(.193 p .006)

DETAIL “B”

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

NO MEASUREMENT PURPOSE

0.12 REF

0.35

REF

5.23

(.206)

MIN

3.20 – 3.45

(.126 – .136)

0.889 p 0.127

(.035 p .005)

0.42 p 0.038

(.0165 p .0015)

TYP

0.65

(.0256)

BSC

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

MSE Package

12-Lead Plastic MSOP Exposed Die Pad

(Reference LTC DWG # 05-08-1666 Rev B)

PACKAGE DESCRIPTION

LT3050 Series

3050fa

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER

A 6/10 Updated data sheet to include ﬁ xed voltage options. 1-14, 17-26

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LT3050 Series

3050fa

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

LT 0610 REV A • PRINTED IN USA

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LT3085 500mA, Parallelable. Low Noise, Low

Dropout Linear Regulator

275mV Dropout Voltage (2-supply operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V, VOUT: 0V

to 35.7V, Current-Based Reference with 1-Resistor VOUT set; Directly Parallelable (no op amp

required), Stable with Ceramic Caps, MSOP-8 and 2mm × 3mm DFN Packages

5V Protected Antenna Supply with 100mA Current Limit, 10mA IMIN

IMIN

IMAX

ADJ

GND

FAULT

SHDN

IMON

OUT

REF/BYP

LT3050-5

(ADC FULL SCALE = 3V)

1.15k

(THRESHOLD = 100mA)

11.3k

(THRESHOLD = 10mA)

3050 TA02

10µF

CFF

10nF

1µF

0.1µF

10nF

12V

VIN 120k

TO µP ADC

10nF

0.1µF