CY62136VSL-55ZI - Cypress Semiconductor Corp.

2-Mbit (128K x 16) Static RAM

CY62136V MoBL®

Cypress Semiconductor Corporation • 3901 North First Street • San Jose,CA 95134 • 408-943-2600

Document #: 38-05087 Rev. *C Revised March 29, 2005

Features

• Temperature Range s

— Commercial: 0°C to 70°C

— Industrial: –40 °C to 85°C

— Automotive: –40°C to 125°C

• High speed: 55 ns and 70 ns

• 70-ns speed bin offered in both Industria l an d

Automotive grades

• Wide voltage range: 2.7V–3.6V

• Ultra-low active, standby power

• Easy memory expansion with CE and OE features

• TTL-compatible inputs and outputs

• Automatic power-down when deselected

• CMOS for optimum speed/po we r

• Package available in a standard 44-pin TSOP Type II

(forward pinout) package

• Also available in Lead-free package

Functional Description[1]

The CY62136V is a high-performance CMOS static RAM

organized as 128K words by 16 bits. This device features

advanced circuit design to provide ultra-low active current.

This is ideal for providing More Battery Life™ (MoBL®) in

portable applications such as cellular te lephones. Th e device

also has an automatic power-down feature that significantly

reduces power consumption by 99% when addresses are not

toggling. The device can also be put into standby mode when

deselected (CE HIGH). The input/output pins (I/O0 through

I/O15) are placed in a high-impedance state when: deselected

(CE HIGH), outputs are disabled (OE HIGH), BHE and BLE

are disabled (BHE, BLE HIGH), or during a write operation (CE

LOW, and WE LOW).

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is

written into the location specified on the address pins (A0

through A16). If Byte High Enable (BHE) is LOW, then data

from I/O pins (I/O8 through I/O15) is written into the location

specified on the address pins (A0 through A16).

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing the

Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,

then data from the memory location specified b y the address

pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) i s

LOW , then data from memory will appear on I/O8 to I/O15. See

the Truth Table at the back of this data sheet for a complete

description of read and write modes.

Note:

1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

Logic Block Diagram

128K x 16

RAM Array I/O0 – I/O7

ROW DECODER

COLUMN DECODER

A11

A12

A13

A14

A15

2048 x 1024

SENSE AMPS

DATA IN DRIVERS

A3I/O8 – I/O15

BLE

BHE

A16

A10

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 2 of 11

Product Portfolio

Product VCC Range (V) Speed Grades

Power Dissipation (Industrial)

Operating, ICC (mA) Standby, ISB2 (µA)

Min Typ.[2] Max Typ.[2] Maximum Typ.[2] Maximum

CY62136VLL 2.7 3.0 3.6 55 Industrial 720 115

70 Industrial 715 115

Automotive 720 120

CY62136VSL 55 Industrial 720 1 5

70 Industrial 715 1 5

Pin Configurations[3]

Notes:

2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ, TA = 25°C.

3. NC pins are not connected on the die

14 31

Top View

TSOP II (Forward)

15 29

VCC

A16

A15

A14

A13

A12

VSS

I/O15

I/O2

I/O0

I/O1

BHE

I/O3

21 23

24 NC

VSS

I/O6

I/O4

I/O5

I/O7

BLE

VCC

I/O14

I/O13

I/O12

I/O11

I/O10

I/O9

I/O8

A10

A11

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 3 of 11

Maximum Ratings

(Above which the useful life may be impaired. For user guide-

lines, not tested.)

Storage Temperature ..................................–65°C to +150°C

Ambient Temperature with

Power Applied.............................................–55°C to +125°C

Supply Voltage to Ground Potential...............–0.5V to +4.6V

DC Voltage Applied to Outputs

in High-Z S tate[4]....................................–0.5V to VCC + 0.5V

DC Input V oltage[4].................................–0.5V to VCC + 0.5V

Output Current into Outputs (LOW)............................ 20 mA

Static Discharge Voltage...........................................> 2001V

(per MIL-STD-883, Method 3015)

Latch-up Current.....................................................> 200 mA

Operating Range

Range Ambient Temperature

[TA][6] VCC

Industrial −40°C to +85°C 2.7V to 3.6V

Automotive −40°C to +125°C

Electrical Characteristics Over the Operating Range

Parameter Description Test Con dition s

CY62136V-55 CY62136V-70

UnitMin. Typ.[2] Max. Min. Typ.[2] Max.

VOH Output HIGH

Voltage IOH = −1.0 mA VCC = 2.7V 2.4 2.4 V

VOL Output LOW V oltage IOL = 2.1 mA VCC = 2.7V 0.4 0.4 V

VIH Input HIGH Voltage VCC = 3.6V 2.2 VCC +

0.5V 2.2 VCC +

0.5V V

VIL Input LOW Voltage VCC = 2.7V –0.5 0.8 –0.5 0.8 V

IIX Input Load Current GND < VI < VCC Industrial –1 +1 –1 +1 µA

Automotive –10 +10 µA

IOZ Output Leakage

Current GND < VO < VCC,

Output Disabled Industrial –1 +1 –1 +1 µA

Automotive –10 +10 µA

ICC VCC Operating

Supply

Current

f = fMAX = 1/tRC,V

CC = 3.6V,

IOUT = 0 mA,

CMOS

Levels

Industrial 7 20 7 15 mA

Automotive 7 20 mA

f = 1 MHz, 1 2 1 2 mA

ISB1 Automatic CE

Power-down

Current— CMOS

Inputs

CE > VCC−0.3V,

VIN > VCC−0.3V or

VIN < 0.3V,

f = fMAX

100 100 µA

ISB2 Automatic CE

Power-down

Current— CMOS

Inputs

CE > VCC−0.3V

VIN > VCC−0.3V or

VIN < 0.3V, f = 0

VCC = 3.6V Industrial (LL ) 1 15 1 15 µA

Industrial (SL) 1 5 1 5 µA

Automotive 1 20 µA

Thermal Resistance

Parameter Description Test Conditions TSOPII Unit

ΘJA Thermal Resistance

(Junction to Ambient)[5] Still Air, soldered on a 4.25 x 1.125 inch, 4-layer

printed circuit board 60 °C/W

ΘJC Thermal Resistance

(Junction to Case)[5] 22 °C/W

Capacitance[5]

Parameter Description Test Conditions Max. Unit

CIN Input Capacitance TA = 25°C, f = 1 MHz,

VCC = VCC(typ) 6pF

COUT Output Capacitance 8 pF

Notes:

4. VIL(min) = –2.0V for pulse durations less than 20 ns.

5. Tested initially and afte r any design or process changes that may affect these parameters.

6. TA is the “Instant-On” case temperature.

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 4 of 11

AC Test Loads and Waveforms

Parameters 3.0V Unit

R1 1105 Ohms

R2 1550 Ohms

RTH 645 Ohms

VTH 1.75 Volts

Data Retention Characteristics (Over the Operating Range )

Parameter Description Conditions[8] Min. Typ.[2] Max. Unit

VDR VCC for Data Retention 1.0 3.6 V

ICCDR Data Retention Current VCC = 1.0V , CE > VCC − 0.3V,

VIN > VCC − 0.3V or VIN < 0.3V,

No input may exceed VCC + 0.3V

LL 0.5 7.5 µA

SL 5

tCDR[5] Chip Deselect to Data

Retention Time 0ns

tR[7] Operation Recovery T ime 70 ns

VCC Typ

VCC

OUTPUT

30 pF

INCLUDING

JIG AND

SCOPE

GND

90%

10% 90%

10%

OUTPUT V

Equivalent to: THÉ VENIN EQUIVALENT

ALL INPUT PULSES

RTH

R1 VCC

OUTPUT

5 pF

INCLUDING

JIG AND

SCOPE

Rise Time:

1 V/ns Fall Time:

1 V/ns

(a) (b)

(c)

Data Retention Waveform

VCC(min.)

tCDR

VDR >1.0 V

DATA RETENTION MODE

VCC

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 5 of 11

Switching Characteristics Over the Operating Range [8]

Parameter Description

55 ns 70 ns

UnitMin. Max. Min. Max.

Read Cycle

tRC Read Cycle Time 55 70 ns

tAA Address to Data Valid 55 70 ns

tOHA Data Hold from Address Change 10 10 ns

tACE CE LOW to Data Valid 55 70 ns

tDOE OE LOW to Data Valid 25 35 ns

tLZOE OE LOW to Low-Z[9] 55ns

tHZOE OE HIGH to High-Z[9, 10] 25 25 ns

tLZCE CE LOW to Low-Z[9] 10 10 ns

tHZCE CE HIGH to High-Z[9, 10] 25 25 ns

tPU CE LOW to Power-up 0 0 ns

tPD CE HIGH to Power-down 55 70 ns

tDBE BLE / BHE LOW to Data Valid 25 35 ns

tLZBE BLE / BHE LOW to Low-Z[9, 10] 55ns

tHZBE BLE / BHE HIGH to High-Z[11] 25 25 ns

Write Cycle[11, 12]

tWC W r ite Cycle Time 55 70 ns

tSCE CE LOW to Write End 45 60 ns

tAW Address Set-up to Write End 45 60 ns

tHA Address Hold from Wr ite End 0 0 ns

tSA Address Set-up to Write Start 0 0 ns

tPWE WE Pulse Width 40 50 ns

tBW BLE / BHE LOW to Write End 50 60 ns

tSD Data Set-up to Write End 25 30 ns

tHD Data Hold from Write End 0 0 ns

tHZWE WE LOW to High-Z[9, 10] 20 25 ns

tLZWE WE HIGH to Low-Z[9] 510ns

Notes:

7. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 ms or stable at VCC(min) > 100 ms.

8. Test conditions assume signal transition t ime of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to VCC typ., and output loading of the specified

IOL/IOH and 30-pF load capacitance.

9. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.

10.tHZOE, tHZCE, and tHZWE are specified wit h CL = 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.

11.The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can

terminate a writ e by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.

12.The minimum write cycle time for write cycle 3 (WE controlled, O E LOW) is the sum of tHZWE and tSD.

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 6 of 11

Switching Waveforms

Read Cycle No. 1[13, 14]

Read Cycle No. 2[14, 15]

Notes:

13.Device is continuously selected. OE, CE = VIL.

14.WE is HIGH for read cycle.

15.Address valid prior to or coincident with CE transition LOW .

ADDRESS

DATA OUT PREVIOUS DATA VALID DATA VALID

tRC

tAA

tOHA

50%

DATA VALID

ACE

DBE

LZBE

LZCE

DATA OUT HIGH IMPEDANCE IMPEDANCE

HZOE

HZCE

HIGH

SUPPLY

CURRENT

HZBE

BHE/BLE

DOE

LZOE

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 7 of 11

Write Cycle No. 1 (WE Controlled)[11, 16, 17]

Write Cycle No. 2 (CE Controlled)[11, 16, 17]

Notes:

16.Data I/O is high impedance if OE = VIH.

17.If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.

18.During this period, the I/Os are in output state and input signals should not be applied.

Switching Waveforms (continued)

tHD

tSD

tPWE

tSA

tHA

tAW

tWC

DATA I/O

ADDRESS

tHZOE

DATAIN VALID

NOTE18

BHE/BLE tBW

tWC

tAW

tSA tHA

tHD

tSD

tSCE

DATA

IN VALID

tBW

tPWE

ADDRESS

BHE/BLE

DATA I/O

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 8 of 11

Write Cycle No. 3 (WE Controlled, OE LOW)[12, 17]

Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)[18]

Switching Waveforms (continued)

DATA I/O

ADDRESS

tHD

tSD

tLZWE

tSA

tHA

tAW

tWC

tHZWE

DATAIN VALID

NOTE 18

BHE/BLE tBW

DATA I/O

ADDRESS

tHD

tSD

tLZWE

tSA

tHA

tAW

tWC

tHZWE

DATAIN VALID

tBW

BHE/BLE

NOTE 18

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 9 of 11

Typical DC and AC Characteristics

1.0 1.9 2.8 3.7

ISB (µA)

1.2

1.4

1.0

0.6

0.4

0.2

1.7 2.2 2.7 3.2 3.7

0.0

0.8

ICC

1.0 1.9 2.8 3.7

SUPPLY VOLTAGE (V)

Access Time vs. Supply Voltage

TAA (ns)

Normalized Operating Current

Standby Current vs. Supply Voltage

SUPPLY VOLTAGE (V)

MoBL

vs. Supply Voltage

2.7

Truth Table

CE WE OE BHE BLE Inputs/Outputs Mode Power

H X X X X High-Z Deselect/Power-down Standby (ISB)

L H L L L Data Out (I/O O–I/O15)Read Active (ICC)

L H L H L Data Out (I/O O–I/O7);

I/O8–I/O15 in High-Z Read Active (ICC)

L H L L H Data Out (I/O8–I/O15);

I/O0–I/O7 in High-Z Read Active (ICC)

L H L H H High-Z Deselect/Output Disabled Active (ICC)

L H H L L High-Z Deselect/Output Disabled Active (ICC)

L H H H L High-Z Deselect/Output Disabled Active (ICC)

L H H L H High-Z Deselect/Output Disabled Active (ICC)

L L X L L Dat a In (I/OO–I/O15)Write Active (ICC)

L L X H L Data In (I/OO–I/O7);

I/O8–I/O15 in High-Z Write Active (ICC)

L L X L H Data In (I/O8–I/O15);

I/O0 –I/O7 in High-Z Write Active (ICC)

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 10 of 11

© Cypress Semi con duct or Cor po rati on , 20 05 . The information contained he rein is subject to change without notice. Cypress Semiconductor Corpo ration assu me s no resp onsib ility for th e u se

of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be

used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthe rmore, Cypress does not authori ze its

products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant inju ry to the user. The inclusion of Cypress

products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

MoBL is a registered trademark, and More Battery Li fe is a tra demark, of Cypress Semicond uctor C orporation. All product a nd

company names mentioned in this document are the products of their respective holders.

Ordering Information

Speed

(ns) Ordering Code Package

Name Package Type Operating

Range

55 CY62136VLL-55ZI Z44 44-pin TSOP II Industrial

CY62136VSL-55ZI Z44 44-pin TSOP II Industrial

CY62136VLL-55ZXI Z44 44-pin TSOP II (Pb-Free) Industrial

70 CY62136VLL-70ZI Z44 44-pin TSOP II Industrial

CY62136VLL-70ZXI Z44 44-pin TSOP II (Pb-Free) Industrial

CY62136VLL-70ZSE Z44 44-pin TSOP II Automotive

CY62136VLL-70ZSXE Z44 44-pin TSOP II (Pb-Free) Automotive

CY62136VSL-70ZI Z44 44-pin TSOP II Industrial

Shaded areas contain preliminary information.

Package Diagrams

44-pin TSOP II Z44

51-85087-*A

CY62136V MoBL®

Document #: 38-05087 Rev. *C Page 11 of 11

Document History Page

Document Title: CY62136V MoBL® 2-Mbit (128K x 16) Static RAM

Document Number: 38-05087

REV. ECN NO. Issue Date Orig. of

Change Description of Change

** 107347 05/25/01 SZV Changed from Spec #: 38-007 28 to 38-05087

*A 116509 09/04/02 GBI Added footnote 1

Added SL power bin

Deleted fBGA package; replacement fBGA package available in

CY62136CV30

*B 269729 See ECN SYT Added Automotive Information for 70-ns Spe ed Bin.

Added Footnotes # 3 and # 6.

Corrected T ypo in Electrical Characteristics for ICC(Max)-55 ns from 15 to

20 mA.

Added SL row for ISB2 in the Electrical Characteristics table.

Changed Package Name from Z44 to ZS44.

Replaced ‘Z’ with ‘ZS’ in the Ordering Code.

*C 344595 See ECN SYT Added Lead-Free Package on page# 9

Changed Package Name from ZS44 to Z4 4 for the 44 TSOP II Package

Replaced ‘ZS’ with ‘Z’ in the Ordering Code for Industrial