ee FAIRCHILD ee SEMICONDUCTOR 100323 Low Power Hex Bus Driver General Description The 100323 is a monolithic device containing six bus drivers capable of driving terminated lines with terminations as low as 25Q. To reduce crosstalk, each output has its own re- spective ground connection. Transition times were designed to be longer than on other F100K devices. The driver itself performs the positive logic AND of a data input (D,;Dg) and the OR of two select inputs (E and either DE,, DEz, or DE). Enabling of data is possible in multiples of two, i.e., 2, 4 or all 6 paths. All inputs have 50 kQ pull-down resistors. The output voltage LOW level is designed to be more nega- tive than normal ECL outputs (cut off state). This allows an March 1998 emitter-follower output transistor to turn off when the termi- nation supply is -2.0V and thus present a high impedance to the data bus. Features w 50% power reduction of the 100123 @ 2000V ESD protection w -4.2V to -5.7V operating range @ Drives 25Q load Ordering Code: DS008877-3 Logic Symbol Pin Names Description rltLi D,Dg Data Inputs DE,-DE Dual Enable Inputs Fy Dy Dy Dy Ds Dy 1-DEs al Ena put De, E Common Enable Input DE 0,-Og Data Outputs Fs 0, 0, 0; 4 05 05 DS009877-7 Connection Diagrams 24-Pin DIP 24-Pin Quad Cerpak 28-Pin PCC ww Dg DE; E Vpg DE, DE, D, Dy Ds Yees 93 Veco Yoca 1 24-05 |_ J | | 4 HOHE) 05-42 23-0, 24 23 22 21 20 19 Voca 3 22d, O57" 18, zl El vecn on -4 21K Oy 2 177 0p o Blo, 4 5 Oo. 43 16lp. vee 4] [2] Yecs, Veca 5 20} DE. 6 5 CCA 3 y 4 isto Vees OD veg Yor 6 igre cca 3 ef Fl vice Veca 7 18} Vee 5 48 14 Veca OE Yeon 8 17}-E, Yoou 8 135 05 0, [al Bo, 78 9 10 11:12 Vecaq 9 16}de, I TTI rrr) 0, 410 15FD, 4 Ycca Yoo Yeca 41 Ycca D5 34 Ms Vers eea% Veew VYoca "1 147-0, DS0098 77-4 0s009877-2 03-412 13-0; 1998 Fairchild Semiconductor Corporation DS009877 www fairchildsemi.com J9ALIG SNG X9H JAMOd MO] EZEOOLLogic Diagram % 11 24;Dy 42 23D, Oy 3 22;D, a,44 21D; Yoca 5 20F-Voca Yoo 46 19FVoca Yoca ]7 187 Ver Voca 8 17F Dy 79 16F-D, Q, 10 15F-D, Qg yl 14F-D, am 12 13,--0OE DS009877-1 Truth Table E DE, Dn Das On Ons L L x x Cutoff Cutoff 4 H L L Cutoff Cutoff 4 H L H Cutoff H x H H L H Cutoff 4 H H H H H H x L L Cutoff Cutoff H 4 L H Cutoff H H 4 H L H Cutoff H 4 H H H H H = High Cutoff = Lower-than-LOW state L = Low X = Don't Care www fairchildsemi.comAbsolute Maximum Ratings (note 1) Storage Temperature -65C to +150C Maximum Junction Temperature Ceramic H175C Plastic +150C Vee Pin Potential to Ground Pin -7.0V to +0.5V Input Voltage (DC) Vee to +0.5V Output Current (DC Output High) -50 mA ESD 22000V Commercial Version DC Electrical Characteristics Recommended Operating Conditions Case Temperature Commercial 0S to +85C Military -55C to +125C Supply Voltage (Vee) -5.7V to -4.2V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Ver = -4.2V to -5.7V, Vog = Voca = GND, Tg = 0C to +85C (Note 3) Symbol Parameter Min Typ Max | Units Conditions Vin Input HIGH Voltage -1165 -870 mV Guaranteed High Signal for ALL Inputs Vit Input LOW Voltage -1830 -1475 mV Guaranteed Low Signal for ALL Inputs Vou Output HIGH Voltage -1025 | -955 | -870 mV | Vin = Vin (max) OF Vit (min) Loading with 25Q to -2.0V Voue Output HIGH Voltage | -1035 mV | Vin = Vin ominy OF Vit (max) Loading with 25Q to -2.0V Voz Cut-Off LOW Voltage -1950 mV | Vin = Vin miny OF Vit (max) Loading with 25Q to -2.0V lit Input LOW Current 0.50 HA Vin = Vic cminy lia Input HIGH Current 240 HA Vin = Vin (max) lee Power Supply Current -121 -91 -57 mA Inputs Open Note 3: The specified limits represent worst case values for the parameter. Since these values normally occur at the temperature extremes, additional noise im- munity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under worst case conditions. DIP AC Electrical Characteristics Vee = 4.2V to -5.7V, Voo = Veca = GND Symbol Parameter To = OC To = +25C To = +85C Units | Conditions Min Max Min Max Min Max tezH Propagation Delay 1.90 3.60 1.90 3.60 2.00 3.80 ns Figures 1, 2 teuz Data to Output 1.30 2.70 1.30 2.70 1.50 2.70 tezH Propagation Delay 1.90 3.60 1.90 3.60 2.00 3.90 ns tpuz Dual Enable to Output 1.60 3.00 1.60 3.00 1.70 3.40 tezH Propagation Delay 1.80 3.50 1.80 3.50 2.00 3.80 ns teuz Common Enable to Output 1.50 2.90 1.50 2.90 1.60 3.00 try Transition Time 0.50 1.80 0.50 1.80 0.50 1.80 ns truz 20% to 80%, 80% to 20% 0.35 1.40 0.35 1.40 0.35 1.40 www fairchildsemi.comPCC and Cerpak AC Electrical Characteristics Vee = -4.2V to -5.7V, Voo = Voca = GND Symbol Parameter To = OC To = +25C To = +85C Units Conditions Min Max Min Max Min Max tezH Propagation Delay 1.90 3.40 1.90 3.40 2.00 3.60 ns Figures 1, 2 tpuz Data to Output 1.30 2.50 1.30 2.50 1.50 2.70 tezH Propagation Delay 1.90 3.40 1.90 3.40 2.00 3.70 ns tpHz Dual Enable to Output 1.60 2.80 1.60 2.80 1.70 3.00 tezH Propagation Delay 1.80 3.30 1.80 3.30 2.00 3.60 ns tpHz Common Enable to Output 1.50 2.70 1.50 2.70 1.60 2.80 tzu Transition Time 0.50 1.70 0.50 1.70 0.50 1.70 ns tz 20% to 80%, 80% to 20% 0.35 1.30 0.35 1.20 0.35 1.30 Note 4: The specified limits represent the "worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise im- munity and guard banding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under worst case conditions. Military VersionPreliminary DC Electrical Characteristics Vee = -4.2V to -5.7V, Voc = Veca = GND, To = -55C to +125C Symbol Parameter Min Max | Units Te Conditions Notes Vou Output HIGH -1025 | -870 mV 0C to +125C Vin = Vin max Loading with (Notes 5, 6, 7) Voltage -1085 | -870 mV -55C or Vit (min 25 to -2.0V Voue Output HIGH -1035 mV OC to +125C Vin = Vin (miny Loading with (Notes 5, 6, 7) Voltage 1085 mV 55C or Vit (max) 25Q to -2.0V Vote Output LOW -1610 | mV 0C to +125C Voltage -1555 MV -55C Voiz Cut-Off LOW -1950 ] mV OC to +125C Vin = Vin (miny Loading with (Notes 5, 6, 7) Voltage -1850 -55C or Vit (max) 25 to -2.0V Vin Input HIGH -1165 | -870 mV -55C to +125C | Guaranteed HIGH Signal (Notes 5, 6, 7, 8) Voltage for All Inputs Vit Input LOW -1830 | -1475 mV -55C to +125C | Guaranteed LOW Signal (Notes 5, 6, 7, 8) Voltage for All Inputs lit Input LOW 0.50 HA 55C to +125C | Vee = 4.2V, Vin = Vit (min) (Notes 5, 6, 7) Current liq Input HIGH 240 HA 0C to +125C Vee = -5.7V, Vin = Vin (max) (Notes 5, 6, 7) Current 340 HA -55C lee Power Supply Inputs Open Current -145 -55 mA -56C to +125C | Vee = -4.2V to -4.8V (Notes 5, 6, 7) -150 Vee = -4.2V to -5.7V Note 5: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides cold start specs which can be considered a worst case condition at cold temperatures. Note 6: Screen tested 100% on each device at -55C, +25C, and +125C, Subgroups 1, 2, 3, 7, and 8. Note 7: Sample tested (Method 5005, Table |) on each manufactured lot at -55C, +25C, and +125C, Subgroups A1, 2, 3, 7, and 8. Note 8: Guaranteed by applying specified input condition and testing VoH/VoL. www fairchildsemi.comAC Electrical CharacteristicsAll Packages Vee = 4.2V to -5.7V, Voo = Veca = GND Symbol Parameter To = -55C To = +25C To = +125C Units Conditions Min Max Min Max Min Max tezH Propagation Delay 1.70 4.00 1.70 4.00 1.80 4.20 ns Figures 1, 2 tpuz Data to Output 1.10 3.10 1.10 3.10 1.30 3.10 tezH Propagation Delay 1.70 4.00 1.70 4.00 1.80 4.30 ns tpHz Data Enable to Output 1.40 3.40 1.40 3.40 1.50 3.80 tezH Propagation Delay 1.60 3.90 1.60 3.90 1.80 4.20 ns tpHz Common Enable to Output 1.30 3.30 1.30 3.30 1.40 3.40 tzu Transition Time 0.40 2.20 0.40 2.20 0.40 2.20 ns tz 20% to 80%, 80% to 20% 0.25 1.80 0.25 1.80 0.25 1.80 Note 9: The specified limits represent the worst case value for the parameter. Since these worst case values normally occur at the temperature extremes, ad- ditional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. Note 10: Conditions for testing shown in the tables are chosen to guarantee operation under worst case conditions. Test Circuitry Vee A PULSE ay GENERATOR wri T uF 4 = SCOPE ry CHAN A ww L | LI L 24 23 22 21 20 19 Rr Ht 18}- 1.05 V e | 250 7 = -VWA1 3 16 50 4 250 15 AAA iad 5 14050 6 13 -W-4 7 8 9 1011 12 Vee Veo 250 L l L2 = 50 fy SCOPE 2 wT] CHAN B | | = L Ry 0.1 a T uF Notes: Voc. Veca = +2V, Veg = -2.5V L1 and L2 = equal length 50Q impedance lines Ry = 50Q terminator internal to scope Decoupling 0.1 UF from GND to Vccand Vee All unused outputs are loaded with 250 to GND C, = Fixture and stray capacitance < 3 pF Pin numbers shown are for flatpak; for DIP see logic symbol FIGURE 1. AC Test Circuit DS009877-6 www fairchildsemi.comTiming Waveform 0.7+0.1 | roe ns +4.05 V OUTPUT m [. | nw DS009877-6 FIGURE 2. Propagation Delay and Transition Times Ordering Information The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows: 100323 D G QB Device Number (Basic) | LL Special Variation QB = Military grade device with Package Code environmental and burn-in D =Ceramic DIP processing F = Quad Cerpak P = Plastic DIP Temperature Range Q =Plastic-Leaded Chip Carrier (PLCC) Cc =Commercial (0C to + 85C) M = Military (55C to + 125C) DS009877-8 www fairchildsemi.com 6Physical DimensiONS inches (millimeters) unless otherwise noted 1.215 * (30.86) 0.025 MAX 0.0300.055 (0.64) 24 8 (0.76 1.40) RAD PO I RAD TYP 0.390 (9.91) MAX ) \ / bean he hel he be be he he 2 >| jx REEL 0.005 GLASS 0.050- 9.060 BI. 0.400 -0.430 0.180 8.005 < 0.050 9.060 < 0.4000.430 0.180 (0.13) SEALANT (1.27 -1.52) TYR 0.015 0.0551, <(10. 16-1692) (4.57) MIN TYP (0.38 1.40) 1 MAX ) 0.225 it TH 6.72) ff i ; MAX la 8694 } \ 90 - 100 0.008 0.012 | TYP TYP (0.20 0.30) 0.125 TYP 0.055 9.090-0.110 | 0.0150.021 (3.18) 0.435 0.535 0.40) (2.29 2.79) (0.38 0.53) MIN < ~~ 44.05-13.59) MAX TYP TYP TYP TYP BOTH ENDS J24E (REV J) 24 Lead Ceramic Dual-In-Line Package (0.400" Wide) (D) Package Number J24E 1.194-1.214 [30.33-30.84] 0.202 24 [5.13] 13 eee ee eel 0:035-0.045 f [0.89-1.14] ND 0.337-0.347 [8.56-8.81] u LICICICOI LCI Ooo u 7 12 PIN NO. 1 IDENT g 0125 [3.18] 0.125-0.135 5 0.060 0.039 3.18-3.43 TYP 4X 0.390-0.410 [ ] [is2)0 7) [0.99] 7) [~~ 0.065 [9.91-10.41] [1.65] 0.145-0.200 | t ) 90-100 [3.68-5.08] _ + B6-g4 0.380 9.020 yy L__0.125-0.140 15 1 4 LL [9.65] MIN (051 [5.18-5.56] | | | |.0.047-0.057 +0.040 0.050 yp le | Mm" [1.19-1.45] TYP 0.428 9 'o15 [1.27] [10.87 #1021 0.015+0.021 0.090-0.110 0.009-0.015 87 0.38] [o.38-0.53] | [2.29-2.78] TF (0.25-0.38] N24E (REV A) 24 Lead Plastic Dual-In-Line Package (P) Package Number N24E www fairchildsemi.com 8Physical DimMeNnSiONS inches (millimeters) unless otherwise noted (Continued) +0.006 0.450 "hoo +0.15 ee IDENT 450 x 7 04e [1.14] 0.017#0.004 TYP 4 1 26 9.02940.003 ryp [0.43+0.10] a} [0.7440.08] | -| _ []25 a n f + H 0.4100.020 L [10.410.51] L] L] L]19 12 18 SEATING PLANE 1 0.050 typ | ne ja [1.27] | fa 9-020 in Typ 0.300 yyp [0.51] [7.62] 0.10540.015 ago y 0-045 [2.6740.38] [1.14] 0.165-0.180 TYP [4.19-4.57] a 0.490#0.005 [12.4540.13] TYP V2BA (REV K) 28 Lead Plastic Chip Carrier (Q) Package Number V28A www fairchildsemi.com100323 Low Power Hex Bus Driver Physical DimensiON$ inches (millimeters) unless otherwise noted (Continued) 0.366 0.370 MIN 0.360 0.007 ~~ 9.250 TYP TYP 9.250 TYP | * I~ o.o04 TYP (MOLDED BODY) PIN ND. 1 N (24 19 7 11 18 fz o __ a aD 1 a MH + __ a __J I o 6 30 o C7 12 ign 0.018 | 0.075 MAX 0.050 o.o1g "YP 8 PLCS Pl 01035 > 4.080 =-0.005 >| < 0.085 max LIFE SUPPORT POLICY 0.400 MAX ___,,. | TYP GLASS W248 (REV Di 24 Lead Quad Cerpak (F) Package Number W24B FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE- VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI- CONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or sys- tems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, failure to perform when properly used and (c) whose in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. Accritical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Fairchild Semiconductor Corporation Americas Customer Response Center Tal: 1-888-522-5372 Europe Fairchild Semiconductor Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 8 141-35-0 English Tel: +44 (0) 1 793-85-68-56 Italy www fairchildsemi.com Tel: +39 (0) 2 57 5631 Fairchild Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, & Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: +852 2737-7200 Fax: +852 2314-0061 National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.