19-0566; Rev 0; 7/06 KIT ATION EVALU E L B AVAILA 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer The MAX2059 high-linearity digital-variable-gain amplifier (DVGA) is designed to provide 56dB of total gain range and typical output IP3 and output P1dB levels of +31.8dBm and +18.4dBm, respectively. The device is ideal for a variety of applications, including single and multicarrier 1700MHz to 2200MHz DCS 1800/PCS 1900 EDGE, cdma2000(R), WCDMA/UMTS, and TD-SCDMA base stations. The MAX2059 yields a high level of component integration, which includes two 5-bit digital attenuators, a two-stage driver amplifier, a loopback mixer, and a serial interface to control the attenuators. The MAX2059 is pin compatible with the MAX2058 700MHz to 1200MHz DVGA, facilitating an easy design-in for applications where a common PC board layout is used for both frequency bands. The MAX2059 is available in a 40-pin thin QFN package with an exposed paddle. Electrical performance is guaranteed over a -40C to +85C temperature range. Applications DCS 1800/PCS 1900 EDGE Base-Station Transmitters and Power Amplifiers cdmaOneTM and cdma2000 Base-Station Transmitters and Power Amplifiers Features +31.8dBm Typical Output IP3 +18.4dBm Typical Output 1dB Compression Point 1700MHz to 2200MHz RF Frequency Range 700MHz to 1200MHz RF Frequency Range (MAX2058) 10.9dB Typical Small-Signal Gain Includes Two Independent 5-Bit Digital Attenuator Stages, Yielding 56dB of Total Gain-Control Range with 1dB Steps 3-Wire SPITM/MICROWIRETM Compatible Integrated Loopback Mixer for Tx/Rx SelfDiagnostics +5V Single-Supply Operation External Current-Setting Resistors for Scalable Device Power Lead-Free Package Available Ordering Information TEMP RANGE PIN-PACKAGE PKG CODE MAX2059ETL -40C to +85C 40 Thin QFN-EP* (6mm x 6mm) T4066-3 MAX2059ETL-T -40C to +85C 40 Thin QFN-EP* (6mm x 6mm) T4066-3 Automatic Test Equipment MAX2059ETL+ -40C to +85C 40 Thin QFN-EP* (6mm x 6mm) T4066-3 Digital and Spread-Spectrum Communication Systems MAX2059ETL+T -40C to +85C 40 Thin QFN-EP* (6mm x 6mm) T4066-3 WCDMA, TD-SCDMA, and Other 3G Base-Station Transmitters and Power Amplifiers PART Transmitter Gain Control Receiver Gain Control Broadband Systems Microwave Terrestrial Links *EP = Exposed paddle. +Denotes lead-free package. T = Tape-and-reel. Pin Configuration/Functional Diagram appears at end of data sheet. cdma2000 is a registered trademark of Telecommunications Industry Association. cdmaOne is a trademark of CDMA Development Group. SPI is a trademark of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX2059 General Description MAX2059 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer ABSOLUTE MAXIMUM RATINGS VCC to GND ...........................................................-0.3V to +5.5V RSET1, RSET2......................................................+1.2V to +4.0V LBBIAS .......................................................(VCC - 1.5V) to +5.5V LB_EN, DATA, CS, CLK .............................-0.3V to (VCC + 0.3V) ATTEN_INA, ATTEN_INB, ATTEN_OUTA, ATTEN_OUTB Input Power .................................................................+24dBm AMPIN, Differential LO Input Power ...............................+12dBm Continuous Power Dissipation (TA = +70C) 40-Pin TQFN (derated 26.3mW/C above +70C) ......2100mW Operating Temperature Range (Note A) .............-40C to +85C Junction Temperature ......................................................+150C JC ....................................................................................10C/W JA ....................................................................................38C/W Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Note A: TC is the temperature on the exposed paddle of the package. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, R1 = 1.2k, R2 = 2k, R3 = 2k, TC = -40C to +85C. Typical values are at VCC = +5.0V and TC = +25C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL Supply Voltage VCC Total Supply Current ICC CONDITIONS MIN TYP MAX UNITS 4.75 5.0 5.25 V LB mixer disabled (LB_EN = 1) 189 241 LB mixer enabled (LB_EN = 0) 217 275 Reference to VCC, VCCLB, VCCLOGIC, VCCBIAS1, VCCBIAS2, VCCAMP mA LOGIC INPUTS (DATA, CS, CLK, LB_EN) Input High Voltage VIH 2.4 V Input Low Voltage VIL Input Current with Logic-High IIH 0.01 A Input Current with Logic-Low IIL 0.01 A 0.8 V AC ELECTRICAL CHARACTERISTICS (MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, PLO = -6dBm, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL RF Frequency (Note 2) Small-Signal Gain AV POUT Output Power Flatness 2 MAX MAX2059 1700 2200 fRF = 1850MHz, TC = +25C 8.0 10.9 TC = -40C to +25C -0.024 TC = +25C to +85C -0.032 PIN = 0dBm, fRF = 1850MHz, TC = +25C PIN = 0dBm OIP3 TYP 1200 8.0 10.9 1800MHz to 2000MHz -0.77 2000MHz to 2200MHz -2 Attenuation Range Output 3rd-Order Intercept Point MIN 700 All attenuation settings Gain Variation vs. Temperature Output Power CONDITIONS MAX2058 Two tones: fRF1 = 1850MHz, fRF2 = 1851MHz, POUT1 = POUT2 = +5dBm 13.3 UNITS MHz dB dB/C 13.3 dBm dB 56 dB 31.8 dBm _______________________________________________________________________________________ 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer (MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, PLO = -6dBm, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) (Note 1) PARAMETER Output -1dB Compression Point RMS Error Vector Magnitude SYMBOL OP1dB EVM POUT = +12dBm, EDGE modulation POUT = +12dBm, EDGE modulation (Note 4) Spurious Emissions in 30kHz Bandwidth Noise Figure CONDITIONS (Note 3) MIN TYP UNITS dBm 0.5 % 200kHz offset -39.1 400kHz offset -72.5 600kHz offset -83.1 1.2MHz offset -85.7 NF MAX 18.4 8.1 dBc dB Input Return Loss 50 source, minimum attenuation setting 19 dB Output Return Loss 50 load, minimum attenuation setting 24 dB Attenuator measured separately ZS = ZL = 50 5 dB Attenuator measured separately ZS = ZL = 50, two tones: fRF1 = 1850MHz, fRF2 = 1851MHz, PIN1 = PIN2 = +5dBm 40 dBm 28 dB 5-BIT DIGITAL ATTENUATORS Insertion Loss Input 3rd-Order Intercept Point IIP3 Control Range (Note 5) Attenuation Step Size Variation vs. Frequency 1800MHz to 2000MHz 0.17 2000MHz to 2200MHz 0.29 1800MHz to 2200MHz, TC = -40C to +25C 0.011 1800MHz to 2200MHz, TC = +25C to +85C 0.023 Attenuation Variation vs. Temperature Step Size dB dB/C 1 dB Relative Step Accuracy 1800MHz to 2000MHz, all states represented. For steps 0-23dB, accuracy is significantly improved. See Typical Operating Characterisitcs. +0.53 -0.97 dB Absolute Step Accuracy 1800MHz to 2000MHz, all states represented. For steps 0-23dB, accuracy is significantly improved. See Typical Operating Characterisitcs. -3.5 +0.3 dB Spurious Emissions in 300kHz Bandwidth No RF input, attenuator A stepped from 0 to 2dB, 7dB to 9dB, 15dB to 17dB, 0 to 31dB, 31dB to 0dB, with attenuator B at 0dB; attenuator B stepped from 0 to 2dB, 7dB to 9dB, 15dB to 17dB, 0 to 31dB, 31dB to 0dB, with attenuator A at 0dB (Note 6) -89 dBm _______________________________________________________________________________________ 3 MAX2059 AC ELECTRICAL CHARACTERISTICS (continued) MAX2059 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer AC ELECTRICAL CHARACTERISTICS (continued) (MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, PLO = -6dBm, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN From chip select transitioning high to the output settling to within 1dB of steady state output Switching Speed TYP MAX 0.3 UNITS s LOOPBACK MIXER LO Frequency fLO LO Input Power PLO (Note 2) 40 Output Power PIN = +5dBm, fRF = 1850MHz, TC = +25C (Note 7) Gain Accuracy PIN = +5dBm, TC = -40C to +85C Output 3rd-Order Intercept Point OIP3 Output Noise Floor ON/OFF Switching Time dBm -12.6 -9.6 dBm 2.2 2000MHz to 2200MHz 2.2 Two tones: fRF1 = 1850MHz, fRF2 = 1850.2MHz, PIN1 = PIN2 = +2dBm, TC = +25C dB 6.2 dBm PIN = +5dBm -137 dBc/Hz LB_EN enable time 0.12 LB_EN disable time 0.12 Mixer enabled, attenuators A and B both set to 31dB, PIN = +5dBm ATTEN_OUTB to LBOUT Isolation LO Port Return Loss MHz 0 1800MHz to 2000MHz LBOUT to ATTEN_OUTB Isolation Output Return Loss -15.4 100 -6 s 55 dB Mixer disabled, PIN = 0dBm 50 dB Mixer enabled, 50 load 20 Mixer disabled, 50 load 13 50 source 28 dB 38 MHz dB SERIAL PERIPHERAL INTERFACE (SPI) Maximum Clock Speed Data to Clock Setup Time tCS 1 ns Data to Clock Hold Time tCH 9 ns Clock to CS Setup Time tES 4 ns CS Positive Pulse Width tEW 18 ns CS Negative Pulse Width tEWN 24 ns Clock Pulse Width tCW 13 ns Note 1: All limits include external component losses. Output measurements taken at RFOUT or LBOUT ports of the Typical Application Circuit. Note 2: Operating outside this range is possible, but with degraded performance of some parameters. Note 3: Compression point characterized. It is advisable not to continuously operate the VGA RF input above +15dBm. Note 4: Input RF source contribution to spurious emissions (Agilent ESG 4435B, PSA E4443A): 200kHz = -39.2dBc, 400kHz = -73.5dBc, 600kHz = -83.2dBc, 1.2MHz = -85.7dBc Note 5: See the Applications Information section regarding effective attenuation range. Note 6: No SPI clock input applied. Note 7: Guaranteed by design and characterization. 4 _______________________________________________________________________________________ 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer GAIN vs. RF FREQUENCY* (MAXIMUM GAIN) 12 14 VCC = 5.25V 12 6 TC = +5C TC = +25C 8 VCC = 5.0V GAIN (dB) 8 5 10 GAIN (dB) GAIN (dB) 10 15 MAX2059 toc03 TC = -40C MAX12059 toc01 14 GAIN vs. RF FREQUENCY* ADJUSTING ATTEN A MAX2059 toc02 GAIN vs. RF FREQUENCY* (MAXIMUM GAIN) VCC = 4.75V 6 -5 TC = +85C 4 2 2 0 0 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) ATTEN A ABS ACCURACY vs. RF FREQUENCY ATTEN A REL ACCURACY vs. RF FREQUENCY 1 0.5 -0.5 -1.0 -15 16dB ATTEN -4 -1.5 STATES 24-31dB ATTEN ERROR (dB) 0 -1 -2 -3 -0.5 -1.0 -4 -1.5 STATES 24-31dB ATTEN 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 24dB ATTEN TC = +5C 34 TC = -40C 33 OUTPUT IP3 (dBm) 0.5 0 OUTPUT IP3 vs. RF FREQUENCY* 35 MAX2059 toc08 1 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) ATTEN B REL ACCURACY vs. RF FREQUENCY 1.0 MAX2059 toc07 2 -25 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) ATTEN B ABS ACCURACY vs. RF FREQUENCY 3 24dB ATTEN -2.0 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) -6 -5 32 31 30 29 TC = +25C 28 27 TC = +85C 26 -2.0 MAX2059 toc09 -3 GAIN (dB) ERROR (dB) -2 -5 15 0 -1 -6 GAIN vs. RF FREQUENCY* ADJUSTING ATTEN B 5 0 -5 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) MAX2059 toc05 1.0 MAX2059 toc04 2 ERROR (dB) -25 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 3 ERROR (dB) -15 MAX2059 toc06 4 25 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300 *Off-chip tuning can improve performance for applications beyond 2200MHz. Contact factory for details. _______________________________________________________________________________________ 5 MAX2059 Typical Operating Characteristics (MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) Typical Operating Characteristics (continued) (MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) 12 TC = +25C VCC = 5.25V 31 30 29 VCC = 4.75V 28 27 10 8 6 8 VCC = 4.75V, 5.0V, 5.25V TC = -40C 4 4 2200 2300 1700 OUTPUT P1dB vs. RF FREQUENCY* 20 TC = -40C 19 18 TC = +25C 16 2200 21 VCC = 5.25V 20 OUTPUT P1dB (dBm) TC = +5C 17 1900 2000 2100 RF FREQUENCY (MHz) 1700 2300 TC = +85C 15 5 19 VCC = 5.0V 18 17 VCC = 4.75V 16 2200 2300 INPUT RETURN LOSS vs. RF FREQUENCY ATTEN B VARIED 5 0dB 15 20 25 30 35 31dB 10 20 1dB 25 2dB 30 0dB 4dB 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) OUTPUT RETURN LOSS vs. RF FREQUENCY ATTEN A VARIED OUTPUT RETURN LOSS vs. RF FREQUENCY ATTEN B VARIED 1900 2000 2100 RF FREQUENCY (MHz) 5 OUTPUT RETURN LOSS (dB) 10 15 40 1800 0 MAX2059 toc16 0 2200 0 0dB 15 20 5 16dB, 31dB 15 20 25 25 2dB 4dB 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) *Off-chip tuning can improve performance for applications beyond 2200MHz. Contact factory for details. 6 0dB 30 30 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 8dB 1dB 10 31dB 45 2300 2300 1700 OUTPUT RETURN LOSS (dB) 1900 2000 2100 RF FREQUENCY (MHz) MAX2059 toc17 1800 2200 16dB, 31dB 8dB 10 35 14 1700 1900 2000 2100 RF FREQUENCY (MHz) 0 15 14 1800 INPUT RETURN LOSS vs. RF FREQUENCY ATTEN A VARIED OUTPUT P1dB vs. RF FREQUENCY* MAX2059 toc13 21 1800 MAX2059 toc15 1900 2000 2100 RF FREQUENCY (MHz) INPUT RETURN LOSS (dB) 1800 MAX2059 toc14 1700 MAX2059 toc18 25 OUTPUT P1dB (dBm) 10 6 TC = +5C 26 40 12 TC = +85C NOISE FIGURE (dB) 32 NOISE FIGURE (dB) OUTPUT IP3 (dBm) VCC = 5.0V 14 MAX2059 toc11 MAX2059 toc10 34 33 NOISE FIGURE vs. RF FREQUENCY* NOISE FIGURE vs. RF FREQUENCY* 14 MAX2059 toc12 OUTPUT IP3 vs. RF FREQUENCY* 35 INPUT RETURN LOSS (dB) MAX2059 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer _______________________________________________________________________________________ 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer MIXER CONV LOSS vs. RF FREQUENCY -70 ATTEN A OR B, 31dB 17.5 15.0 TC = -5C 2200 1700 15.0 7 TC = +5C 6 TC = +25C 5 2300 2200 2300 1700 7 6 5 PLO = -6dBm 3 MAX2059 toc21 VCC = 5.0V 5 TC = +5C 10 TC = -40C 15 20 25 30 TC = +25C 35 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300 MIXER OUTPUT RETURN LOSS vs. RF FREQUENCY (MIXER ENABLED) 0 MIXER OUTPUT RETURN LOSS (dB) 8 4 1900 2000 2100 RF FREQUENCY (MHz) 0 MIXER OUTPUT RETURN LOSS (dB) PLO = 0dBm 1800 MIXER OUTPUT RETURN LOSS vs. RF FREQUENCY (MIXER ENABLED) MAX2059 toc25 PLO = -3dBm 9 VCC = 4.75V 5 2 1700 MIXER OUTPUT IP3 vs. RF FREQUENCY 10 6 3 MAX2059 toc26 2200 7 4 TC = +85C 2 1900 2000 2100 RF FREQUENCY (MHz) 2300 8 3 10.0 2200 VCC = 5.25V 9 4 PLO = 0dBm 12.5 1900 2000 2100 RF FREQUENCY (MHz) MIXER OUTPUT IP3 vs. RF FREQUENCY MAX2059 toc23 TC = -40C 1800 10 OUTPUT IP3 (dBm) 17.5 VCC = 5.25V 15.0 2300 8 OUTPUT IP3 (dBm) CONVERSION LOSS (dB) 1900 2000 2100 RF FREQUENCY (MHz) 9 PLO = -6dBm 1800 17.5 MIXER OUTPUT IP3 vs. RF FREQUENCY 20.0 1700 20.0 10.0 1800 10 MAX2059 toc22 PLO = -3dBm 22.5 VCC = 4.75V 12.5 TC = +5C 1700 MIXER CONV LOSS vs. RF FREQUENCY 25.0 VCC = 5.0V 22.5 10.0 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) OUTPUT IP3 (dBm) MAX2059 toc20 20.0 12.5 -80 TC = +25C MAX2059 toc24 -60 MIXER CONV LOSS vs. RF FREQUENCY 25.0 CONVERSION LOSS (dB) ATTEN A AND B, 0dB -50 TC = +85C 22.5 CONVERSION LOSS (dB) -40 GAIN (dB) 25.0 MAX2059 toc19 -30 MAX2059 toc27 REVERSE GAIN vs. RF FREQUENCY ADJUSTING ATTEN A AND B 5 10 VCC = 4.75V, 5.0V, 5.25V 15 20 25 30 35 TC = +85C 40 2 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300 40 1700 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300 1700 1800 1900 2000 2100 2200 RF FREQUENCY (MHz) 2300 _______________________________________________________________________________________ 7 MAX2059 Typical Operating Characteristics (continued) (MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) Typical Operating Characteristics (continued) (MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) 10 15 20 TC = +85C TC = +25C 25 10 15 20 VCC = 4.75V, 5.0V, 5.25V MAX2059 toc30 5 LO RETURN LOSS (dB) TC = -40C 0 MAX2059 toc29 TC = +5C 0 MIXER OUTPUT RETURN LOSS (dB) 5 MAX2058 toc28 0 LO RETURN LOSS vs. LO FREQUENCY (MIXER ENABLED) MIXER OUTPUT RETURN LOSS vs. RF FREQUENCY (MIXER DISABLED) MIXER OUTPUT RETURN LOSS vs. RF FREQUENCY (MIXER DISABLED) MIXER OUTPUT RETURN LOSS (dB) 10 TC = +85C 20 TC = +25C 30 25 TC = -40C TC = +5C 30 1800 1900 2000 2100 RF FREQUENCY (MHz) 2200 2300 40 1700 1800 1900 2000 2100 2200 RF FREQUENCY (MHz) 2300 MAX2059 toc31 0 10 -10 GAIN (dB) LO RETURN LOSS (dB) 50 100 150 LO FREQUENCY (MHz) ATTEN A ONLY (NO PC BOARD LOSS) GAIN vs. RF FREQUENCY LO RETURN LOSS vs. LO FREQUENCY (MIXER ENABLED) 0 0 VCC = 4.75V, 5.0V, 5.25V 20 30 -20 -30 40 -40 0 50 100 150 LO FREQUENCY (MHz) 200 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) ATTEN A ONLY REL ACCURACY vs. RF FREQUENCY ATTEN A ONLY ABS ACCURACY vs. RF FREQUENCY 1.0 MAX2059 toc33 3 2 1 MAX2059 toc34 1700 MAX2059 toc32 30 0.5 0 ERROR (dB) 0 ERROR (dB) MAX2059 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer -1 -2 -3 -0.5 -1.0 24dB ATTEN -4 -1.5 -5 -6 STATES 24dB-31dB ATTEN 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 8 -2.0 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) _______________________________________________________________________________________ 200 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer ATTEN B ONLY ABS ACCURACY vs. RF FREQUENCY 2 1 0.5 0 ERROR (dB) ERROR (dB) -20 -2 -3 -30 -0.5 -1.0 24dB ATTEN -4 -6 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) RF FREQUENCY (MHz) SUPPLY CURRENT vs. SUPPLY VOLTAGE (MIXER DISABLED) SUPPLY CURRENT vs. SUPPLY VOLTAGE (MIXER ENABLED) 240 MAX2059 toc38 220 TC = +25C TC = +85C 200 190 180 TC = +25C 230 SUPPLY CURRENT (mA) TC = +85C -2.0 1500 1600 1700 1800 1900 2000 2100 2200 2300 1500 1600 1700 1800 1900 2000 2100 2200 2300 RF FREQUENCY (MHz) 210 -1.5 STATES 24dB-31dB ATTEN -5 -40 SUPPLY CURRENT (mA) GAIN (dB) 0 -1 MAX2059 toc39 -10 1.0 MAX2059 toc36 3 MAX2059 toc35 0 ATTEN B ONLY REL ACCURACY vs. RF FREQUENCY MAX2059 toc37 ATTEN B ONLY (NO PC BOARD LOSS) GAIN vs. RF FREQUENCY 220 210 200 190 170 160 4.750 TC = +5C 4.875 5.000 VCC (V) TC = +5C TC = -40C 5.125 5.250 180 4.750 4.875 5.000 VCC (V) TC = -40C 5.125 5.250 _______________________________________________________________________________________ 9 MAX2059 Typical Operating Characteristics (continued) (MAX2059 Typical Application Circuit, VCC = +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz fRF 2200MHz, 40MHz fLO 100MHz, TC = -40C to +85C. Typical values are at VCC = 5.0V, PIN = 0dBm, fRF = 1850MHz, fLO = 95MHz, fLBOUT = fRF - fLO, and TC = +25C, unless otherwise noted.) 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer MAX2059 Pin Description PIN NAME 1 LO+ 2 LO- FUNCTION Loopback Mixer Local Oscillator Positive Input Loopback Mixer Local Oscillator Negative Input Loopback Mixer Supply Voltage. +5V supply for the internal loopback mixer. Bypass to GND with 22pF and 0.1F capacitors as close as possible to the pin. 3 VCCLB 4 LBOUT Loopback Mixer RF Output. Internally matched to 50. AC-couple with a capacitor. 5 LB_EN Loopback Mixer Logic Input. Set to logic-low 0 to enable the mixer. Set to logic-high 1 to disable the mixer. 6 DATA SPI Digital Data Input 7 CLK SPI Clock Input 8 CS SPI Chip-Select Input 9 VCCLOGIC 10, 11, 13, 14, 16, 17, 19, 22, 24, 25, 26, 30, 32, 34, 35, 37, 38 GND 12 Ground ATTEN_OUTB Attenuator B Output. Internally matched to 50. Attenuator B Supply. +5V supply for attenuator B. Bypass to GND with 22pF and 0.01F capacitors as close as possible to the pin. 15 VCC 18 ATTEN_INB 20 RSET2 Output Amplifier Bias-Current-Setting Resistor. Sets the bias current for the output amplifier stage. Connect a 2k resistor to ground. 21 VCCBIAS2 Bias Circuit Supply Voltage. +5V supply for the internal bias circuitry. Bypass to GND with 1000pF and 0.1F capacitors as close as possible to the pin. 23 AMPOUT RF Amplifier Output. Internally matched to 50. 27 VCCAMP RF Amplifier Supply Voltage. +5V supply for the RF amplifier. Bypass to GND with 1000pF and 0.1F capacitors as close as possible to the pin. 28 AMPIN 29 VCCBIAS1 31 RSET1 33 10 Logic Supply Voltage. +5V supply for the internal logic circuitry. Bypass to GND with 22pF and 0.1F capacitors as close as possible to the pin. Attenuator B Input. Internally matched to 50. RF Amplifier Input. Internally matched to 50. Bias Circuit Supply Voltage. +5V supply for the internal bias circuitry. Bypass to GND with 1000pF and 0.1F capacitors as close as possible to the pin. Input Amplifier Bias-Current-Setting Resistor. Sets the bias current for the input amplifier stage. Connect a 1.2k resistor to ground. ATTEN_OUTA Attenuator A Output. Internally matched to 50. 36 VCC 39 ATTEN_INA 40 LBBIAS EP EP Attenuator A Supply Voltage. +5V supply for attenuator A. Bypass to GND with 22pF and 0.01F capacitors as close as possible to the pin. Attenuator A Input. Internally matched to 50. Loopback Mixer Bias-Current-Setting Resistor. Sets the bias current for the mixer. Connect a 2k resistor to ground. Exposed Ground Paddle. Solder the exposed paddle to GND using multiple vias. ______________________________________________________________________________________ 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer The MAX2059 high-linearity DVGA consists of two 5-bit digital attenuators, a fixed-gain two-stage driver amplifier, a loopback mixer, and a serial interface to control the attenuators. This high level of component integration makes the MAX2059 ideal for base-station transmitter applications. The MAX2059 is designed to operate in the 1700MHz to 2200MHz frequency range. The overall cascaded performance of the MAX2059 produces a typical 10.9dB gain, a +31.8dBm OIP3, an 18.4dBm OP1dB, and a total 56dB gain-control range. 5-Bit Attenuators The MAX2059 integrates two 5-bit digital attenuators to achieve a high dynamic range. Each attenuator is programmed with a 3-wire SPI interface, with a total effective range of 28dB and step size of 1dB. See the Applications Information section and Table 1 for attenuator programming details. The attenuators can be used for both static and dynamic power control. Table 1. Attenuator Programming ATTENUATOR A (5 MSBs) ATTENUATOR B (5 LSBs) Bit 9 = 16dB step Bit 4 = 16dB step Bit 8 = 8dB step Bit 3 = 8dB step Bit 7 = 4dB step Bit 2 = 4dB step Bit 6 = 2dB step Bit 1 = 2dB step Bit 5 = 1dB step Bit 0 = 1dB step Note: Due to finite circuit isolation, the total effective range of each attenuator is limited to 28dB. DATA MSB BIT 9 BIT 8 BIT 1 tCS tCH CLOCK BIT 0 LSB Driver Amplifier The MAX2059 includes a two-stage medium power amplifier with a fixed 18.5dB gain. The driver amplifier circuit is optimized for high linearity and medium output power capability for the 1800MHz to 2000MHz frequency range. The driver amplifier is intended to amplify a modulated signal and drive a high-power amplifier in base-station transmitters. In a typical application, the driver amplifier is cascaded in between the two digital attenuators. See the Typical Application Circuit. The two-stage amplifier stage can be disabled for applications where only the digital attenuators and/or loopback mixer are used. To disable the two-stage amplifier, ground or leave unconnected the amplifier supplies VCCBIAS2, VCCAMP, VCCBIAS1, and also the inputs for setting the amplifier bias currents RSET1, RSET2. This reduces the supply current by approximately 187mA under typical conditions. Loopback Mixer The MAX2059 loopback mixer uses a double-balanced active architecture designed to operate with a 1700MHz to 2200MHz RF frequency range, and a 40MHz to 100MHz LO frequency range. The RF port of the mixer is connected internally (with an on-chip switch) to the input of the first attenuator stage. The mixer's IF port is matched for a single-ended 50 impedance, while the LO port requires a differential input impedance of 100. The loopback mixer facilitates a self-diagnostic mode for cellular transceivers, whereby the Tx band signal at the input of the mixer can be translated up or down to the corresponding Rx band. This translated signal can then be fed back to the radio's receiver for complete Tx/Rx loop diagnostics. The loopback mixer is enabled and disabled with LB_EN. Set LB_EN to a logic-low 0 to enable the mixer, set LB_EN to a logic-high 1 to disable the mixer. The MAX2059 loopback mixer accepts a nominal -6dBm LO input power and exhibits a -12.6dBm output power and an output IP3 of 6.2dBm (PIN = +5dBm). Applications Information tCW SPI Interface and Attenuator Settings CS tEWN tES tEW NOTES: DATA ENTERED ON CLOCK RISING EDGE. ATTENUATOR STATE CHANGE ON CS RISING EDGE. Figure 1. SPI Timing Diagram The two 5-bit attenuators are programmed with the 3wire SPI/MICROWIRE-compatible serial interface using 10-bit words. Bit 9 of the 10-bit data is shifted in first, along with all remaining data bits, on the rising edge of the clock regardless of CS being high or low. Once all the data bits are shifted in, all will be sent to the attenuators on the rising edge of CS, thus changing the attenuation state. For standard SPI operation, pull CS low for the ______________________________________________________________________________________ 11 MAX2059 Detailed Description MAX2059 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer duration of a valid 10-bit data set (tEWN). This CS negative pulse width includes the setup time of the rising clock edge to CS transitioning high (tES). See Figure 1. The 5 MSBs of the 10-bit word program attenuator A, and the 5 LSBs of the 10-bit word program attenuator B. Each bit sets the attenuators to a corresponding attenuation level. For example, logic-low 0 for bit 5 and bit 0 of attenuator A and B, respectively, sets both attenuators at 1dB. 00000 configures both attenuators for maximum attenuation and 11111 sets for minimum attenuation. See Table 1 for programming details. from the EP. In addition, provide the EP with a lowinductance path to electrical ground. The EP MUST be soldered to a ground plane on the PC board, either directly or through an array of plated via holes. Table 2. Component List Referring to the Typical Application Circuit COMPONENT VALUE C1, C4, C10, C13, C16 0.1F Microwave capacitors (0603) C2, C3, C5, C8, C11, C14, C17, C24 22pF Microwave capacitors (0402) C6, C19 120pF Microwave capacitors (0402) C7, C18 0.01F Microwave capacitors (0402) External Bias Bias currents for the two-stage amplifier and the loopback mixer are set and optimized with external resistors. Resistor R1 (pin 31) sets the bias current for the input amplifier, R2 (pin 20) sets the bias current for the output amplifier, and R3 (pin 40) sets the bias for the loopback mixer. The external biasing resistor values can be increased for reduced current operation at the expense of performance. Contact the factory for details. DESCRIPTION C9, C12, C15 1000pF Microwave capacitors (0402) C20, C21, C22 0.75pF Microwave capacitors (0402) Board Layout C23 1pF The pin configuration of the MAX2059 has been optimized to facilitate a very compact physical layout of the device and its associated discrete components. The exposed paddle (EP) of the MAX2059's thin QFNEP package provides a low thermal-resistance path to the die. It is important that the PC board on which the MAX2059 is mounted be designed to conduct heat R1 1.2k 1% resistor (0402) R2, R3 2.0k 1% resistors (0402) R4 110 1% resistor (0402) TI 2:1 RF transformer (100:50) Mini-Circuits TC2-1T U1 -- MAX2059 MAX5873 DUAL DAC MAX4395 QUAD AMP MAX2021/MAX2022/MAX2023 ZERO-IF MODS/DEMODS Microwave capacitor (0402) MAX2058/MAX2059 RF DIGITAL VGAs I 12 90 0 31dB 18.5dB 31dB RFOUT Q 12 SPI LOGIC MAX9491 VCO + PLL 45, 80, OR 95MHz LO LOOPBACK Rx SPI OUT OFF CONTROL (FEEDS BACK INTO Rx CHAIN FRONT-END) Figure 2. Direct Conversion Transmitter for GSM/EDGE Base Stations 12 ______________________________________________________________________________________ 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer together with the MAX2021/MAX2022/MAX2023 directconversion modulators/demodulators, the MAX5873 dual-channel DAC, and the MAX4395 quad amplifier, form an ideal total transmitter lineup. This overall system is highly efficient and low cost, while maintaining high linearity and low-noise performance. The MAX2058/MAX2059 are designed to interface directly with Maxim's direct-conversion quadrature modulators and high-speed DACs to provide a complete solution for GSM/EDGE base-station transmitter applications. See Figure 2. The MAX2058/MAX2059, Typical Application Circuit VCC RF INPUT C17 C22 C18 40 LO+ R4 LOVCCLB VCC C1 C2 C3 39 38 1 36 37 35 LB_EN CLK CS VCCLOGIC C5 RSET1 C23 32 31 VCC 30 GND C15 2 29 3 28 VCCBIAS1 C16 C14 AMPIN MAX2059 LBOUT DATA 4 27 5 GND 25 6 SPI 7 24 23 8 9 VCCAMP 26 GND DRIVER AMP E.P. 5-BIT ATTENUATOR B 22 10 21 C13 GND GND AMPOUT C20 C11 GND VCCBIAS2 VCC C10 20 RSET2 19 GND 18 ATTEN_INB 17 GND 16 GND 15 VCC 14 GND 13 GND 12 ATTEN_OUTB 11 VCC C12 C9 GND C4 33 5-BIT ATTENUATOR A LBOUT VCC 34 R1 GND GND GND VCC GND GND ATTN_INA LBBIAS T1 LO INPUT ATTEN_OUTA C19 R3 R2 C24 C8 C6 C7 RF OUTPUT C21 ______________________________________________________________________________________ 13 MAX2059 Direct-Conversion Base-Station Transmitter 1700MHz to 2200MHz High-Linearity, SPI-Controlled DVGA with Integrated Loopback Mixer ATTEN_OUTA GND RSET1 37 GND 38 GND GND 39 VCC ATTEN_INA 40 GND LBBIAS MAX2059 Pin Configuration/Functional Diagram 36 35 34 33 32 31 5-BIT ATTENUATOR A LO+ 1 30 GND LO- 2 29 VCCBIAS1 VCCLB 3 28 AMPIN MAX2059 LBOUT 4 27 VCCAMP LB_EN 5 26 GND DRIVER AMP 25 GND DATA 6 CLK 7 24 GND SPI 23 AMPOUT CS 8 5-BIT ATTENUATOR B VCCLOGIC 9 22 GND GND 10 11 12 13 14 15 16 17 18 19 20 GND ATTEN_OUTB GND GND VCC GND GND ATTEN_INB GND RSET2 21 VCCBIAS2 Chip Information PROCESS: SiGe BiCMOS Package Information For the latest package outline information, go to www.maxim-ic.com/packages. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.