53/63S3281/A 53S3281B High Performance 4096 x 8 PROM TiW PROM Family cl Advanced Micro Devices FEATURES/BENEFITS e 35-ns maximum access time 32768-bit memory Rellable titanlum-tungsten fuses (TIW) with programming ylelds typically greater than 98% PNP inputs for fow Input current APPLICATIONS + Microprogram control store Microprocessor program store Look-up table e Character generator Code converter * Programmable Logic Element (PLE) with 12 Inputs, 8 Outputs and 4096 product terms GENERAL DESCRIPTION The 53/63S3281 is a high-speed 4Kx8 PROM which uses industry standard package and pin out. The family features low-input current PNP inputs, full Schottky clamping, and three-state outputs. The Tita- nium-Tungsten fuses store a logical low and are pro- grammed to the high state. Special on-chip circuitry and extra fuses provide preprogramming tests which assure high programming yields and high reliability. The 63 series is specified for operation over the com- mercial temperature and voltage range. The 53 series is specified for the military ranges. PROGRAMMING The 53/63S3281 PROM is programmed with the same programming algorithm as all other Advanced Micro Devices generic TIW PROMs. For details contact the factory. SELECTION GUIDE Memory Package Part Number Performance Size Organization) Output Pins Type 0C to +75C =| -55C to +125C CD 020 PD 020 Enhanced 63S281A 53S281A 2k 256x8 TS 20 CF 020 CL 020 Standard 638281 538281 PL 020 Publication # Rev. Amendment 10510 B 40 Issue Date: October 1988 PLE i a trademark of Advanced Micro Devices. 5-221 BLOCK DIAGRAM Dip Pinout ats 19 Ag 1OF 128 | NI 128X256 AB ROW PROGRAMMABLE nu DECODER [VY ARRAY ag 4 Usp ed ub 8 =H cathe > DOF a2 1P Ai 2| DECODER _MULTIPLEXER | vy oy ty oe a} 1OF2 TT tt Ao] oz Z MULTIPLEXER DECODER } i rea Ei 2 TL i 8 tah 13 [14 {15 |16]17 4312 01 fo Hoan tts Ina Las li | PIN CONFIGURATIONS 1312 02 IEEE ELE ee LeELel SF) AB. A? VCC Ag AG ONG 43 2 1 28 2726 aM aa A A Ao Ne 19 12 13 1415 16 17 18 or 3 NC Qs 1312 03 a2 GND 04 1312 04 Plastic Chip Carrler 45 AT VCC AD AB NC AB 413] 2/1 [28/27/26 5 6 7 8 4086x8 9 10 44 12 |13}14)15/16/17|18 a NC & Q2 GND O4 6 25) Ato 2a ey 23} A11 22] E2 211 NC 19] Q7 Leadiess Chip Carrier 5-222 59/63S9281/A 5393281B ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Rat- ings may cause permanent damage to the device. This is a Operating Programming siress rating only, and functional operation of the device at these or any other conditions above those indicated in the Pupely enue Veg wren DE VIO TV creer tev operational sections of this specitication is not implied. Expo- NPUt VOHAQGO oc cceeseeesteees HVS V 107 V cece ZV sure to Absolute Maximum Rating conditions for extended Input CUFTANE ........- seston -30 mA to +5 mA periods of time may affect reliability. Absolute Maximum Off-state output voltage ......-0.5 Vto 5.5 V oe 12V Ratings are for system design reference; parameters given Storage temperature .......-65C to +150C are not tested. OPERATING CONDITIONS Militaryt Commercial Symbol Parameter Unit Min. Nom. Max. Min. Nom. Max. Voc Supply voltage 45 5 55 4.75 5 .25 V T, Operating temperature* ~55 125 0 75 C * This is defined as the instant-on case temperature. t Military burn-in is in accordance with the current revision of MIL-STD-883, Test Method 1015, Conditions A through E. Test conditions are selected at AMD's option. Electrical Characteristics Over Operating Conditions. For APL products, Group A, Subgroups 1, 2, 3 are tested unless otherwise noted. Symbol Parameter Test Condition Min | Typt | Max | Unit Vie Low-level input voltage** 0.8 Vv Vin High-level input voitage** 2 v Vic Input clamp voltage Voc = MIN | =-18 mA 15 ] V I Low-level input current Veg = MAX V=0.4V 0.25 | mA ha High-level input current Voc s MAX V, = Veg MAX 40 | yA Com 0.45 Vo. | Low-level output voltage Veg = MIN I, = 16 mA Vv Mil 05 Com lon 73.2 mA Vo, | High-level output voltage Voc = MIN 2.4 Vv Mil lon = -2 mA loz V5 =0.4V 40 Off-state output current Veg = MAX pA loz Vo=2.4V 40 los Output short-circuit current* | V..=5V Vo=20V -20 -90 | mA loc Supply current Veg = MAX. Allinputs grounded. All outputs open. 150 190 | mA * Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second. "V,, and V,,, are input conditions of output tests and are not themselves directly tested. V, and V,,, are absolute voltages with respect to device ground and include afl overshoots due to system and/or tester noise. Do not attempt to test these values without suitable equipment. 3/63S3281/A 5383281B 5-223 Switching Characteristics Over Operating Conditions (See standard test load). For APL products, Group A, Subgroups 9, 10, 11 are tested unless otherwise noted.** t,, and t,, (ns) Operating t,, (ns) Enable Access time Conditions Device Type Address Access Time Recovery time Unit Typt Max Typt Max 63S3281A 26 35 18 30 Commercial 6383281 26 45 18 30 3S3281B 26 40 18 35 ns Military 53S3281A 26 50 18 35 3S3281 26 60 18 35 t Typicals at 5.0 VV... and 25C T,. tt Subgroups 7 and 8 apply to functional tests. ~oo Si Ry 200 OUTPUT cL Ra T 600 1312 07 = = Figure 1. Switching Test Load -224 53/63S3281/A 53S3281B WAVEFORM INPUTS DON'T CARE: CHANGE PERMITTED NOT APPLICABLE MUST BE STEADY OUTPUTS CHANGING: STATE UNKNOWN CENTER LINE IS HIGH IMPEDANCE STATE WILL BE STEADY 1312 08 Figure 2. Definition of Timing Diagram A E bo tar tea tea > o RAIN ye AAWWAVVAVAAV\ LL Vo, + 05V NOTES: 1. INPUT PULSE AMPLITUDE OV TO3OV. 2. INPUT RISE AND FALL TIMES 2-5 ns FROM 0.8 V TO 2.0 V. 3. INPUT ACCESS MEASURED AT THE 1.5 V LEVEL. 4. tag lS TESTED WITH SWITCH S, CLOSED. C, = 30 pF AND MEASURED AT 1.5 V OUTPUT LEVEL. 5 te, lS MEASURED AT THE 1.5 V OUTPUT LEVEL WITH C, = 30 pF. Sy (S OPEN FOR HIGH IMPEDANCE TO 1" TEST, AND CLOSED FOR HIGH IMPEDANCE 0 TEST. ten IS TESTED WITH C, =5 pF. Sy IS OPEN FOR 1 TO HIGH IMPEDANCE TEST, MEASURED AT Voy; - 0.5 V OUTPUT LEVEL; $118 CLOSED FOR "0" TO HIGH IMPEDANCE TEST, MEASURED AT Vqy + 0.5 V OUTPUT LEVEL. 41312 09 Figure 3. Definition of Waveforms 53/63S3281/A 53832818 5-225