Delay Units Digitally Programmable senies: PDU-1016H (4-Bit) ECL Interfaced Features: m Low propagation delay @ Input & output ECL buffered g 4-BiIT ECL programmable delay line w Output same polarity of input a Completely interfaced mg Compact & low profile TRUTH TABLE Specifications: Delay variation: Monotonic in one direction. Programmed delay tolerance: + 5% or 1 ns whichever is greater. Inherent delay (Too): 5.5 ns + 1 ns for PDU-1016H-1 thru -5. Greater for rest of part numbers. Propagation delay: Address to output (Tsus) = 3.6 ns typ. Enable to output (Tsue) 1.7 ns typ. Power dissipation: 615 mw typ. Supply voltage: 5 Vde = 5%. Operating Temperature: 0-70C. Temperature Coefficient: 100 PPM/C. DC parameters: See ECL-10KH Logic Table on Page 6. Test Conditions a Input pulse-width: 2>150% of Max. delay. @ Input pulse spacing: 23 times of Max delay. B Input pulse voltage: ECL logic. m Measurements taken @ Ta= 25C, VeeE= 5V. Address (BILNO.) ep Enabte ero Delay Part No. (Eo) 4 Ke 2 Ta An Dat PDU-1016H-.5 0 0 0 0 O Ty PDU-1016H-1 o. Oo 0 0 qo T.. PDU-1016H-2 0 0 0 PoP o. I, PDU-1016H-3 rf tee PDU-1016H-4 0 0 O bite pope doth 4 PDU-1016H-5 0 0. 1 7 0 | 8 I PDU-1016H-6 ae 8 ee ee PDU-1016H-8 PP ae Be PDU-1016H-10 o: 0 1 1 f 0 fT. PDU-1016H-12 OF 8 hoppy td Le PDU-1016H-15 0 1 0 Oo | 0 Ts fp = PDU-1016H-20 0 1 oO Pee bea Ty PDU-1016H-25 0 { 0: { eo PDU-1016H-30 6 1 0 1 1 Wy : PDU-1016H-35 : se . PDU-1016H-40 0 | ae 0 Tae PDU-1016H-45 e 4 1 8. } pe PDU-1016H-50 o- { 4 we 3 Me PDU-1016H-60 : ee es . PDU-1016H-80 0 1 op 4 j Tis : 1 6 6 | 8 6 PDU-1016H-100 0 = Logic 0 1 = Logic 1 @ = Don't care. T, = Reference or inherent delay of unit. T,+T,, = Multiplier of incremental delay. 3 Mt. Prospect Avenue, Clifton, New Jersey 07013 @ (973) 773-2299 m Fax (973) 773-9672 41