ww New product @ FLASH MEMORIES Continues) Under development <Boot Block*4 Smart Voltage Flash Memory> Access Read current) Standby : . Operating , Bit Block time Supply __ |(mA) MAX.| current Capacity contiguraion) configuration Model No. (ns)MAX.) voltage j{f=8MHz,) (WA) ome Package Veo =5 Vy Veo = 5 V)| MAX. a 4kx2 (boot), |Top | * LH28F400BGE/N/B-TL8S/TL12_ | 85/120) Smart 50 | 100 | Oto 70 | 48TSOP(I)\"1/44SOP/48FBGA(CSP)*? 4k x 6 boot | * LH2BF400RGHE/B-TL85/TL12 | 85/120] voltage" | 50 | 100 |40 to 85] 48TSOP(I)"1/48FBGA(CSP)*9 4M ) X 16 | (parameter), (2.7 V read, 32k x 7 |Botlom| * LH28F400BGE/NIB-BL8S/BL12 | 85/120 |write. erase| 50 | 100 | Oto 70 | 48TSOP(I)*1/44SOP/48FBGA(CSP)*9 (main) boot | %& LH28F400BGHE/B-BL85/BL12 | 85/120) available) | 50 | 100 |-40 to 85] 48TSOP(I)"1/48FBGA(CSP)*s 4kx2 (boot), [Top | ** LH28FB00BGE/AINB-TLB5/TL12 | 85/120| Smart 50 | 100 | Oto 70 | 48TSOP()*/48TSOP(\}"2/44SOP#/48FBGA(CSP)"10 am | x16 lomanete boot | LH2BFS00BGHE/RYB-TLBS/TL12 | 85/120 ( yorasen 50 | 100 |40 to 85| 48TSOP(I)"1/48TSOP(\)"2/48FBGA(CSP)*10 32k x 15 |Bottom| * LH28FB00BGE/RINB-BLES/BL12 | 85/120 |write, erase| 50 | 100 | 0 to 70. | 48TSOP())*/48TSOP())"2/44SOP+/49FBGA(CSP}*10 (main) boot | sx |H28F800BGHE/R/B-BL85/BL12 | 85/120] available) | 50 | 100 |-40 to 85) 48TSOP(|}*1/48TSOP(I)*2/48FBGA(CSP)"10 Top | * LH28F160BGE/R/B-TTL1O/TTL 12} 1007120" Smart 35 20_| 50 _| 01070 48TSOP(I)*1/48TSOP(()*2/60F BGA(CSP) boot | * LH28FI60BGHERB-TTLIOTTL12 [100720|(0.7 V read,| 257 | 50 |40 to 85] 48TSOP(I)"1/48TSOP(I)*2/60FBGA(CSP) 4k x 2 (boo), |Bottom|* LH28F160BGE/R/B-BTLIO/BTL12 1007/1207 Write, erase) 25*7 | 50 | Oto 70 | 48TSOP(|)"/48TSOP(I)"2/60FBGA(CSP) 4k x 6 [boot Ix LH2BF60BGHERIE-BTLIOBTLI horiam 2Y8"@5!) [Oe 1c [ap to a5] 48TSOP(1)"/48TSOP(I)2/60FBGA(CSP) ( (! ( (l ) ) } 16M | X 16 | (parameter), 4 *2 Smart 3L*6 /48TSOP(|)*2/60F BGA(CSP) ) ) 32k x 31 [Top P* LH2BFI60BGERB-TTLLIZTTLLIS 120608 208 | 20 | oto 70 | 48TSOPII (main) [boot Fe (H2eF 160BGHEAB-TTLLIQTTLL1S [owsrtl(a 4 V read,, 207 | 20 |-40 to 85] 48TSOP()"/48TSOP(I)"/60FBGA(CSP) Rotton|-* LH2BFISOBGERIB-BTLLIBTLLIS fvaiere|write, erase[ a9*e | 20 | Oto 70 | 48TSOP(I)"/48TSOP( boot | LH28F 160BGHEIRIB-BTLLI2BTLL1 [ose V2"4ble) 1 Normalbend *2 Reverse bend *3 Smart voltage: Power supply is made an arbitrary selection among Vcc = 3.3 V, Vpp = 3.3 V/Vcc = 3.3 V, Vpp =5 Vcc = 3.3 V, Vpp = 12 V/ Voc = 5 V, Vpp = 5 Vcc = 5 V, Vpp = 12 V without using control signals. *4 Boot block architecture: Well-balanced block architecture to store system program. This architecture consists of small size blocks (4k-word) for boot code storage and parameter storage and target size symmetric blocks (32k-word) for main code storage. 5 Smart 3: Power supply is made an arbitrary selection between Vcc = 2.7 to 3.6 V, Vpp = 2.7 to3.6 Vcc = 2.7 to 3.6 V, Vpp = 12 V without using control signals. *6 Smart 3L: Power supply is made an arbitrary selection between Vcc = 2.4 to 3.0 V, Vpp = 2.4 to 3.0 ViVcc = 2.4 to 3.0 V, Vpp = 12 V without using control signals. "7 Mec =3.3V *8 Voc =2.7V *9Nominal dimensions:6x 8mm *10 Nominal dimensions: 8 x 8 mm ) ) )*2/60FBGA(CSP) 208 | 20 |-40 to 85] 48TSOP(I)*1/48TSOP(I)*2/60F BGA(CSP) <Fast Programming Flash Memory (with Fast Write Function*3)> | Access 5 Read |Standby| qseraing Bit Block time up} current | current Capacty | configuration [configuration Model No. (ns) MAX. voltae Wy lima) MAX, (WA) ena Package (Veo = 3.3) (f= 8MHz}| MAX. A LH2BF160S3D/T/RYNS/B-L10/L13 |100/130] Smart voltage 34 0 to 70 | 64SDIPIS8TSOP(I)"/5ETSOP()"2#56SSOP/64FBGA (CSP) (2.7 V read, write,| 25 100 tem | x8/x16! 64KB * LH26F1G0SSHD/T/RINS/B-L10/L13_|100/130] erase available) ~40 to 85] 64SDIP/S6TSOP(\)"'/S6TSOP(|)"/S6SSOP/E4FBGA(CSP) | * LH28F160SSD/T/R/NSIB-L70/L10 | 70/100 smart 55 50 100 (22 70 | 64SDIP/S6TSOP(I|*V56TSOP(|) 256SSOP/64FBGAICSP) | * LH28F160S5HD/T/A/NS/B-L70/L10 | 70/100 ~40 to 85| 64SDIP/S8TSOP(|}*/S6TSOP(I) %S6SSOP/64FBGA(CSP) | * LH28F320S3NS/B-L11/L14 |110/140 7 Vai wit 95 100 0 to 70 | 56SSOP/80FBGA(CSP) gem |xa/x16! 64kB ie LH28F320S3HNS/B-L11/L14 |110/140} erase available). ~40 to 85| 56SSOP/80FBGA(CSP) }* LH2BF320S5NS/B-L90/L12 |908/120" Smart 53 50 too (2 70 | 58SSOP/80FBGA(CSP) & LH28F320S5HNS/B-L90/L12 |904/120"8 ~40 to 85| SESSOP/80FBGA(CSP) *1 Normal bend *2 Reverse bend *3 Fast write function: Available with built-in two pages of 32-byte page buffer *4 Smart 3: Power supply is made an arbitrary selection between Vcc = 3 V, Vpp = 3 V/Vcc = 3 V, Vpp = 5 V without using control signals. *5 Smart 5: Voc = 5 V, Vpp = 5V *6Vec =5V <Dual Work*2 Flash Memory> Access 5 Read |Standby Operating ; Bit Block time upply current | current Capacity configuration |configuration| Model No. (ns) MAX.) voltage (V) |(mA) MAX.) (pA) emg Package (Voc = 5 V) (f=8MHz)) MAX. ! Vee = 2.9 to 3.3V, 8M x8 64kB | * LH28FOO8SCHSD-ZL 150 oR =291033V} 12 100 |~40to 85) 48TSOP(I)*1*3 V read available) 1em| x16 F 32K | x1 H28F160SGED-L10 100 |,Smattvottage! | 50 | 100 |-s0toa5| 48TSOP())"1 words (2.7 V read available} 32M | x 8/x 16 Ab4KB * LH28F320S3TD-L10 100 Smart 3*5 30 100 |Oto 70] S6TSOP(I)"1 *4 Normal bend 2 Dual work: Write/erase and read can be operated simultaneously. Impossible to perform read from both banks at a time. *3 Nominal dimensions:10 x 14mm, pin pitch: 0.4 mm *4 Smart voltage: Power supply is made an arbitrary selection among Vcc =3.3 V, Vop =3.3 V/ Vcc = 3.3V, Vop = 5 V/ Veco =3.3V. Vop =12 V/ Vec = 5V, Vpp = V/ Vcc = 5V, Vpp = 12 V without using contro! signals. *5 Smart 3: Power supply is made an arbitrary selection between Vcc = 3.3 V (2.7 V MIN.), Vpp = 3.3 V (2.7 V MIN.)/Vcc = 3.3 V (2.7 V MIN.), Vpp = 5 V without using control signals.