15 kV ESD Protected, 2.7 V to 3.6 V Serial
Port Transceivers with Green Idle
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E1
Rev. J Document Feedback
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FEATURES
Green Idle power-saving mode
Single 2.7 V to 3.6 V power supply
Operates with 3 V logic
0.1 µF to 1 µF charge pump capacitors
Low EMI
Low power shutdown: 20 nA
Full RS-232 compliance
460 kb/s data rate
One receiver active in shutdown
(ADM3307E/ADM3311E/ADM3312E/ADM3315E)
Two receivers active in shutdown (ADM3310E)
ESD >15 kV IEC 1000-4-2 on RS-232 I/Os
ESD >15 kV IEC 1000-4-2 on CMOS and RS-232 I/Os
(ADM3307E)
Qualified for automotive applications
APPLICATIONS
Mobile phone handsets/data cables
Laptop and notebook computers
Printers
Peripherals
Modems
PDAs/Hand-Held Devices/Palmtop Computers
FUNCTIONAL BLOCK DIAGRAMS
VCC
R1OUT
T5IN
T4IN
T1IN T1OUT
T3IN
T2IN
ADM3307E
SD
V+
C1+
C1–
C2–
V–
C3+
VCC
GND
C2
C3–
C2+
C1
0.1µF
0.1µF
R2OUT
R3OUT
T2OUT
T3OUT
T4OUT
T5OUT
R1IN
R2IN
R3IN
0.1µF
CERAMIC
10µF
T
ANTALUM
+
C4
0.1µF
SHUTDOWN
INPUT
ENABLE
INPUT
CMOS
INPUTS1
CMOS
OUTPUTS
EN
VOLTAGE
TRIPLER/
INVERTER
+3V TO ±9V C3
0.1µF
C5
0.1µF
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS2
T1
T3
T2
T5
T4
R3
R1
R2
1INTERNAL400kΩPULL-UP RESISTOR ON EACH CMOS INPUT.
2INTERNAL5kΩPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
02915-001
Figure 1. ADM3307E Functional Block Diagram
V
CC
T1
IN
T1
OUT
T3
IN
T2
IN
ADM3310E/
ADM3311E
C1+
V+
C3–
C2–
V
CC
C1–
GND
C2+
SD
V–
C3+
C1
0.1µF
T2
OUT
T3
OUT
0.1µF
CERAMIC
10µF
TANTALUM
+
C4
0.1µF
C2
0.1µF
ENABLE
INPUT SHUTDOWN
INPUT
CMOS
INPUTS
1
CMOS
OUTPUTS
EN
VOLTAGE
TRIPLER/
INVERTER
+3V TO ±9V
C3
0.1µF
C5
0.1µF
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS
2
R1
OUT
R1
IN
R1
R3
OUT
R3
IN
R3
R2
OUT
R2
IN
R2
R5
OUT
R5
IN
R5
R4
OUT
R4
IN
R4
T3
T1
T2
1
INTERNAL400kΩPULL-UP RESISTOR ON EACH CMOS INPUT.
2
INTERNAL5kΩPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
02915-002
V
CC
T1
IN
T1
OUT
T3
IN
T2
IN
ADM3312E/
ADM3315E
C1+
V+
C3–
C2–
V
CC
C1–
GND
C2+
SD
V–
C3+
C1
0.1µF
T2
OUT
T3
OUT
0.1µF
CERAMIC
10µF
TANTALUM
+
C4
0.1µF
C2
0.1µF
ENABLE
INPUT SHUTDOWN
INPUT
CMOS
INPUTS
1
EN
VOLTAGE
TRIPLER/
INVERTER
+3V TO ±9V
C3
0.1µF
C5
0.1µF
CMOS
OUTPUTS
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS
2
R1
OUT
R1
IN
R3
OUT
R3
IN
R2
OUT
R2
IN
R1
R3
R2
T3
T1
T2
1
INTERNAL400kΩPULL-UP RESISTOR ON EACH CMOS INPUT.
2
INTERNAL5kΩ(22kΩFOR ADM3315E) PULL-DOWN RESISTOR ON
EACH RS-232 INPUT.
02915-003
Figure 2. ADM3310E/ADM3311E Functional Block Diagram Figure 3. ADM3312E/ADM3315E Functional Block Diagram
1 Protected by U.S. Patent No. 5,606,491.
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
General Description ......................................................................... 3
Specifications ..................................................................................... 4
Absolute Maximum Ratings ............................................................ 6
ESD Caution .................................................................................. 6
Product Selection Guide .................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ........................................... 10
Circuit Description......................................................................... 13
Enable and Shutdown ................................................................ 15
Layout and Supply Decoupling ................................................ 15
ESD/EFT Transient Protection Scheme .................................. 15
ESD Testing (IEC 1000-4-2) ..................................................... 16
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 20
Automotive Products ................................................................. 20
REVISION HISTORY
6/15—Rev. I to Rev. J
Changed ADM33xxE to ADM3307E/ADM3310E/ADM3311E/
ADM3312E/ADM3315E .............................................. Throughout
Changes to ESD Testing (IEC 1000-4-2) Section ....................... 16
Changes to Figure 34 ...................................................................... 17
Changes to Ordering Guide .......................................................... 20
3/13—Rev. H to Rev. I
Changed CP-32-2 Package to CP-32-7 Package, Throughout .... 1
Changes to Figure 4, Figure 6, Figure 8 ......................................... 8
Changes to Figure 25 ...................................................................... 13
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 20
Added Automotive Products Section........................................... 20
1/06—Rev. G to Rev. H
Updated Formatting ................................................................. Universal
Updated Outline Dimensions .............................................................. 18
Changes to Ordering Guide ................................................................. 20
4/04—Rev. F to Rev. G
Changes to Ordering Guide ................................................................... 5
Updated Outline Dimensions .............................................................. 15
8/02—Rev. E to Rev. F
ADM3307E (REV. 0), ADM3311E (REV. E), and ADM3312E
( R E V. A) Data Sheets Merged into REV. G of ADM33xxE Universal
ADM3310E (REV. PrA Now Prelims) and ADM3315E
(REV. PrA) Added .................................................................... Universal
Edits to Features ....................................................................................... 1
Edits to Applications ............................................................................... 1
Edits to General Description .................................................................. 1
Edits to Functional Block Diagrams ..................................................... 2
Edits to Specifications ...............................................................................
Edits to Absolute Maximum Ratings .................................................... 4
ADM33xx Product Selection Guide Added ......................................... 5
Added ADM3307E, ADM3310E, ADM3312E, and
ADM3315E Pin Configurations ............................................................ 6
Edits to Pin Function Descriptions ....................................................... 7
Added ADM3307E, ADM3310E, ADM3312E, and
ADM3315E Truth Tables ....................................................................... 7
Edits to TPCs 1–14 .................................................................................. 8
TPCs 15–18 Deleted .............................................................................. 10
Edits to Circuit Description Section ................................................... 11
Edits to Charge Pump DC-to-DC Voltage Converter Section ........ 11
Edits to How Does It Work Section .................................................... 11
Edits to Green Idle vs. Shutdown Section .......................................... 12
Edits to Doesn’t It Increase Supply Voltage Ripple? Section ............ 12
Edits to What About Electromagnetic Compatibility? Section ....... 12
Edits to Transmitter (Driver) Section ................................................. 12
Edits to Receiver Section ...................................................................... 12
Edits to Enable and Shutdown Section ............................................... 12
Edits to High Baud Rate Section.......................................................... 13
Edits to ESD/EFT Transient Protection Scheme ............................... 13
Added Figures 8a and 8b and Renumbered the Figures
that Followed .......................................................................................... 13
Edits to ESD Testing (IEC 1000-4-2) Section .................................... 14
Edits to Figure 9 ..................................................................................... 14
Deleted Table II and Table III and replaced them with Table V ..... 14
Added RU-24 Package Outline Updated CP-32, RS-28
and RU-28 ............................................................................................... 15
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
Rev. J | Page 3 of 20
GENERAL DESCRIPTION
The ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E line of driver/receiver products is designed to fully
meet the EIA-232 standard while operating with a single 2.7 V
to 3.6 V power supply. The devices feature an on-board charge
pump dc-to-dc converter, eliminating the need for dual power
supplies. This dc-to-dc converter contains a voltage tripler and a
voltage inverter that internally generates positive and negative
supplies from the input 3 V power supply. The dc-to-dc
converter operates in Green Idle™ mode, whereby the charge
pump oscillator is gated on and off to maintain the output
voltage at ±7.25 V under varying load conditions. This
minimizes the power consumption and makes these products
ideal for battery-powered portable devices.
The ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E devices are suitable for operation in harsh electrical
environments and contain ESD protection up to ±15 kV on
their RS-232 lines (ADM3310E, ADM3311E, ADM3312E, and
ADM3315E). The ADM3307E contains ESD protection up to
±15 kV on all I/O lines (CMOS, RS-232, EN, and SD).
A shutdown facility that reduces the power consumption to 66 nW
is also provided. While in shutdown, one receiver remains active
(two receivers active with ADM3310E), thereby allowing monitor-
ing of peripheral devices. This feature allows the device to be shut
down until a peripheral device begins communication.
The active receiver can alert the processor, which can then take
the ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E device out of the shutdown mode.
The ADM3307E contains five drivers and three receivers and is
intended for mobile phone data lump cables and portable
computing applications.
The ADM3311E contains three drivers and five receivers and is
intended for serial port applications on notebook/laptop
computers.
The ADM3310E is a low current version of the ADM3311E.
This device also allows two receivers to be active in shutdown
mode.
The ADM3312E contains three drivers and three receivers and
is intended for serial port applications, PDAs, mobile phone
data lump cables, and other hand-held devices.
The ADM3315E is a low current version of the ADM3312E,
with a 22 kΩ receiver input resistance that reduces the drive
requirements of the DTE. Its main applications are PDAs,
palmtop computers, and mobile phone data lump cables.
The ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E devices are fabricated using CMOS technology for
minimal power consumption. All parts feature a high level of
overvoltage protection and latch-up immunity.
All ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E devices are available in a 32-lead 5 mm × 5 mm
LFCSP_WQ and in a TSSOP (ADM3307E, ADM3310E, and
ADM3311E in a 28-lead TSSOP; ADM3312E and ADM3315E
in a 24-lead TSSOP). The ADM3311E also comes in a 28-lead
SSOP.
The ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E devices are ruggedized RS-232 line
drivers/receivers that operate from a single supply of 2.7 V to
3.6 V. Step-up voltage converters coupled with level shifting
transmitters and receivers allow RS-232 levels to be developed
while operating from a single supply. Features include low
power consumption, Green Idle operation, high transmission
rates, and compatibility with the EU directive on electromag-
netic compatibility. This EM compatibility directive includes
protection against radiated and conducted interference,
including high levels of electrostatic discharge.
All RS-232 (and CMOS, SD, and EN for ADM3307E) inputs and
outputs are protected against electrostatic discharges (up to
±15 kV). This ensures compliance with IEC 1000-4-2
requirements.
These devices are ideally suited for operation in electrically
harsh environments or where RS-232 cables are frequently
being plugged/unplugged. They are also immune to high RF
field strengths without special shielding precautions.
Emissions are also controlled to within very strict limits. CMOS
technology is used to keep the power dissipation to an absolute
minimum, allowing maximum battery life in portable
applications.
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 4 of 20
SPECIFICATIONS
VCC = 2.7 V to 3.6 V, C1 to C5 = 0.1 µF. All specifications TMIN to TMAX, unless otherwise noted.
Table 1
Parameter Min Typ Max Unit Test Conditions/Comments
Operating Voltage Range 2.7 3.3 3.6 V
V
CC
Power Supply Current
ADM3307E 0.75 1.5 mA V
CC
= 3.0 V to 3.6 V; no load
0.75 4.5 mA V
CC
= 2.7 V to 3.6 V; no load
ADM3311E, ADM3312E 0.45 1 mA No load; V
CC
= 3.0 V to 3.6 V; T
A
= 0°C to 85°C
0.45 4.5 mA No load; V
CC
= 2.7 V to 3.6 V; T
A
= − 40°C to +85°C
ADM3310E, ADM3315E
0.35
0.85
mA
VCC = 2.7 V to 3.6 V; no load
ADM3310E, ADM3311E, ADM3312E,
ADM3315E
35 mA RL = 3 kΩ to GND on all TOUTS
Shutdown Supply Current 0.02 1 µA
Input Pull-Up Current 10 25 µA T
IN
= GND
Input Leakage Current, SD, EN 0.02 ±1 µA
Input Logic Threshold Low, VINL 0.8 V T
IN
, EN, SHDN
0.4 V T
IN
, EN, SHDN; V
CC
= 2.7 V
Input Logic Threshold High, VINH 2.0 V T
IN
, EN, SHDN
CMOS Output Voltage Low, V
OL
0.4 V I
OUT
= 1.6 mA
CMOS Output Voltage High, V
OH
V
− 0.6 V I
OUT
= −200 µA
CMOS Output Leakage Current
ADM3307E 0.04 ±1 µA EN = V
CC
, 0 V < R
OUT
< V
CC
ADM3310E, ADM3311E 0.05 ±5 µA EN = V
CC
, 0 V < R
OUT
< V
CC
ADM3312E, ADM3315E
Charge Pump Output Voltage, V+ +7.25 V No load
ADM3307E, ADM3311E, ADM3312E
Charge Pump Output Voltage, V− −7.25 V No load
ADM3307E, ADM3311E, ADM3312E
Charge Pump Output Voltage, V+ +6.5 V No load
ADM3310E, ADM3315E
Charge Pump Output Voltage, V− −6.5 V No load
ADM3310E, ADM3315E
EIA-232 Input Voltage Range −25 +25 V
EIA-232 Input Threshold Low 0.4 1.3 V
EIA-232 Input Threshold High 2.0 2.4 V
EIA-232 Input Hysteresis 0.14 V
EIA-232 Input Resistance
ADM3307E, ADM3310E, ADM3311E,
ADM3312E
3 5 7 kΩ
ADM3315E 14 22 31 kΩ
Output Voltage Swing
ADM3310E, ADM3315E ±5.0 ±5.5 V All transmitter outputs loaded with 3 kΩ to ground
ADM3307E, ADM3311E, ADM3312E ±5.0 ±6.4 V V
CC
= 3.0 V
±5.5 V V
CC
= 2.7 V
All transmitter outputs loaded with 3 kΩ to ground
Transmitter Output Resistance 300 Ω V
CC
= 0 V, V
OUT
= ±2 V
RS-232 Output Short-Circuit Current ±15 ±60 mA
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
Rev. J | Page 5 of 20
Parameter Min Typ Max Unit Test Conditions/Comments
Maximum Data Rate
ADM3307E 250 720 kbps R
L
= 3 kΩ to 7 kΩ, C
L
= 50 pF to 1000 pF, V
CC
= 2.7 V
460 920 kbps R
L
= 3 kΩ to 7 kΩ, C
L
= 50 pF to 1000 pF, V
CC
= 3.0 V
ADM3310E, ADM3311E, ADM3312E,
ADM3315E
250 460 kbps RL = 3 kΩ to 7 kΩ, CL = 50 pF to 1000 pF, VCC = 3.0 V
Receiver Propagation Delay, T
PHL
, T
PLH
0.3 µs C
L
= 150 pF
0.17 1 µs C
L
= 150 pF; ADM3307E only
Receiver Output Enable Time, t
ER
100 ns
Receiver Output Disable Time, t
DR
300 ns
Transmitter Propagation Delay, T
PHL
, T
PLH
500 ns R
L
= 3 kΩ, C
L
= 1000 pF
Transition Region Slew Rate
18
V/µs
RL = 3 kΩ, CL = 50 pF to 1000 pF1
ESD PROTECTION (I/O PINS) ±15 kV Human body model
±15 kV IEC 1000-4-2 air discharge
±8 kV IEC 1000-4-2 contact discharge
2
1 Measured at +3 V to −3 V or −3 V to +3 V.
2 Includes CMOS I/O, SD, and EN for ADM3307E.
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2
Parameter Rating
V
CC
−0.3 V to +4 V
V+ (V
CC
− 0.3 V) to +9 V
V− +0.3 V to −9 V
Input Voltages
T
IN
−0.3 V to +6 V
R
IN
±30 V
Output Voltages
T
OUT
±15 V
R
OUT
−0.3 V to (V
CC
+ 0.3 V)
Short-Circuit Duration
T
OUT
Continuous
Thermal Impedance, θ
JA
LFCSP_WQ (CP-32-7) 32.5°C/W
TSSOP (RU-28) 68.0°C/W
TSSOP (RU-24) 68.0°C/W
SSOP (RS-28) 76.0°C/W
Operating Temperature Range
Industrial (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
ESD Rating (IEC 1000-4-2 Air)
(RS-232 I/Os)
±15 kV
ESD Rating (IEC 1000-4-2 Contact)
(RS-232 I/Os)
±8 kV
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
Rev. J | Page 7 of 20
PRODUCT SELECTION GUIDE
Table 3. Product Selection Guide
Generic
Supply
Voltage Tx Rx
No. Rx
Active
in SD Speed 15 kV ESD
ICC
Max
ICC
Shutdown
Max1
Additional Features
ADM3307E 2.7 V to 3.6 V 5 3 1 1 Mbps RS-232 CMOS, EN,
and SD
1.5 mA 1 µA ±15 kV ESD protection, CMOS
on RS-232, and CMOS I/Os
including SD and EN pins
ADM3310E 2.7 V to 3.6 V 3 5 2 460 kbps RS-232 0.85 mA 1 µA 2 Rxs active in shutdown, Green
Idle mode level 6 V, low power
ADM3311E
ADM3311E 2.7 V to 3.6 V 3 5 1 460 kbps RS-232 1 mA 1 µA
ADM3312E 2.7 V to 3.6 V 3 3 1 460 kbps RS-232 1 mA 1 µA
ADM3315E 2.7 V to 3.6 V 3 3 1 460 kbps RS-232 0.85 mA 1 µA 22 kΩ Rx I/P resistance, Green
Idle mode level 6 V, low power
ADM3312E
1 ICC shutdown is 20 nA typically.
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 8 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V–
GND
GND
T1
OUT
T2
OUT
T3
OUT
T4
OUT
T5
OUT
NC
R1
OUT
R2
OUT
R3
OUT
NC
R3
IN
R2
IN
R1
IN
EN
SD
NC
T1
IN
T2
IN
T3
IN
T4
IN
T5
IN
02915-004
NOTES
1. T HE E X P OSE D P AD IS CONNECTED T O G ROUND.
2. NC = NO CO NNE CT. DO NO T CONNE CT T O T HIS P IN.
1
2
3
19
17
4
5
6
7
20
21
18
14
13
12
11
10
9
15
16
32
31
30
29
28
27
26
25
22
23
24
8
ADM3307E
TOP VIEW
(No t t o Scal e)
C1–
C2–
V
CC
V+
C2+
C3+
C1+
C3–
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
C2–
C1–
T1
IN
SD
EN
V+
C3+
C1+
C3–
T1
OUT
GND
V–
T2
IN
T3
IN
T4
IN
R3
OUT
R1
OUT
T5
IN
T2
OUT
T3
OUT
T4
OUT
R3
IN
R2
OUT
R2
IN
R1
IN
T5
OUT
C2+
ADM3307E
TOP VIEW
(Not to Scale)
02915-005
Figure 4. ADM3307E LFCSP_WQ Pin Configuration Figure 5. SSOP/TSSOP Pin Configuration
C1–
SD
NC
T1
OUT
T2
OUT
T3
OUT
R1
IN
R2
IN
R3
OUT
R4
OUT
R5
OUT
NC
NC
R5
IN
R4
IN
R3
IN
C2–
V
CC
C2+
V+
C3+
GND
C3–
V–
EN
C1+
NC
T1
IN
T2
IN
T3
IN
R1
OUT
R2
OUT
02915-006
NOTES
1. T HE E X P OSE D P AD IS CONNECTED T O G ROUND.
2. NC = NO CO NNE CT. DO NO T CO NNECT T O T HIS P IN.
1
2
3
19
17
4
5
6
7
20
21
18
14
13
12
11
10
9
15
16
32
31
30
29
28
27
26
25
22
23
24
8
ADM3310E/
ADM3311E
TOP VIEW
(No t t o Scal e)
V+
1
C2+
2
V
CC 3
C2–
4
C3+
28
GND
27
C3–
26
V–
25
EN
5
C1+
6
T1
IN 7
C1–
24
SD
23
T1
OUT
22
T2
IN 8
T2
OUT
21
T3
IN 9
T3
OUT
20
R1
OUT 10
R1
IN
19
R2
OUT 11
R2
IN
18
R3
OUT 12
R3
IN
17
R4
OUT 13
R4
IN
16
R5
OUT 14
R5
IN
15
ADM3310E/
ADM3311E
TOP VIEW
(Not to Scale)
02915-007
Figure 6. LFCSP_WQ Pin Configuration Figure 7. SSOP/TSSOP Pin Configuration
C1–
SD
NC
T1
OUT
T2
OUT
T3
OUT
NC
NC
R1
OUT
R2
OUT
R3
OUT
NC
NC
R3
IN
R2
IN
R1
IN
C2–
V
CC
C2+
V+
C3+
GND
C3–
V–
02915-008
EN
C1+
NC
T1
IN
T2
IN
T3
IN
NC
NC
NOTES
1. THE EX P OSE D P AD IS CONNECT E D TO GRO UND.
2. NC = NO CO NNE CT. DO NO T CO NNE CT TO T HIS P IN.
1
2
3
19
17
4
5
6
7
20
21
18
14
13
12
11
10
9
15
16
32
31
30
29
28
27
26
25
22
23
24
8
ADM3312E/
ADM3315E
TOP VIEW
(No t t o Scal e)
1
2
3
4
5
6
7
8
9
10
20
21
22
23
24
19
18
17
16
15
14
13
12
11
C2+
V
CC
C2
T1
IN
C1+
EN
V+
GND
C3–
V–
T1
OUT
SD
C1–
T2
IN
T3
IN
R3
OUT
R2
OUT
R1
OUT
T2
OUT
T3
OUT
R3
IN
R2
IN
R1
IN
C3+
ADM3312E/
ADM3315E
TOP VIEW
(Not to Scale)
02915-009
Figure 8. LFCSP_WQ Pin Configuration Figure 9. SSOP/TSSOP Pin Configuration
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
Rev. J | Page 9 of 20
Table 4. Pin Function Descriptions
Mnemonic Function
V
CC
Power Supply Input 2.7 V to 3.6 V.
V+ Internally Generated Positive Supply, 7.25 V (6.5 V Nominal for ADM3310E, ADM3315E). Capacitor C4 is connected between
V
CC
and V+.
V− Internally Generated Positive Supply, −7.25 V (−6.5 V Nominal for ADM3310E, ADM3315E). Capacitor C5 is connected between
GND and V−.
GND Ground Pin. Must be connected to 0 V.
C1+, C1− External Capacitor 1 is connected between these pins. A 0.1 µF capacitor is recommended, but larger capacitors up to 1 µF
can be used.
C2+, C2− External Capacitor 2 is connected between these pins. A 0.1 µF capacitor is recommended, but larger capacitors up to 1 µF
can be used.
C3+, C3− External Capacitor 3 is connected between these pins. A 0.1 µF capacitor is recommended, but larger capacitors up to 1 µF
can be used.
TIN Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is connected on
each input.
T
OUT
Transmitter (Driver) Outputs. Typically ±5.5 V (±6.4 V for ADM3311E and ADM3312E).
R
IN
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor (22 kΩ for ADM3315E) to GND is
connected on each of these inputs.
R
OUT
Receiver Outputs. These are TTL/CMOS levels.
EN Receiver Enable. A high level three-states all the receiver outputs.
SD Shutdown Control. A high level disables the charge pump and reduces the quiescent current to less than 1 µA. All
transmitters and most receivers are disabled. One receiver remains active in shutdown (two receivers are active in shutdown
for the ADM3310E).
For ADM3307E, R
OUT
3 is active in shutdown.
For ADM3310E, R
OUT
4 and R
OUT
5 are active in shutdown.
For ADM3311E, R
OUT
5 is active in shutdown.
For ADM3312E, R
OUT
3 is active in shutdown.
For ADM3315E, ROUT3 is active in shutdown.
NC No Connect.
Table 5. ADM3307E Truth Table
SD EN Status T
OUT
1–5 R
OUT
1–2 R
OUT
3
0 0 Normal Operation Enabled Enabled Enabled
0 1 Normal Operation Enabled Disabled Disabled
1 0 Shutdown Disabled Disabled Enabled
1
1
Shutdown
Disabled
Disabled
Disabled
Table 6. ADM3310E Truth Table
SD EN Status T
OUT
1–3 R
OUT
1–3 R
OUT
4–5
0 0 Normal Operation Enabled Enabled Enabled
0 1 Receivers
Disabled
Enabled Disabled Disabled
1
0
Shutdown
Disabled
Disabled
Enabled
1 1 Shutdown Disabled Disabled Disabled
Table 7. ADM3311E Truth Table
SD EN Status TOUT1–3 ROUT1–4 ROUT5
0 0 Normal Operation Enabled Enabled Enabled
0 1 Receivers
Disabled
Enabled Disabled Disabled
1 0 Shutdown Disabled Disabled Enabled
1 1 Shutdown Disabled Disabled Disabled
Table 8. ADM3312E/ADM3315E Truth Table
SD EN Status TOUT1–3 ROUT1–2 ROUT3
0 0 Normal Operation Enabled Enabled Enabled
0 1 Normal Operation Enabled Disabled Disabled
1 0 Shutdown Disabled Disabled Enabled
1 1 Shutdown Disabled Disabled Disabled
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 10 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
V+
SD
02915-010
Figure 10. Charge Pump V+ Exiting Shutdown
SD
V–
02915-011
Figure 11. Charge Pump V− Exiting Shutdown
9
7
5
3
1
–1
–3
–5
–7
–9
LOAD CURRENT (mA)
V+/V – (V)
V+
V–
0 5 10 15 20
02915-012
Figure 12. Charge Pump V+/ V− vs. Load Current (VCC = 3.3 V)
9
7
5
3
1
–1
–3
–5
–7
LOAD CAPACITANCE (pF)
Tx O/P (V)
T
OUT
HIGH
T
OUT
LOW
0 200 400 600 800 1000
02915-013
Figure 13. Transmitter Output vs. Load Capacitance
(VCC = 3.3 V, Data Rate = 460 kbps)
LOAD CAPACITANCE (pF)
40
0
SLEW RATE ( V/µs)
35
30
25
20
15
10
5
02500200015001000500
02915-014
Figure 14. Slew Rate vs. Load Capacitance (VCC = 3.3 V)
25
20
15
10
5
0
LOAD CAPACITANCE (pF)
I
CC
(mA)
0 200 400 600 800 1000 1200
02915-015
Figure 15. Supply Current vs. Load Capacitance (RL = 3 kΩ)
(VCC = 3.3 V, Data Rate = 460 kbps)
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
Rev. J | Page 11 of 20
25
20
15
10
5
0
LOAD CAPACITANCE (pF)
I
CC
(mA)
0 200 400 600 800 12001000
02915-016
Figure 16. Supply Current vs. Load Capacitance (RL = Infinite)
(VCC = 3.3 V, Data Rate = 460 kbps)
LOAD CAPACITANCE (pF)
10
12
SUPPLY CURRENT ( mA)
14
16
18
20
22
24
26
28
30
460kbps
250kbps
125kbps
0 200 400 600 800 1000
0
2915-017
Figure 17. Supply Current vs. Load Capacitance (VCC = 3.3 V, RL = 5 kΩ)
SD
TX O/P
HIGH
02915-018
Figure 18. Transmitter Output (High) Exiting Shutdown
SD
TX O/P LOW
02915-019
Figure 19. Transmitter Output (Low) Exiting Shutdown
10
8
6
4
2
0
–2
–4
–6
–8
–10
LOAD CAPACITANCE (pF)
Tx
OUT
VOLTAGE (V)
0 200 400 600 800 1000
02915-020
Figure 20. Transmitter Output Voltage High/Low vs. Load Capacitance
(VCC = 3.3 V, CLK = 1 Mb/s, RL = 5 kΩ, ADM3307E)
300
250
200
150
100
50
0
OSCIL LAT OR F REQUENCY (kHz)
LOAD CURRENT (mA)
0 5 10 15 20
0
2915-021
Figure 21. Oscillator Frequency vs. Load Current
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 12 of 20
600
500
400
300
200
100
0
V
CC
(V)
I
CC
(µA)
2.62.83.03.23.43.6
0
2915-022
Figure 22. ICC vs. VCC (Unloaded)
25
20
15
10
5
0
I
CC
(mA)
V
CC
(V)
2.6 2.8 3.0 3.2 3.4 3.6
02915-023
Figure 23. ICC vs. VCC (RL = 3 kΩ)
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
Rev. J | Page 13 of 20
CIRCUIT DESCRIPTION
The internal circuitry consists mainly of four sections. These
include the following:
• A charge pump voltage converter
• 3.3 V logic to EIA-232 transmitters
• EIA-232 to 3.3 V logic receivers
• Transient protection circuit on all I/O lines
Charge Pump DC-to-DC Voltage Converter
The charge pump voltage converter consists of a 250 kHz (300 kHz
for ADM3307E) oscillator and a switching matrix. The converter
generates a ±9 V supply from the input 3.0 V level. This is done in
two stages using a switched capacitor technique. First, the 3.0 V
input supply is tripled to 9.0 V using Capacitor C4 as the charge
storage element. The +9.0 V level is then inverted to generate −9.0
V using C5 as the storage element.
However, it should be noted that, unlike other charge pump dc-
to-dc converters, the charge pump on the ADM3307E does not
run open-loop. The output voltage is regulated to ±7.25 V (or
±6.5 V for the ADM3310E and ADM3315E) by the Green Idle
circuit and never reaches ±9 V in practice. This saves power as
well as maintains a more constant output voltage.
+
GND
C2
C1
S1
S2
S3
S4 C4
V
CC
S5
S6
S7
++
V+ = 3V
CC
V
CC
INTERNAL
OSCILLATOR
V
CC
02915-024
Figure 24. Charge Pump Voltage Tripler
The tripler operates in two phases. During the oscillator low
phase, S1 and S2 are closed and C1 charges rapidly to VCC. S3,
S4, and S5 are open, and S6 and S7 are closed.
During the oscillator high phase, S1 and S2 are open, and S3
and S4 are closed, so the voltage at the output of S3 is 2VCC. This
voltage is used to charge C2. In the absence of any discharge
current, C2 charges up to 2VCC after several cycles. During the
oscillator high phase, as previously mentioned, S6 and S7 are
closed, so the voltage at the output of S6 is 3VCC. This voltage is
then used to charge C3. The voltage inverter is illustrated in
Figure 25.
+
GND
C3
S8
S9
S10
S11 C5
V– = –(V+)
+GND
V+
INTERNAL
OSCILLATOR
FROM
VOLTAGE
TRIPLER
02915-025
Figure 25. Charge Pump Voltage Inverter
During the oscillator high phase, S10 and S11 are open, while
S8 and S9 are closed. C3 is charged to 3VCC from the output of
the voltage tripler over several cycles. During the oscillator low
phase, S8 and S9 are open, while S10 and S11 are closed. C3 is
connected across C5, whose positive terminal is grounded and
whose negative terminal is the V− output. Over several cycles,
C5 charges to −3 VCC.
The V+ and V− supplies may also be used to power external
circuitry if the current requirements are small. See Figure 12 in
the Typical Performance Characteristics section.
What Is Green Idle?
Green Idle is a method of minimizing power consumption
under idle (no transmit) conditions while still maintaining the
ability to transmit data instantly.
How Does it Work?
Charge pump type dc-to-dc converters used in RS-232 line
drivers normally operate open-loop, that is, the output voltage
is not regulated in any way. Under light load conditions, the
output voltage is close to twice the supply voltage for a doubler
and three times the supply voltage for a tripler, with very little
ripple. As the load current increases, the output voltage falls and
the ripple voltage increases.
Even under no-load conditions, the oscillator and charge pump
operate at a very high frequency with consequent switching
losses and current drain.
Green Idle works by monitoring the output voltage and
maintaining it at a constant value of around 7 V1. When the
voltage rises above 7.25 V2 the oscillator is turned off. When the
voltage falls below 7 V1, the oscillator is turned on and a burst of
charging pulses is sent to the reservoir capacitor. When the
oscillator is turned off, the power consumption of the charge
pump is virtually zero, so the average current drain under light
load conditions is greatly reduced.
1 For ADM3310E and ADM3315E, replace with 6.5 V.
2 For ADM3310E and ADM3315E, replace with 6.25 V.
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 14 of 20
A block diagram of the Green Idle circuit is shown in Figure 26.
Both V+ and V− are monitored and compared to a reference
voltage derived from an on-chip band gap device. If either V+
or V− fall below 7 V1, the oscillator starts up until the voltage
rises above 7.25 V2.
TRANSCEIVERS
START/STOP
START/STOP V+
V–
SHUTDOWN CHARGE
PUMP
V– VOLTAGE
COMPARATOR
WITH 250mV
HYSTERESIS
BAND GAP
VOLTAGE
REFERENCE
V+ VOLTAGE
COMPARATOR
WITH 250mV
HYSTERESIS
02915-026
Figure 26. Block Diagram of Green Idle Circuit
The operation of Green Idle for V+ under various load
conditions is illustrated in Figure 27. Under light load
conditions, C1 is maintained in a charged condition, and only a
single oscillator pulse is required to charge up C2. Under these
conditions, V+ may actually overshoot 7.25 V2 slightly.
OSC
V+
OVERSHOOT
LIGHT
LOAD
7.25V1
7V2
OSC
V+
7.25V1
7V2
OSC
V+
7.25V1
7V2
MEDIUM
LOAD
HEAVY
LOAD
1FOR ADM3310EAND ADM3315E REPLACE WITH 6.5V.
2FOR ADM3310EAND ADM3315E REPLACE WITH 6.25V.
02915-027
Figure 27. Operation of Green Idle under Various Load Conditions
Under medium load conditions, it may take several cycles for
C2 to charge up to 7.25 V2. The average frequency of the
oscillator is higher because there are more pulses in each burst
and the bursts of pulses are closer together and more frequent.
Under high load conditions, the oscillator is on continuously if
the charge pump output cannot reach 7.25 V2.
Green Idle Vs. Shutdown
Shutdown mode minimizes power consumption by shutting
down the charge pump altogether. In this mode, the switches in
the voltage tripler are configured so V+ is connected directly to
VCC. V− is zero because there is no charge pump operation to
charge C5. This means there is a delay when coming out of
shutdown mode before V+ and V− achieve their normal
operating voltages. Green Idle maintains the transmitter supply
voltages under transmitter idle conditions so this delay does not
occur.
Doesn’t Green Idle Increase Supply Voltage Ripple?
The ripple on the output voltage of a charge pump operating in
open-loop depends on three factors: the oscillator frequency,
the value of the reservoir capacitor, and the load current. The
value of the reservoir capacitor is fixed. Increasing the oscillator
frequency decreases the ripple voltage; decreasing the oscillator
frequency increases it. Increasing the load current increases the
ripple voltage; decreasing the load current decreases it. The
ripple voltage at light loads is naturally lower than that for high
load currents.
Using Green Idle, the ripple voltage is determined by the high
and low thresholds of the Green Idle circuit. These are
nominally 7 V1 and 7.25 V2, so the ripple is 250 mV under most
load conditions. With very light load conditions, there may be
some overshoot above 7.25 V2, so the ripple is slightly greater.
Under heavy load conditions where the output never reaches
7.25 V2, the Green Idle circuit is inoperative and the ripple
voltage is determined by the load current, the same as in a
normal charge pump.
What about Electromagnetic Compatibility?
Green Idle does not operate with a constant oscillator
frequency. As a result, the frequency and spectrum of the
oscillator signal vary with load. Any radiated and conducted
emissions also vary accordingly. Like other Analog Devices
RS-232 transceiver products, the ADM3307E/ADM3310E/
ADM3311E/ADM3312E/ADM3315E devices feature slew rate
limiting and other techniques to minimize radiated and
conducted emissions.
1 For ADM3310E and ADM3315E, replace with 6.5 V.
2 For ADM3310E and ADM3315E, replace with 6.25 V.
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
Rev. J | Page 15 of 20
Transmitter (Driver) Section
The drivers convert 3.3 V logic input levels into EIA-232 output
levels. With VCC = 3.0 V and driving an EIA-232 load, the output
voltage swing is typically ±6.4 V (or ±5.5 V for ADM3310E and
ADM3315E).
Unused inputs may be left unconnected, because an internal
400 kV pull-up resistor pulls them high forcing the outputs into
a low state. The input pull-up resistors typically source 8 mA
when grounded, so unused inputs should either be connected to
VCC or left unconnected in order to minimize power consumption.
Receiver Section
The receivers are inverting level shifters that accept RS-232
input levels and translate them into 3.3 V logic output levels.
The inputs have internal 5 kΩ pull-down resistors (22 kΩ for
the ADM3310E) to ground and are also protected against
overvoltages of up to ±30 V. Unconnected inputs are pulled to
0 V by the internal 5 kΩ (or 22 kΩ for the ADM3315E) pull-
down resistor. This, therefore, results in a Logic 1 output level
for unconnected inputs or for inputs connected to GND.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.14 V. This ensures error-free reception for both noisy
inputs and for inputs with slow transition times.
ENABLE AND SHUTDOWN
The enable function is intended to facilitate data bus connections
where it is desirable to three-state the receiver outputs. In the
disabled mode, all receiver outputs are placed in a high
impedance state. The shutdown function is intended to shut the
device down, thereby minimizing the quiescent current. In
shutdown, all transmitters are disabled. All receivers are shut
down, except for Receiver R3 (ADM3307E, ADM3312E, and
ADM3315E), Receiver R5 (ADM3311E), and Receiver R4 and
Receiver R5 (ADM3310E). Note that disabled transmitters are
not three-stated in shutdown, so it is not permitted to connect
multiple (RS-232) driver outputs together.
The shutdown feature is very useful in battery-operated systems
because it reduces the power consumption to 66 nW. During
shutdown, the charge pump is also disabled. When exiting
shutdown, the charge pump is restarted and it takes approximately
100 µs for it to reach its steady-state operating conditions.
0V
3V
EN INPUT
tDR
V
OH
– 0.1V
V
OL
+ 0.1V
V
OH
V
OL
RECEIVER
OUTPUT
02915-028
Figure 28. Receiver Disable Timing
3V
0.4V
0V
3V
t
ER
EN INPUT
V
OH
V
OL
RECEIVER
OUTPUT
02915-029
Figure 29. Receiver Enable Timing
High Baud Rate
The ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E feature high slew rates, permitting data transmission
at rates well in excess of the EIA/RS-232E specifications. RS-232
voltage levels are maintained at data rates up to 230 kbps (460 kbps
for ADM3307E) under worst-case loading conditions. This allows
for high speed data links between two terminals.
LAYOUT AND SUPPLY DECOUPLING
Because of the high frequencies at which the ADM3307E/
ADM3310E/ADM3311E/ADM3312E/ADM3315E oscillator
operates, particular care should be taken with printed circuit
board layout, with all traces being as short as possible and C1 to
C3 being connected as close to the device as possible. The use of
a ground plane under and around the device is also highly
recommended.
When the oscillator starts up during Green Idle operation, large
current pulses are taken from VCC. For this reason, VCC should
be decoupled with a parallel combination of 10 µF tantalum and
0.1 µF ceramic capacitors, mounted as close to the VCC pin as
possible.
Capacitor C1 to Capacitor C3 can have values between 0.1 µF and
1 µF. Larger values give lower ripple. These capacitors can be either
electrolytic capacitors chosen for low equivalent series resistance
(ESR) or nonpolarized types, but the use of ceramic types is highly
recommended. If polarized electrolytic capacitors are used, polarity
must be observed (as shown by C1+).
ESD/EFT TRANSIENT PROTECTION SCHEME
The ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E use protective clamping structures on all inputs and
outputs that clamp the voltage to a safe level and dissipate the
energy present in ESD (electrostatic) and EFT (electrical fast
transients) discharges. A simplified schematic of the protection
structure is shown in Figure 30 and Figure 31 (see Figure 32 and
Figure 33 for ADM3307E protection structure).
Each input and output contains two back-to-back high speed
clamping diodes. During normal operation with maximum RS-232
signal levels, the diodes have no effect as one or the other is reverse
biased depending on the polarity of the signal. If, however, the
voltage exceeds about ±50 V, reverse breakdown occurs and the
voltage is clamped at this level. The diodes are large p-n junctions
designed to handle the instantaneous current surge that can exceed
several amperes.
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 16 of 20
The transmitter outputs and receiver inputs have a similar protec-
tion structure. The receiver inputs can also dissipate some of the
energy through the internal 5 kΩ (or 22 kΩ for the ADM3310E)
resistor to GND as well as through the protection diodes.
R
IN
Rx
D1
D2
RECEIVER
INPUT
02915-030
Figure 30. Receiver Input Protection Scheme
Tx
D1
D2
TRANSMITTER
OUTPUT
02915-031
Figure 31. Transmitter Output Protection Scheme
The ADM3307E protection scheme is slightly different (see
Figure 32 and Figure 33). The receiver inputs, transmitter
inputs, and transmitter outputs contain two back-to-back high
speed clamping diodes. The receiver outputs (CMOS outputs),
the SD and EN pins, contain a single reverse biased high speed
clamping diode. Under normal operation with maximum
CMOS signal levels, the receiver output, SD, and EN protection
diodes have no effect because they are reversed biased. If,
however, the voltage exceeds about 15 V, reverse breakdown
occurs and the voltage is clamped at this level. If the voltage
reaches −0.7 V, the diode is forward biased and the voltage is
clamped at this level. The receiver inputs can also dissipate
some of the energy through the internal 5 kΩ resistor to GND
as well as through the protection diodes.
R
IN
D1 D3
D2
RECEIVER
INPUT RECEIVER
OUTPUT
Rx
02915-032
Figure 32. ADM3307E Receiver Input Protection Scheme
D1
D2
D3
D4
TRANSMITTER
OUTPUT TRANSMITTER
INPUT
Tx
02915-033
Figure 33. ADM3307E Transmitter Output Protection Scheme
The protection structures achieve ESD protection up to ±15 kV
on all RS-232 I/O lines (and all CMOS lines, including SD and
EN for the ADM3307E). For methods used to test the
protection scheme, see the ESD Testing (IEC 1000-4-2) section.
ESD TESTING (IEC 1000-4-2)
IEC 1000-4-2 (previously 801-2) specifies compliance testing
using two coupling methods, contact discharge and air-gap
discharge. Contact discharge calls for a direct connection to the
unit being tested. Airgap discharge uses a higher test voltage but
does not make direct contact with the unit under testing. With
air discharge, the discharge gun is moved toward the unit under
testing, which develops an arc across the air gap, thus the term
air discharge. This method is influenced by humidity,
temperature, barometric pressure, distance, and rate of closure
of the discharge gun. The contact discharge method, while less
realistic, is more repeatable and is gaining acceptance in
preference to the air-gap method.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time coupled with high voltages can
cause failures in unprotected semiconductors. Catastrophic
destruction can occur immediately as a result of arcing or
heating. Even if catastrophic failure does not occur immediately,
the device can suffer from parametric degradation that can
result in degraded performance. The cumulative effects of
continuous exposure can eventually lead to complete failure.
I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable can result in a static
discharge that can damage or completely destroy the interface
product connected to the I/O port. Traditional ESD test
methods, such as the MIL-STD-883B method 3015.7, do not
fully test a product’s susceptibility to this type of discharge. This
test was intended to test a product’s susceptibility to ESD
damage during handling.
Each pin is tested with respect to ground. There are some
important differences between the traditional test and the IEC
test.
The IEC test is much more stringent in terms of discharge
energy. The peak current injected is over four times
greater.
The current rise time is significantly faster in the IEC test.
The IEC test is carried out while power is applied to the
device.
It is possible that the ESD discharge could induce latch-up in
the device under test. This test, therefore, is more representative
of a real world I/O discharge where the equipment is operating
normally with power applied. For maximum peace of mind,
however, both tests should be performed, ensuring maximum
protection both during handling and later during field service.
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
Rev. J | Page 17 of 20
R1
C1
ESD TEST METHOD R2 C1
IEC1000-4-2
1.5kΩ100pF
HUMAN BODY MODEL
ESD ASSOC. STD 55.1
330Ω150pF
DEVICE
UNDER TEST
HIGH
VOLTAGE
GENERATOR
R2
02915-034
Figure 34. ESD Test Standards
100
90
36.8
10
TIME t
t
DL
t
RL
I
PEAK
(%)
0
2915-035
Figure 35. Human Body Model ESD Current Waveform
100
90
10
TIME
t
30ns
60ns
0.1ns TO 1ns
I
PEAK
(%)
02915-036
Figure 36. IEC1000-4-2 ESD Current Waveform
The ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E devices are tested using both of the previously
mentioned test methods. All pins are tested with respect to all
other pins as per the Human Body Model, ESD Assoc. Std. 55.1
specification. In addition, all I/O pins are tested as per the IEC
1000-4-2 test specification. The products were tested under the
following conditions:
Power-On—Normal Operation
Power-Off
There are four levels of compliance defined by IEC 1000-4-2.
The ADM3307E/ADM3310E/ADM3311E/ADM3312E/
ADM3315E devices meet the most stringent compliance level
for both contact and air-gap discharge. This means the products
are able to withstand contact discharges in excess of 8 kV and
airgap discharges in excess of 15 kV.
Table 9. IEC 1000-4-2 Compliance Levels
Level Contact Discharge (kV) Air Discharge (kV)
1 2 2
2 4 4
3 6 8
4 8 15
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 18 of 20
OUTLINE DIMENSIONS
COM P LIANT T O JEDE C S TANDARDS M O-220-WHHD.
112408-A
1
0.50
BSC
BOTTOM VIEWTOP VIEW
PIN 1
INDICATOR 32
9
16
17
24
25
8
EXPOSED
PAD
PIN 1
INDICATOR
3.25
3.10 SQ
2.95
SEATING
PLANE
0.05 M AX
0.02 NO M
0.20 REF
COPLANARITY
0.08
0.30
0.25
0.18
5.10
5.00 SQ
4.90
0.80
0.75
0.70
FOR PRO P E R CONNECTI ON O F
THE EXPOSED PAD, REFER TO
THE PIN CO NFI GURAT IO N AND
FUNCTION DES CRIPTI ONS
SECTION OF THIS DATA SHEET.
0.50
0.40
0.30
0.25 M IN
Figure 37. 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
5 mm × 5 mm Body, Very Very Thin Quad
(CP-32-7)
Dimensions shown in millimeters
COMPLIANT TO JE DE C S TANDARDS MO -150-AH
060106-A
28 15
14
1
10.50
10.20
9.90
8.20
7.80
7.40
5.60
5.30
5.00
SEATING
PLANE
0.05 M IN
0.65 BSC
2.00 M AX
0.38
0.22
COPLANARITY
0.10
1.85
1.75
1.65
0.25
0.09
0.95
0.75
0.55
8°
4°
0°
Figure 38. 28-Lead Shrink Small Outline Package [SSOP]
(RS-28)
Dimensions shown in millimeters
Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E
Rev. J | Page 19 of 20
24 13
121
6.40 BSC
4.50
4.40
4.30
PIN 1
7.90
7.80
7.70
0.15
0.05
0.30
0.19
0.65
BSC 1.20
MAX
0.20
0.09
0.75
0.60
0.45
8°
0°
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-153-AD
Figure 39. 24-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-24)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MO-153-AE
28 15
141
8°
0°
SEATING
PLANE
COPLANARITY
0.10
1.20 MAX
6.40 BSC
0.65
BSC
PIN 1
0.30
0.19 0.20
0.09
4.50
4.40
4.30
0.75
0.60
0.45
9.80
9.70
9.60
0.15
0.05
Figure 40. 28-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-28)
Dimensions shown in millimeters
ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet
Rev. J | Page 20 of 20
ORDERING GUIDE
Model1, 2
Temperature Range
Package Description
Package Option
ADM3307EARU-REEL7 −40°C to +85°C 28-Lead 7” Tape and Reel RU-28
ADM3307EARUZ −40°C to +85°C 28-Lead Thin Shrink Small Outline [TSSOP] RU-28
ADM3307EARUZ-REEL −40°C to +85°C 28-Lead 13” Tape and Reel RU-28
ADM3307EARUZ-REEL7 −40°C to +85°C 28-Lead 7” Tape and Reel RU-28
ADM3307EACPZ −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-32-7
ADM3307EACPZ-REEL −40°C to +85°C 32-Lead LFCSP_WQ 13” Tape and Reel CP-32-7
ADM3307EACPZ-REEL7 −40°C to +85°C 32-Lead LFCSP_WQ 7” Tape and Reel CP-32-7
ADM3307EWARUZ-RL7 −40°C to +85°C 28-Lead 7” Tape and Reel RU-28
ADM3310EARU −40°C to +85°C 28-Lead Thin Shrink Small Outline [TSSOP] RU-28
ADM3310EARUZ
−40°C to +85°C
28-Lead Thin Shrink Small Outline [TSSOP]
RU-28
ADM3310EARUZ-REEL −40°C to +85°C 28-Lead TSSOP 13” Tape and Reel RU-28
ADM3310EARUZ-REEL7 −40°C to +85°C 28-Lead TSSOP 7” Tape and Reel RU-28
ADM3310EACPZ −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-32-7
ADM3310EACPZ-REEL7 −40°C to +85°C 32-Lead LFCSP_WQ 7” Tape and Reel CP-32-7
ADM3311EARS −40°C to +85°C 28-Lead Shrink Small Outline [SSOP] RS-28
ADM3311EARSZ −40°C to +85°C 28-Lead Shrink Small Outline [SSOP] RS-28
ADM3311EARSZ-REEL −40°C to +85°C 28-Lead SSOP 13” Tape and Reel RS-28
ADM3311EARSZ-REEL7 −40°C to +85°C 28-Lead SSOP 7” Tape and Reel RS-28
ADM3311EARUZ −40°C to +85°C 28-Lead Thin Shrink Small Outline [TSSOP] RU-28
ADM3311EARUZ-REEL −40°C to +85°C 28-Lead TSSOP 13” Tape and Reel RU-28
ADM3311EARUZ-REEL7 −40°C to +85°C 28-Lead TSSOP 7” Tape and Reel RU-28
ADM3311EACPZ −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-32-7
ADM3311EACPZ-REEL7 −40°C to +85°C 32-Lead LFCSP_WQ 7” Tape and Reel CP-32-7
ADM3312EARU −40°C to +85°C 24-Lead Thin Shrink Small Outline [TSSOP] RU-24
ADM3312EARU-REEL7 −40°C to +85°C 24-Lead TSSOP 7” Tape and Reel RU-24
ADM3312EARUZ
−40°C to +85°C
24-Lead Thin Shrink Small Outline [TSSOP]
RU-24
ADM3312EARUZ-REEL −40°C to +85°C 24-Lead TSSOP 13” Tape and Reel RU-24
ADM3312EARUZ-REEL7 −40°C to +85°C 24-Lead TSSOP 7” Tape and Reel RU-24
ADM3312EACPZ −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-32-7
ADM3312EACPZ-REEL7 −40°C to +85°C 32-Lead LFCSP_WQ 7” Tape and Reel CP-32-7
ADM3315EARU −40°C to +85°C 24-Lead Thin Shrink Small Outline [TSSOP] RU-24
ADM3315EARU-REEL −40°C to +85°C 24-Lead TSSOP 13” Tape and Reel RU-24
ADM3315EARUZ −40°C to +85°C 24-Lead Thin Shrink Small Outline [TSSOP] RU-24
ADM3315EARUZ-REEL −40°C to +85°C 24-Lead TSSOP 13” Tape and Reel RU-24
ADM3315EARUZ-REEL7 −40°C to +85°C 24-Lead TSSOP 7” Tape and Reel RU-24
ADM3315EACPZ −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-32-7
ADM3315EACPZ-REEL −40°C to +85°C 32-Lead LFCSP_WQ 13” Tape and Reel CP-32-7
ADM3315EACPZ-REEL7 −40°C to +85°C 32-Lead LFCSP_WQ 7” Tape and Reel CP-32-7
1 Z = RoHS Compliant Part.
2 W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The ADM3307EW model is available with controlled manufacturing to support the quality and reliability requirements of automotive
applications. Note that this automotive model may have specifications that differ from the commercial models; therefore, designers
should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in
automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to
obtain the specific Automotive Reliability reports for this model.
©2002–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02915-0-6/15(J)