TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 D Direct Upgrades for the TL06x Low-Power D D BiFETs Low Power Consumption . . . 6.5 mW/Channel Typ On-Chip Offset-Voltage Trimming for Improved DC Performance (1.5 mV, TL031A) D Higher Slew Rate and Bandwidth Without D Increased Power Consumption Available in TSSOP for Small Form-Factor Designs description The TL03x series of JFET-input operational amplifiers offer improved dc and ac characteristics over the TL06x family of low-power BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision grades as low as 1.5 mV (TL031A) for greater accuracy in dc-coupled applications. The Texas Instruments improved BiFET process and optimized designs also yield improved bandwidths and slew rates without increased power consumption. The TL03x devices are pin-compatible with the TL06x and can be used to upgrade existing circuits or for optimal performance in new designs. BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transistors without sacrificing the output drive associated with bipolar amplifiers. This higher input impedance makes the TL3x amplifiers better suited for interfacing with high-impedance sensors or very low-level ac signals. These devices also feature inherently better ac response than bipolar or CMOS devices having comparable power consumption. The TL03x family has been optimized for micropower operation, while improving on the performance of the TL06x series. Designers requiring significantly faster ac response should consider the ExcaliburTM TLE206x family of low-power BiFET operational amplifiers. Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to observe common-mode input-voltage limits and output swing when operating from a single supply. DC biasing of the input signal is required, and loads should be terminated to a virtual-ground node at midsupply. The TI TLE2426 integrated virtual-ground generator is useful when operating BiFET amplifiers from single supplies. The TL03x devices are fully specified at 15 V and 5 V. For operation in low-voltage and/or single-supply systems, the TI LinCMOS families of operational amplifiers (TLC prefix) are recommended. When moving from BiFET to CMOS amplifiers, particular attention should be paid to slew rate, bandwidth requirements, and output loading. The C-suffix devices are characterized for operation from 0C to 70C. The I-suffix devices are characterized for operation from -40C to 85C. The M-suffix devices are characterized for operation over the full military temperature range of -55C to 125C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Excalibur is a trademark of Texas Instruments. Copyright (c) 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL032x, TL032Ax D, JG, OR P PACKAGE (TOP VIEW) 1 8 2 7 3 6 4 5 NC VCC+ OUT OFFSET N2 1OUT 1IN- 1IN+ VCC - TL031M, TL031AM FK PACKAGE (TOP VIEW) 5 17 6 16 7 8 15 14 9 10 11 12 13 7 3 6 4 5 VCC+ 2OUT 2IN- 2IN+ NC 1OUT NC VCC+ NC NC VCC+ NC OUT NC NC 1IN- NC 1IN+ NC 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC 2OUT NC 2IN- NC NC - No internal connection 2 1OUT 1IN- 1IN+ VCC+ 2IN+ 2IN- 2OUT POST OFFICE BOX 655303 1 14 2 13 3 12 4 11 5 10 6 9 7 8 4OUT 4IN- 4IN+ VCC- 3IN+ 3IN- 3OUT TL034M, TL034AM FK PACKAGE (TOP VIEW) NC VCC- NC 2IN+ NC 3 2 1 20 19 18 8 2 TL032M, TL032AM FK PACKAGE (TOP VIEW) NC OFFSET N1 NC NC NC 4 NC VCC- NC OFFSET N2 NC NC IN- NC IN+ NC 1 1IN- 1OUT NC 4OUT 4IN- OFFSET N1 IN- IN+ VCC- TL034x, TL034Ax D, J, N, OR PW PACKAGE (TOP VIEW) * DALLAS, TEXAS 75265 1IN+ NC VCC+ NC 2IN+ 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2IN- 2OUT NC 3OUT 3IN- TL031x, TL031Ax D, JG, OR P PACKAGE (TOP VIEW) 4IN+ NC VCC- NC 3IN+ TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 AVAILABLE OPTIONS PACKAGED DEVICES TA 0C to 70C -40C to 85C -55C to 125C VIOMAX AT 25C SMALL OUTLINE (D) CHIP CARRIER (FK) CERAMIC DIP (J) CERAMIC DIP (JG) PLASTIC DIP (N) PLASTIC DIP (P) TSSOP (PW) 0.8 mV TL031ACD TL032ACD -- -- -- -- TL031ACP TL032ACP -- 1.5 mV TL031CD TL032CD TL034ACD -- -- -- TL034ACN TL031CP TL032CP -- 4 mV TL034CD -- -- -- TL034CN 0.8 mV TL031AID TL032AID -- -- -- 1.5 mV TL031ID TL032ID TL034AID -- -- -- TL034AIN 4 mV TL034ID -- -- -- TL034IN 0.8 mV TL031AMD TL032AMD TL031AMFK TL032AMFK -- TL031AMJG TL032AMJG 1.5 mV TL031MD TL032MD TL034AMD TL031MFK TL032MFK TL034AMFK TL034AMJ 4 mV TL034MD TL034MFK TL034MJ TL031MJG TL032MJG -- -- -- TL034AMN TL034MN -- TL034CPW TL031AIP TL032AIP -- TL031IP TL032IP -- -- -- TL031AMP TL032AMP -- TL031MP TL032MP -- -- -- The D and PW packages are available taped and reeled and are indicated by adding an R suffix to device type (e.g., TL034CDR or TL034CPWR). POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 symbol (each amplifier) IN- - IN+ + OUT equivalent schematic (each amplifier) VCC+ Q5 Q14 Q2 D1 Q3 R4 Q6 IN+ IN- JF1 Q11 OUT Q8 Q10 JF2 R7 Q17 R3 Q15 R6 C1 Q1 Q4 See Note A OFFSET N1 OFFSET N2 Q12 JF3 Q9 R8 Q7 R1 R2 Q16 R5 Q13 VCC- NOTE A: OFFSET N1 and OFFSET N2 are available only on the TL031, TL031A. 4 JF4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage (see Note 1): VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V VCC- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -18 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V Input voltage, VI (any input) (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 mA Output current, IO (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA Total current into VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA Total current out of VCC- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA Duration of short-circuit current at (or below) 25C (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Package thermal impedance, JA (see Note 5): D package (8 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97C/W D package (14 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113C/W Lead temperature 1,6 mm (1 /16 inch) from case for 10 seconds: D, N, P, or PW package . . . . . . . . . 260C Lead temperature 1,6 mm (1 /16 inch) from case for 60 seconds: J or JG package . . . . . . . . . . . . . . . 300C Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC-. 2. Differential voltages are at IN+ with respect to IN-. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. 5. The package thermal impedance is calculated in accordance with JESD 51-7. DISSIPATION RATING TABLE PACKAGE TA 25C POWER RATING DERATING FACTOR ABOVE TA = 25C TA = 70C POWER RATING TA = 85C POWER RATING TA = 125C POWER RATING FK 1375 mW 11.0 mW/C 880 mW 715 mW 275 mW J 1375 mW 11.0 mW/C 880 mW 715 mW 275 mW JG 1050 mW 8.4 mW/C 672 mW 546 mW 210 mW recommended operating conditions VCC Supply voltage VIC Common mode input voltage Common-mode TA Operating free-air temperature C SUFFIX I SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX 5 15 5 15 5 15 VCC = 5 V -1.5 4 -1.5 4 -1.5 4 VCC = 15 V -11.5 14 -11.5 14 -11.5 14 0 70 -40 85 -55 125 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 UNIT V V C 5 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL031C and TL031AC electrical characteristics at specified free-air temperature TL031C, TL031AC PARAMETER TA TEST CONDITIONS VCC = 5 V MIN 25C VIO Input offset voltage VO = 0, VIC = 0, 0 RS = 50 VO = 0, VIC = 0 See Figure 5 25C 1 100 1 100 70C 9 200 12 200 VO = 0, VIC = 0 See Figure 5 25C 2 200 2 200 70C 50 400 80 400 -1.5 to 4 Full range -1.5 to 4 RL = 10 k RL = 10 k 4.3 13 14 3 4.2 13 14 70C 3 4.3 13 14 25C -3 -4.2 -12.5 -13.9 0C -3 -4.1 -12.5 -13.9 70C -3 -4.2 -12.5 -14 25C 4 12 5 14.3 0C 3 11.1 4 13.5 70C 4 13.3 5 15.2 ci Input capacitance 25C VO = 0,, RS = 50 5 pA pA V V V/mV 1012 4 pF 25C 70 87 75 94 0C 70 87 75 94 70C 70 87 75 94 25C 75 96 75 96 0C 75 96 75 96 70C 75 96 75 96 V/mo V -11.5 to 14 1012 25 -13.4 to 15.4 3 25C kSVR -11.5 to 14 0C Input resistance Supply-voltage rejection ratio (VCC/VIO) -3.4 to 5.4 25C ri VIC = VICRmin, i VO = 0 0, RS = 50 59 5.9 V/C V/C 25C RL = 10 k mV 1.8 0.04 VICR Common-mode C d rejection ratio 3.8 0.8 0.04 Common mode input Common-mode voltage range CMRR 0.34 25C Input bias current AVD Full range 2.5 2.8 59 5.9 IIB Large-signal differential voltage amplification 0.41 71 7.1 Input offset current VOM- 1.5 TL031AC IIO Maximum M i negative ti peakk output voltage swing 0.5 25 C to 25C 70C VO = 0, VIC =0, RS = 50 VOM+ MAX 71 7.1 Input offset voltage long-term drift Maximum M i positive iti peak k output voltage swing 3.5 UNIT TYP 4.5 25C TL031AC 0.54 range MIN 25 C to 25C 70C VO = 0, VIC =0, 0 RS = 50 IO Full MAX TL031C Temperature coefficient of input offset voltage aV TL031C VCC = 15 V TYP dB dB Full range is 0C to 70C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. At V CC = 5 V, VO = 2.3 V; at VCC = 15 V, VO = 10 V 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL031C and TL031AC electrical characteristics at specified free-air temperature (continued) TL031C, TL031AC PARAMETER TEST CONDITIONS VCC = 5 V TA MIN PD ICC Total power dissipation Supply pp y current VO = 0, No load VO = 0,, No load VCC = 15 V TYP MAX 25C 1.9 MIN UNIT TYP MAX 2.5 6.5 8.4 0C 1.8 2.5 6.3 8.4 70C 1.9 2.5 6.3 8.4 25C 192 250 217 280 0C 184 250 211 280 70C 189 250 210 280 mW A TL031C and TL031AC operating characteristics at specified free-air temperature TL031C, TL031AC PARAMETER TEST CONDITIONS TA VCC = 5 V MIN SR+ SR- SR tr tf Positive slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Negative slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Rise time Fall time Overshoot factor TYP 25C 2 Vn Equivalent input noise voltage g B1 m MIN TYP 1.5 2.9 0C 1.8 1 2.6 2.2 1.5 3.2 25C 3.9 1.5 5.1 0C 3.7 1.5 5 70C 4 1.5 5 VI(PP) = 10 mV, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 138 132 0C 134 127 70C 150 142 VI(PP) = 10 mV, RL = 10 k, CL = 100 pF See Figure 1 25C 138 132 0C 134 127 70C 150 142 VI(PP) = 10 mV, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 11% 5% 0C 10% 4% 70C 12% 6% 61 61 41 41 61 61 41 41 RS = 20 See Figure 3 TL031AC In MAX 70C f = 10 Hz TL031C VCC = 15 V f = 1 kHz 25C f = 10 Hz f = 1 kHz 25C Equivalent input noise current f = 1 kHz 25C 0.003 0.003 25C 1 1.1 Unity-gain Unity gain bandwidth VI = 10 mV RL = 10 k, CL = 25 pF See Figure 4 0C 1 1.1 70C 1 1 VI = 10 mV RL = 10 k, CL = 25 pF See Figure 4 25C 61 65 0C 61 65 70C 60 64 Phase margin g at unityy gain g UNIT MAX V/s V/s ns ns nV/H nV/Hz 60 pA/Hz MHz For VCC = 5 V, VI(PP) = 1 V; for VCC = 15 V, VI(PP) = 5 V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL031I and TL031AI electrical characteristics at specified free-air temperature TL031I, TL031AI PARAMETER TA TEST CONDITIONS VCC = 5 V MIN TYP 25C VIO Input offset voltage VO = 0, 0, VIC = 0 RS = 50 TL031I 0.54 Full range MIN 3.5 TYP 0.5 5.3 25C TL031AI VCC = 15 V MAX 0.41 Full range UNIT MAX 1.5 3.3 2.8 0.34 4.6 0.8 mV 2.6 TL031I 25 C to 25C 85C 65 6.5 62 6.2 TL031AI 25C 25 C to 85C 65 6.5 62 6.2 25C 0 04 0.04 0 04 0.04 Temperature coefficient off input offset voltage VO = 0, VIC = 0 0, RS = 50 Input offset voltage long-term drift VO = 0, VIC = 0 0, RS = 50 1 100 1 100 pA Input offset current VO = 0, VIC = 0 See Figure 5 25C IIO 85C 0.02 0.45 0.02 0.45 nA 2 200 2 200 pA Input bias current VO = 0, VIC = 0 See Figure 5 25C IIB 85C 0.2 0.9 0.2 0.9 nA VICR Common mode input Common-mode voltage range aV IO VOM+ VOM- AVD Maximum M i positive iti peak k output voltage swing M i ti peakk Maximum negative output voltage swing Large-signal differential voltage amplification RL = 10 k RL = 10 k RL = 10 k V/C V/C 25C -1.5 to 4 Full range -1.5 to 4 -3.4 to 5.4 -11.5 to 14 25 V/mo V/mo -13.4 to 15.4 V -11.5 to 14 25C 3 4.3 13 14 -40C 3 4.1 13 14 85C 3 4.4 13 14 25C -3 -4.2 -12.5 -13.9 -40C -3 -4.1 -12.5 -13.8 85C -3 -4.2 -12.5 -14 14.3 25C 4 12 5 -40C 3 8.4 4 11.6 85C 4 13.5 5 15.3 V V V/mV ri Input resistance 25C 1012 1012 ci Input capacitance 25C 5 4 pF CMRR Common-mode C d rejection ratio kSVR Supply-voltage rejection ratio (VCC/VIO) VIC = VICRmin, i VO = 0 0, RS = 50 VO = 0,, RS = 50 25C 70 87 75 94 -40C 70 87 75 94 85C 70 87 75 94 25C 75 96 75 96 -40C 75 96 75 96 85C 75 96 75 96 dB dB Full range is -40C to 85C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. At V CC = 5 V, VO = 2.3 V; at VCC = 15 V, VO = 10 V 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL031I and TL031AI electrical characteristics at specified free-air temperature (continued) TL031I, TL031AI PARAMETER TEST CONDITIONS VCC = 5 V TA MIN PD ICC Total power dissipation Supply pp y current VO = 0, No load VO = 0,, No load VCC = 15 V TYP MAX MIN UNIT TYP MAX 25C 1.9 2.5 6.5 8.4 -40C 1.4 2.5 5.4 8.4 85C 1.9 2.5 6.2 8.4 25C 192 250 217 280 -40C 144 250 181 280 85C 189 250 207 280 mW A TL031I and TL031AI operating characteristics at specified free-air temperature TL031I, TL031AI PARAMETER TEST CONDITIONS TA VCC = 5 V MIN SR+ SR- SR tr tf Positive slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 N ti slew l t att unity it Negative rate gain k CL = 100 pF F RL = 10 k, See Figure 1 Rise time Fall time Overshoot factor TYP Vn TYP 1.5 2.9 2 -40C 1.6 1 2.1 85C 2.3 1.5 3.3 25C 3.9 1.5 5.1 -40C 3.3 1.5 4.8 85C 4.1 1.5 4.9 VI(PP) = 10 mV, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 138 132 -40C 132 123 85C 154 146 VI(PP) = 10 mV, RL = 10 k, CL = 100 pF See Figure 1 25C 138 132 -40C 132 123 85C 154 146 VI(PP) = 10 mV, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 11% 5% -40C 12% 5% 85C 13% 7% 61 61 41 41 61 61 41 41 25C 0 003 0.003 0 003 0.003 RS = 20 See Figure 3 TL031AI f = 1 kHz 25C f = 10 Hz f = 1 kHz 25C In Equivalent input noise current f = 1 kHz 1 1.1 Unity-gain Unity gain bandwidth VI = 10 mV RL = 10 k, CL = 25 pF See Figure 4 25C B1 -40C 1 1.1 85C 0.9 1 VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 25C 61 65 -40C 60 65 85C 60 64 m TL031I MIN 25C f = 10 Hz Equivalent input i t noise voltage VCC = 15 V MAX Phase margin g at unityy gain g UNIT MAX V/s V/s ns ns nV/H nV/Hz 60 pA/H pA/Hz MHz For VCC = 5 V, VI(PP) = 1 V; for VCC = 15 V, VI(PP) = 5 V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL031M and TL031AM electrical characteristics at specified free-air temperature TL031M, TL031AM PARAMETER TA TEST CONDITIONS VCC = 5 V MIN 25C VIO aV Input offset voltage Temperature coefficient of IO input offset voltage VO = 0, VIC = 0 0, RS = 50 VO = 0, VIC = 0 0, RS = 50 TL031M Full MAX 0.54 3.5 range MIN 0.41 Full range UNIT TYP MAX 0.5 1.5 6.5 25C TL031AM VCC = 15 V TYP 4.5 2.8 0.34 5.8 0.8 mV 3.8 TL031M 25C to 125C 5.1 4.3 TL031AM 25C to 125C 5.1 4.3 25C 0.04 0.04 V/C V/C Input offset voltage long-term drift VO = 0, VIC = 0, RS = 50 1 100 1 100 pA Input offset current VO = 0, VIC = 0 See Figure 5 25C IIO 125C 0.2 10 0.2 10 nA 2 200 2 200 pA Input bias current VO = 0, VIC = 0 See Figure 5 25C IIB 125C 7 20 8 20 nA VICR Common mode input Common-mode voltage range VOM+ VOM- AVD Maximum M i positive iti peak k output voltage swing M i ti peakk Maximum negative output voltage swing Large-signal differential voltage amplification 25C Full range RL = 10 k RL = 10 k RL = 10 k -1.5 to 4 -3.4 to 5.4 -11.5 to 14 -1.5 to 4 V/mo -13.4 to 15.4 V -11.5 to 14 25C 3 4.3 13 14 -55C 3 4.1 13 14 125C 3 4.4 13 14 25C -3 -4.2 -12.5 -13.9 -55C -3 -4 -12.5 -13.8 125C -3 -4.3 -12.5 -14 25C 4 12 5 14.3 -55C 3 7.1 4 10.4 125C 3 12.9 4 15 V V V/mV ri Input resistance 25C 1012 1012 ci Input capacitance 25C 5 4 pF CMRR Common-mode C d rejection ratio kSVR PD VIC = VICRmin, i VO = 0 0, RS = 50 Supply-voltage rejection ratio (VCC/VIO) VO = 0, Total power p dissipation p VO = 0,, RS = 50 No load 25C 70 87 75 94 -55C 70 87 70 94 125C 70 87 70 94 25C 75 96 75 96 -55C 75 96 75 95 125C 75 96 75 96 dB dB 25C 1.9 2.5 6.5 8.4 -55C 1.1 2.5 4.7 8.4 125C 1.8 2.5 5.8 8.4 mW Full range is -55C to 125C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. At V CC = 5 V, VO = 2.3 V; at VCC = 15 V, VO = 10 V 10 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL031M and TL031AM electrical characteristics at specified free-air temperature (continued) TL031M, TL031AM PARAMETER TEST CONDITIONS TA VCC = 5 V MIN MAX 192 -55C 125C 25C ICC Supply pp y current VO = 0,, No load VCC = 15 V TYP MIN UNIT TYP MAX 250 217 280 114 250 156 280 178 250 197 280 A TL031M and TL031AM operating characteristics at specified free-air temperature TL031M, TL031AM PARAMETER TEST CONDITIONS TA VCC = 5 V MIN SR+ SR- SR tr tf Positive slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Negative slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Rise time VI(PP) = 10 mV, RL = 10 k, CL = 100 pF See Figures 1 and 2 VI(PP) = 10 mV, RL = 10 k, CL = 100 pF See Figure 1 Fall time VI(PP) = 10 mV, RL = 10 k, CL = 100 pF See Figures 1 and 2 Overshoot factor TYP Vn RS = 20 See Figure 3 TL031AM In B1 m f = 1 kHz MIN TYP 25C 2 1.5 2.9 1.4 1 1.9 125C 2.4 1 3.5 25C 3.9 1.5 5.1 -55C 3.2 1 4.6 125C 4.1 1 4.7 25C 138 132 -55C 142 123 125C 166 158 25C 138 132 -55C 142 123 125C 166 158 25C 11% 5% -55C 16% 6% 125C 14% 8% 61 61 41 41 61 61 41 41 25C f = 10 Hz f = 1 kHz MAX -55C f = 10 Hz TL031M Equivalent input noise voltage VCC = 15 V 25C Equivalent input noise current f = 1 kHz 25C 0 003 0.003 0 003 0.003 25C 1 1.1 Unity-gain Unity gain bandwidth VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 -55C 1 1.1 125C 0.9 0.9 25C 61 65 -55C 57 64 125C 59 62 Phase margin g at unityy gain g VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 UNIT MAX V/s V/s ns ns nV/H nV/Hz pA/H pA/Hz MHz For VCC = 5 V, VI(PP) = 1 V; for VCC = 15 V, VI(PP) = 5 V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL032C and TL032AC electrical characteristics at specified free-air temperature TL032C, TL032AC PARAMETER TA TEST CONDITIONS VCC = 5 V MIN 25C VIO Input offset voltage TL032C VO = 0, VIC = 0 0, RS = 50 TL032AC Full range 0.04 25C 1 100 1 100 70C 9 200 12 200 25C 2 200 2 200 70C 50 400 80 400 VIC = 0 VICR Common mode input Common-mode voltage range 25C Full range mV 1.8 0.04 VO = 0, See Figure 5 RL = 10 k 3.8 0.8 25C Input bias current Large-signal differential voltage amplification 0.39 10.8 IIB RL = 10 k 2.5 2.8 11.5 VIC = 0 AVD 4.5 0.53 25C to 70C VO = 0, See Figure 5 Maximum negative peak output voltage swing 1.5 TL032AC Input offset current VOM- 0.57 10.8 IIO RL = 10 k MAX 11.5 VO = 0, VIC = 0, RS = 50 Maximum positive peak output voltage swing 3.5 UNIT TYP 25C to 70C Input offset voltage long-term drift VOM+ 0.69 MIN TL032C VO = 0, 0, VIC = 0 RS = 50 IO MAX range 25C Temperature coefficient ffi i t off input i t offset voltage aV Full VCC = 15 V TYP V/C V/C -1.5 to 4 -3.4 to 5.4 -1.5 to 4 -11.5 to 14 25 V/mo pA pA -13.4 to 15.4 V -11.5 to 14 25C 3 4.3 13 14 0C 3 4.2 13 14 70C 3 4.3 13 14 25C -3 -4.2 -12.5 -13.9 0C -3 -4.1 -12.5 -13.9 70C -3 -4.2 -12.5 -14 25C 4 12 5 14.3 0C 3 11.1 4 13.5 70C 4 13.3 5 15.2 V V V/mV ri Input resistance 25C 1012 1012 ci Input capacitance 25C 5 14 pF CMRR Common-mode C d rejection ratio kSVR Supply-voltage rejection ratio (VCC/VIO) VIC = VICRmin, i VO = 0 0, RS = 50 VCC = 5 V tto 15 V V, VO = 0 0, RS = 50 25C 70 87 75 94 0C 70 87 75 94 70C 70 87 75 94 25C 75 96 75 96 0C 75 96 75 96 70C 75 96 75 96 dB dB Full range is 0C to 70C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. At V CC = 5 V, VO = 2.3 V; at VCC = 15 V, VO = 10 V 12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL032C and TL032AC electrical characteristics at specified free-air temperature (continued) TL032C, TL032AC PARAMETER TEST CONDITIONS VCC = 5 V TA MIN Total T t l power dissipation di i ti (two amplifiers) PD VO = 0, No load ICC Supply current (two amplifiers) 0, VO = 0 VO1/VO2 Crosstalk attenuation AVD = 100 dB No load VCC = 15 V TYP MAX 25C 3.8 0C 3.7 70C MIN UNIT TYP MAX 5 13 17 5 12.7 17 3.8 5 12.6 17 0C 368 500 422 560 70C 378 500 420 560 25C 120 120 mW A A dB TL032C and TL032AC operating characteristics at specified free-air temperature TL032C, TL032AC PARAMETER TEST CONDITIONS TA VCC = 5 V MIN SR+ SR- SR tr tf Positive slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Negative slew rate at unity gain k CL = 100 pF F RL = 10 k, See Figure 1 Rise time Fall time Overshoot factor TYP 25C 1.2 Vn Equivalent input noise voltage g TYP 1.5 2.9 0C 1.8 1 2.6 2.2 1.5 3.2 25C 3.9 1.5 5.1 0C 3.7 1.5 5 70C 4 1.5 5 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 138 132 0C 134 127 70C 150 142 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 138 132 0C 134 127 70C 150 142 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 11% 5% 0C 10% 4% 70C 12% 6% 49 49 41 41 49 49 RS = 20 See Figure 3 TL032AC f = 1 kHz 25C f = 10 Hz 41 41 Equivalent input noise current f = 1 kHz 25C 0.003 0.003 1 1.1 Unity-gain Unity gain bandwidth VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 25C B1 0C 1 1.1 70C 1 1 VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 25C 61 65 0C 61 65 70C 60 64 Phase margin g at unityy gain g f = 1 kHz 25C In m MIN 70C f = 10 Hz TL032C VCC = 15 V MAX UNIT MAX V/s V/s ns ns nV/Hz 60 pA/Hz MHz For VCC = 5 V, VI(PP) = 1 V; for VCC = 15 V, VI(PP) = 5 V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL032I and TL032AI electrical characteristics at specified free-air temperature TL032I, TL032AI PARAMETER TA TEST CONDITIONS VCC = 5 V MIN 25C VIO aV IO IIO Input offset voltage Temperature coefficient ffi i t off input i t offset voltage VO = 0, 0, VIC = 0 RS = 50 Input offset voltage long-term drift VO = 0, VIC = 0, RS = 50 Input offset current VO = 0, See Figure 5 IIB Input bias current VICR Common mode input Common-mode voltage range VOM+ VOM- VO = 0, 0, VIC = 0 RS = 50 Maximum positive peak output voltage swing Maximum negative peak output voltage swing VO = 0, See Figure 5 TL032I MAX 0.69 3.5 Full range MIN 0.53 Full range UNIT TYP MAX 0.57 1.5 5.3 25C TL032AI VCC = 15 V TYP 3.3 2.8 0.39 4.6 0.8 mV 2.6 TL032I 25C to 85C 11.4 10.8 TL032AI 25C to 85C 11.4 10.8 25C 0.04 0.04 25C 1 100 1 100 pA 85C 0.02 0.45 0.02 0.45 nA 25C 2 200 2 200 pA 85C 0.2 0.9 0.3 0.9 nA VIC = 0 VIC = 0 25C Full range RL = 10 k RL = 10 k V/C V/C -1.5 to 4 -3.4 to 5.4 -1.5 to 4 -11.5 to 14 25 V/mo -13.4 to 15.4 V -11.5 to 14 25C 3 4.3 13 14 -40C 3 4.2 13 14 85C 3 4.4 13 14 25C -3 -4.2 -12.5 -13.9 -40C -3 -4.1 -12.5 -13.8 85C -3 -4.2 -12.5 -14 -40C 3 8.4 4 11.6 85C 4 13.5 5 15.3 V V AVD Large-signal differential RL = 10 k voltage amplification ri Input resistance 25C 1012 1012 ci Input capacitance 25C 5 4 pF CMRR Common-mode C d rejection ratio kSVR Supply-voltage rejection ratio (VCC/VIO) 25C 70 87 75 94 VIC = VICRmin, i VO = 0 0, RS = 50 -40C 70 87 75 94 85C 70 87 75 94 VCC = 5 V tto 15 V V, VO = 0 0, RS = 50 25C 75 96 75 96 -40C 75 96 75 96 85C 75 96 75 96 V/mV dB dB Full range is -40C to 85C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. At V CC = 5 V, VO = 2.3 V; at VCC = 15 V, VO = 10 V 14 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL032I and TL032AI electrical characteristics at specified free-air temperature (continued) TL032I, TL032AI PARAMETER TEST CONDITIONS VCC = 5 V TA MIN PD ICC VO1/VO2 Total power dissipation (two amplifiers) VO = 0, Supply S l currentt (two amplifiers) VO = 0, Crosstalk attenuation No load No load AVD = 100 dB VCC = 15 V TYP MAX MIN UNIT TYP MAX 25C 3.8 5 13 17 -40C 2.9 5 10.9 17 85C 3.7 5 12.4 17 25C 384 500 434 560 -40C 288 500 362 560 85C 372 500 414 560 25C 120 120 mW A dB TL032I and TL032AI operating characteristics at specified free-air temperature TL032I, TL032AI PARAMETER TEST CONDITIONS TA VCC = 5 V MIN SR+ SR- SR tr tf Positive slew rate at unity gain RL = 10 k, CL = 100 pF TYP TYP 25C 2 1.5 2.9 -40C 1.6 1 2.1 85C 2.3 1.5 3.3 25C 3.9 1.5 5.1 -40C 3.3 1.5 4.8 85C 4.1 1.5 4.9 RL = 10 k, CL = 100 pF 25C 138 132 Rise time VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 -40C 132 123 85C 154 146 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figure 1 25C 138 132 -40C 132 123 85C 154 146 25C 11% 5% -40C 12% 5% 85C 13% 7% 49 49 41 41 49 49 41 41 25C 0.003 0.003 Fall time VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 f = 10 Hz TL032I Equivalent input noise voltage g RS = 20 See Figure 3 TL032AI f = 1 kHz 25C f = 10 Hz f = 1 kHz 25C In Equivalent input noise current f = 1 kHz 1 1.1 Unity-gain Unity gain bandwidth VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 25C B1 -40C 1 1.1 85C 0.9 1 VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 25C 61 65 -40C 61 65 85C 60 64 m MIN Negative slew rate at unity gain Overshoot factor Vn VCC = 15 V MAX Phase margin g at unityy gain g UNIT MAX V/s V/s ns ns nV/Hz 60 pA/Hz MHz For VCC = 5 V, VI(PP) = 1 V; for VCC = 15 V, VI(PP) = 5 V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 15 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL032M and TL032AM electrical characteristics at specified free-air temperature TL032M, TL032AM PARAMETER TEST CONDITIONS TA VCC = 5 V MIN 25C VIO aV IO IIO Input offset voltage Temperature coefficient of input offset voltage VO = 0, 0, VIC = 0 RS = 50 Input offset voltage long-term drift VO = 0, VIC = 0, RS = 50 Input offset current VO = 0, See Figure 5 IIB Input bias current VICR Common mode input Common-mode voltage range VOM+ VOM- AVD VO = 0, 0, VIC = 0 RS = 50 Maximum M i positive iti peak k output voltage swing Maximum M i negative ti peakk output voltage swing Large-signal differential voltage amplification VO = 0, See Figure 5 TL032M 0.57 1.5 4.5 2.8 0.39 5.8 9.7 TL032AM 25C to 125C 9.7 9.7 25C 0.04 0.04 25C 1 125C 25C 125C VIC = 0 VIC = 0 25C Full range RL = 10 k RL = 10 k RL = 10 k VIC = VICRmin, i VO = 0 0, RS = 50 VCC = 5 V tto 15 V V, VO = 0 0, RS = 50 -1.5 to 4 100 1 0.2 10 2 200 7 20 -3.4 to 5.4 -1.5 to 4 -11.5 to 14 pA 0.2 10 nA 2 200 pA 8 20 nA -13.4 to 15.4 V -11.5 to 14 3 4.3 13 14 3 4.1 13 14 125C 3 4.4 13 14 25C -3 -4.2 -12.5 -13.9 -55C -3 -4 -12.5 -13.8 125C -3 -4.3 -12.5 -14 25C 4 12 5 14.3 -55C 3 7.1 4 10.4 125C 3 12.9 4 15 1012 5 V V V/mV 1012 4 pF 25C 70 87 75 94 -55C 70 87 70 94 125C 70 87 70 94 25C 75 96 75 96 -55C 75 95 75 95 125C 75 96 75 96 V/mo 100 25C 25C mV V/C V/C -55C Input capacitance 0.8 3.8 9.7 ci Supply-voltage rejection ratio (VCC/VIO) MAX 6.5 0.53 UNIT TYP TL032M 25C kSVR 3.5 MIN 25C to 125C Input resistance Common-mode C d rejection j ti ratio 0.69 Full range ri CMRR MAX Full range 25C TL032AM VCC = 15 V TYP dB dB Full range is -55C to 125C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150C extrapolated to A TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. At V CC = 5 V, VO = 2.3 V; at VCC = 15 V, VO = 10 V 16 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL032M and TL032AM electrical characteristics at specified free-air temperature (continued) TL032M, TL032AM PARAMETER TEST CONDITIONS TA VCC = 5 V MIN PD ICC VO1/VO2 Total power dissipation (two amplifiers) VO = 0, VO = 0, Supply S l currentt (two amplifiers) VO = 0, Crosstalk attenuation No load No load AVD = 100 dB VCC = 15 V TYP MAX MIN UNIT TYP MAX 25C 3.8 5 13 17 -55C 2.3 5 9.4 17 125C 3.6 5 11.8 17 25C 384 500 434 560 -55C 228 500 312 560 125C 356 500 394 560 25C 120 120 mW A dB TL032M and TL032AM operating characteristics at specified free-air temperature TL032M, TL032AM PARAMETER TEST CONDITIONS TA VCC = 5 V MIN SR+ SR- SR tr tf Positive slew rate at unity gain RL = 10 k, k CL = 100 pF F See and Figure 1 Negative slew rate at unity gain RL = 10 k, k CL = 100 pF F See and Figure 1 Rise time VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 Fall time Overshoot factor TYP Vn In B1 m TL032M TYP 2 1.5 2.9 -55C 1.4 1 1.9 125C 2.4 1 3.5 25C 3.9 1.5 5.1 -55C 3.2 1 4.6 125C 4.1 1 4.7 25C 138 132 -55C 142 123 125C 166 58 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figure 1 25C 138 132 -55C 142 123 125C 166 158 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 11% 5% -55C 16% 6% 125C 14% 8% 49 49 41 41 49 49 41 41 25C 0.003 0.003 RS = 20 See Figure 3 TL032AM f = 1 kHz 25C f = 10 Hz f = 1 kHz Equivalent input noise current f = 1 kHz Unity-gain Unity gain bandwidth VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 Phase margin g at unityy gain g MIN 25C f = 10 Hz Equivalent input noise voltage VCC = 15 V MAX VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 25C 25C 1 1.1 -55C 1 1.1 125C 0.9 0.9 25C 61 65 -55C 57 64 125C 59 62 UNIT MAX V/s V/s ns ns nV/Hz pA/Hz MHz For VCC = 5 V, VI(PP) = 1 V; for VCC = 15 V, VI(PP) = 5 V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 17 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL034C and TL034AC electrical characteristics at specified free-air temperature TL034C, TL034AC PARAMETER TEST CONDITIONS TA VCC = 5 V MIN TYP 25C VIO Input offset voltage VO = 0, 0, VIC = 0 RS = 50 TL034C 0.91 Full range MIN 6 TYP 0.79 8.2 25C TL034AC VCC = 15 V MAX 0.7 Full range UNIT MAX 4 6.2 3.5 0.58 5.7 1.5 3.7 TL034C 25C to 70C 11.6 12 TL034AC 25C to 70C 11.6 12 25C 0.04 0.04 Temperature coefficient of input offset voltage VO = 0, VIC = 0 0, RS = 50 Input offset voltage long-term drift VO = 0, VIC = 0, RS = 50 1 100 1 100 Input offset current VO = 0, VIC = 0 See Figure 5 25C IIO 70C 9 200 12 200 2 200 2 200 Input bias current VO = 0, VIC = 0 See Figure 5 25C IIB 70C 50 400 80 400 VICR Common mode input Common-mode voltage range aV IO VOM+ VOM- AVD Maximum M i positive iti peak k output voltage swing Maximum M i negative ti peakk output voltage swing Large-signal differential voltage amplification 25C Full range RL = 10 k RL = 10 k RL = 10 k mV V/C V/C -1.5 to 4 -3.4 to 5.4 -1.5 to 4 -11.5 to 14 25 V/mo pA pA -13.4 to 15.4 V -11.5 to 14 25C 3 4.3 13 14 0C 3 4.2 13 14 70C 3 4.3 13 14 25C -3 -4.2 -12.5 -13.9 0C -3 -4.1 -12.5 -13.9 70C -3 -4.2 -12.5 -14 25C 4 12 5 14.3 0C 3 11.1 4 13.5 70C 4 13.3 5 15.2 V V V/mV ri Input resistance 25C 1012 1012 ci Input capacitance 25C 5 14 pF CMRR Common-mode C d rejection ratio kSVR Supply-voltage rejection ratio (VCC/VIO) VIC = VICRmin, VO = 0, RS = 50 VO = 0,, RS = 50 25C 70 87 75 94 0C 70 87 75 94 70C 70 87 75 94 25C 75 96 75 96 0C 75 96 75 96 70C 75 96 75 96 dB dB Full range is 0C to 70C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. At V CC = 5 V, VO = 2.3 V; at VCC = 15 V, VO = 10 V 18 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL034C and TL034AC electrical characteristics at specified free-air temperature (continued) TL034C, TL034AC PARAMETER TEST CONDITIONS VCC = 5 V TA MIN Total T t l power dissipation di i ti (two amplifiers) PD Supply S l currentt (four (f amplifiers) ICC VO1/VO2 Crosstalk attenuation VO = 0, No load VO = 0, No load AVD = 100 VCC = 15 V TYP MAX 25C 7.7 0C 7.4 70C MIN UNIT TYP MAX 10 26 34 10 25.3 34 7.6 10 25.2 34 25C 0.77 1 0.87 1.12 0C 0.74 1 0.85 1.12 70C 0.76 1 0.84 1.12 25C 120 120 mW mA dB TL034C and TL034AC operating characteristics at specified free-air temperature TL034C, TL034AC PARAMETER TEST CONDITIONS TA VCC = 5 V MIN SR+ SR- SR tr tf Positive slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Negative slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Rise time Fall time Overshoot factor TYP 25C 2 Vn Equivalent input noise voltage g TYP 1.5 2.9 0C 1.8 1 2.6 2.2 1.5 3.2 25C 3.9 1.5 5.1 0C 3.7 1.5 5 70C 4 1.5 5 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 138 132 0C 134 127 70C 150 142 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figure 1 25C 138 132 0C 134 127 70C 150 142 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 11% 5% 0C 10% 4% 70C 12% 6% 83 83 43 43 83 83 RS = 20 See Figure 3 TL034AC f = 1 kHz 25C f = 10 Hz 43 43 Equivalent input noise current f = 1 kHz 25C 0.003 0.003 1 1.1 Unity-gain Unity gain bandwidth VI = 10 mV RL = 10 k, CL = 25 pF See Figure 4 25C B1 0C 1 1.1 70C 1 1 VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 25C 61 65 0C 61 65 70C 60 64 Phase margin g at unityy gain g f = 1 kHz 25C In m MIN 70C f = 10 Hz TL034C VCC = 15 V MAX UNIT MAX V/s V/s ns ns nV/Hz 60 pA/Hz MHz For VCC = 5 V, VI(PP) = 1 V; for VCC = 15 V, VI(PP) = 5 V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 19 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL034I and TL034AI electrical characteristics at specified free-air temperature TL034I, TL034AI PARAMETER TA TEST CONDITIONS VCC = 5 V MIN 25C VIO Input offset voltage VO = 0, VIC = 0, 0 RS = 50 TL034I MAX 0.91 3.6 Full range MIN TYP 0.79 9.3 25C TL034AI VCC = 15 V TYP 0.7 Full range UNIT MAX 4 7.3 3.5 0.58 6.8 1.5 mV 4.8 TL034I 25C to 85C 11.5 11.6 TL034AI 25C to 85C 11.5 11.6 25C 0.04 0.04 Temperature coefficient of input offset voltage VO = 0, VIC =0 0, RS = 50 Input offset voltage long-term drift VO = 0, VIC = 0, RS = 50 1 100 1 100 pA Input offset current VO = 0, VIC = 0 See Figure 5 25C IIO 85C 0.02 0.45 0.02 0.45 nA 2 200 2 200 pA Input bias current VO = 0, VIC = 0 See Figure 5 25C IIB 85C 0.2 0.9 0.3 0.9 nA aV IO VICR VOM+ 25C Common mode input Common-mode voltage range Maximum M i positive iti peak k output voltage swing Full range RL = 10 k -40C 3 4.1 13 14 85C 3 4.4 13 14 25C -3 -4.2 -12.5 -13.9 -40C -3 -4.1 -12.5 -13.8 85C -3 -4.2 -12.5 -14 -40C 4 12 5 14.3 85C 3 8.4 4 11.6 ri Input resistance 25C ci Input capacitance 25C kSVR Supply-voltage rejection ratio (VCC/ VIO) VO = 0,, RS = 50 V -11.5 to 14 14 RL = 10 k 1012 5 V V V/mV 1012 4 pF 25C 70 87 75 94 -40C 70 87 75 94 85C 70 87 75 94 25C 75 96 75 96 -40C 75 96 75 96 85C 75 96 75 96 V/mo -13.4 to 15.4 13 Large-signal differential voltage amplification VIC = VICRmin, VO = 0, RS = 50 -1.5 to 4 -11.5 to 14 4.3 AVD Common-mode C d rejection ratio -3.4 to 5.4 3 RL = 10 k CMRR -1.5 to 4 25C Maximum negative peak output voltage swing VOM- V/C V/C 25 dB dB Full range is -40C to 85C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150C extrapolated to A TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. At V CC = 5 V, VO = 2.3 V; at VCC = 15 V, VO = 10 V 20 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL034I and TL034AI electrical characteristics at specified free-air temperature (continued) TL034I, TL034AI PARAMETER TEST CONDITIONS TA VCC = 5 V MIN Total T t l power dissipation di i ti (four amplifiers) PD Supply S l currentt (four amplifiers) ICC VO1/VO2 Crosstalk attenuation VO = 0, No load VO = 0, No load AVD = 100 VCC = 15 V TYP MAX MIN UNIT TYP MAX 25C 7.7 10 26 34 -40C 5.8 10 21.7 34 85C 7.4 10 24.8 34 25C 0.77 1 0.87 1.12 -40C 0.58 1 0.72 1.12 85C 0.74 1 0.83 1.12 25C 120 120 mW mA dB TL034I and TL034AI operating characteristics TL034I, TL034AI PARAMETER TEST CONDITIONS TA VCC = 5 V MIN SR+ SR- SR tr tf Positive slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Negative slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Rise time VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 Fall time Overshoot factor TYP Vn Equivalent input noise voltage g B1 m 1.5 2.9 2 -40C 1.6 1 2.1 85C 2.3 1.5 3.3 25C 3.9 1.5 5.1 -40C 3.3 1.5 4.8 85C 4.1 1.5 4.9 25C 138 132 -40C 132 123 85C 154 146 25C 138 132 -40C 132 123 85C 154 146 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 11% 5% -40C 12% 5% 85C 13% 7% 83 83 43 43 83 83 43 43 25C 0.003 0.003 RS = 20 See Figure 3 f = 1 kHz 25C f = 10 Hz f = 1 kHz Equivalent input noise current f = 1 kHz Unity-gain Unity gain bandwidth VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 Phase margin g at unityy gain g TYP VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 TL034AI In MIN 25C f = 10 Hz TL034I VCC = 15 V MAX VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 25C 25C 1 1.1 -40C 1 1.1 85C 0.9 1 25C 61 65 -40C 61 65 85C 60 64 UNIT MAX V/s V/s ns ns nV/Hz 60 pA/Hz MHz For VCC = 5 V, VI(PP) = 1 V; for VCC = 15 V, VI(PP) = 5 V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 21 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL034M and TL034AM electrical characteristics at specified free-air temperature TL034M, TL034AM PARAMETER TA TEST CONDITIONS VCC = 5 V MIN 25C VIO Input offset voltage VO = 0, VIC = 0, 0 RS = 50 TL034M MAX 0.91 3.6 Full range MIN 0.7 Full range UNIT TYP MAX 0.78 4 0.58 1.5 11 25C TL034AM VCC = 15 V TYP 9 3.5 8.5 mV 6.5 TL034M 25C to 125C 10.6 10.9 TL034AM 25C to 125C 10.6 10.9 25C 0.04 0.04 Temperature coefficient of input offset voltage VO = 0, VIC = 0, 0 RS = 50 Input offset voltage long-term drift VO = 0, VIC = 0, RS = 50 1 100 1 100 pA Input offset current VO = 0, VIC = 0 See Figure 5 25C IIO 125C 0.2 10 0.2 10 nA 2 200 2 200 pA Input bias current VO = 0, VIC = 0 See Figure 5 25C IIB 125C 7 20 8 20 nA aV IO VICR VOM+ VOM- AVD 25C Common mode input Common-mode voltage range Maximum M i positive iti peak k output voltage swing Maximum M i negative ti peakk output voltage swing Large-signal differential voltage amplification Full range RL = 10 k RL = 10 k RL = 10 k V/C V/C -1.5 to 4 -3.4 to 5.4 -1.5 to 4 -11.5 to 14 V/mo -13.4 to 15.4 V -11.5 to 14 25C 3 4.3 13 14 -55C 3 4.1 13 14 125C 3 4.4 13 14 25C -3 -4.2 -12.5 -13.9 -55C -3 -4 -12.5 -13.8 125C -3 -4.3 -12.5 -14 25C 4 12 5 14.3 -55C 3 7.1 4 10.4 125C 3 12.9 4 15 V V V/mV ri Input resistance 25C 1012 1012 ci Input capacitance 25C 5 4 pF CMRR Common-mode C d rejection ratio kSVR Supply-voltage rejection ratio (VCC/VIO) VIC = VICRmin, i VO = 0 0, RS = 50 VO = 0,, RS = 50 25C 70 87 75 94 -55C 70 87 70 94 125C 70 87 70 94 25C 75 96 75 96 -55C 75 95 75 95 125C 75 96 75 96 dB dB Full range is -55C to 125C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. At V CC = 5 V, VO = 2.3 V; at VCC = 15 V, VO = 10 V 22 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TL034M and TL034AM electrical characteristics at specified free-air temperature (continued) TL034M, TL034AM PARAMETER TEST CONDITIONS VCC = 5 V TA MIN Total T t l power dissipation di i ti (two amplifiers) PD Supply S l currentt (two amplifiers) ICC VO1/VO2 Crosstalk attenuation VO = 0, No load VO = 0, No load AVD = 100 VCC = 15 V TYP MAX MIN UNIT TYP MAX 25C 7.7 10 26 34 -55C 4.6 12 18.7 45 125C 7.1 12 23.6 45 25C 0.77 1 0.87 1.12 -55C 0.46 1.2 0.62 1.5 125C 0.71 1.2 0.79 1.5 25C 120 120 mW mA dB TL034M and TL034AM operating characteristics at specified free-air temperature TL034M, TL034AM PARAMETER TEST CONDITIONS TA VCC = 5 V MIN SR+ SR- SR tr tf Positive slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Negative slew rate at unity gain RL = 10 k, k CL = 100 pF F See Figure 1 Rise time VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 Fall time Overshoot factor TYP Vn B1 m 2 1.5 2.9 -55C 1.4 1 1.9 125C 2.4 1 3.5 25C 3.9 1.5 5.1 -55C 3.2 1 4.6 125C 4.1 1 4.7 25C 138 132 -55C 142 123 125C 166 58 25C 138 132 -55C 142 123 125C 166 158 VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figures 1 and 2 25C 11% 5% -55C 16% 6% 125C 14% 8% 83 83 43 43 83 83 43 43 25C 0.003 0.003 RS = 20 See Figure 3 f = 1 kHz 25C f = 10 Hz f = 1 kHz Equivalent input noise current f = 1 kHz Unity-gain Unity gain bandwidth VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 Phase margin g at unityy gain g TYP VI(PP) = 10 V, RL = 10 k, CL = 100 pF See Figure 1 TL034AM In MIN 25C f = 10 Hz TL034M Equivalent input noise voltage VCC = 15 V MAX VI = 10 mV, RL = 10 k, CL = 25 pF See Figure 4 25C 25C 1 1.1 -55C 1 1.1 125C 0.9 0.9 25C 61 65 -55C 57 64 125C 59 62 UNIT MAX V/s V/s ns ns nV/Hz pA/Hz MHz For VCC = 5 V, VI(PP) = 1 V; for VCC = 15 V, VI(PP) = 5 V POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 23 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 PARAMETER MEASUREMENT INFORMATION VCC+ - + VI Overshoot VO 90% VCC- CL (see Note A) RL 10% tr NOTE A: CL includes fixture capacitance. Figure 1. Slew-Rate and Overshoot Test Circuit Figure 2. Rise Time and Overshoot Waveform 10 k VCC+ 10 k - 100 VO + VI VCC+ VCC- - VO CL (see Note A) RL VCC- RS RS NOTE A: CL includes fixture capacitance. Figure 4. Unity-Gain Bandwidth and Phase-Margin Test Circuit Figure 3. Noise-Voltage Test Circuit VCC+ Ground Shield - + VCC- Picoammeters Figure 5. Input-Bias and Offset-Current Test Circuit 24 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 PARAMETER MEASUREMENT INFORMATION typical values Typical values presented in this data sheet represent the median (50% point) of device parametric performance. input bias and offset current At the picoampere bias current level typical of the TL03x and TL03xA, accurate measurement of the bias current becomes difficult. Not only does this measurement require a picoammeter, but test-socket leakages easily can exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but with no device in the socket. The device is then inserted into the socket and a second test that measures both the socket leakage and the device input bias current is performed. The two measurements are then subtracted algebraically to determine the bias current of the device. noise With the increasing emphasis on low noise levels in many of today's applications, the input noise voltage density is performed at f = 1 kHz, unless otherwise noted. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 25 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Distribution of TL03x input offset voltage 6-11 Distribution of TL03x input offset-voltage temperature coefficient Input bias current vs Common-mode input voltage 15 Input bias current and input offset current vs Free-air temperature 16 Common-mode input voltage vs Supply voltage 17 Common-mode input voltage vs Free-air temperature Output voltage vs Differential input voltage 18 19, 20 Maximum peak output voltage vs Supply voltage 21 Maximum peak-to-peak output voltage vs Frequency 22 Maximum peak output voltage vs Output current 23, 24 Maximum peak output voltage vs Free-air temperature 25, 26 Large-signal differential voltage amplification vs Load resistance 27 Large-signal differential voltage amplification and Phase shift vs Frequency 28 Large-signal differential voltage amplification vs Free-air temperature 29 Output impedance vs Frequency 30 Common-mode rejection ratio vs Frequency 26 12-14 31, 32 Common-mode rejection ratio vs Free-air temperature 33 Supply-voltage rejection ratio vs Free-air temperature 34 Short-circuit output current vs Supply voltage 35 Short-circuit output current vs Time 36 Short-circuit output current vs Free-air temperature 37 Equivalent input noise voltage vs Frequency (TL031 and TL031A) 38 Equivalent input noise voltage vs Frequency (TL032 and TL032A) 39 Equivalent input noise voltage vs Frequency (TL034 and TL034A) 40 Supply current vs Supply voltage (TL031 and TL031A) 41 Supply current vs Supply voltage (TL032 and TL032A) 42 Supply current vs Supply voltage (TL034 and TL034A) 43 Supply current vs Free-air temperature (TL031 and TL031A) 44 Supply current vs Free-air temperature (TL032 and TL032A) 45 Supply current vs Free-air temperature (TL034 and TL034A) 46 Slew rate vs Load resistance 47, 48 Slew rate vs Free-air temperature 49, 50 Overshoot factor vs Load capacitance 51 Total harmonic distortion vs Frequency 52 Unity-gain bandwidth vs Supply voltage 53 Unity-gain bandwidth vs Free-air temperature 54 Phase margin vs Supply voltage 55 Phase margin vs Load capacitance 56 Phase margin vs Free-air temperature 57 Voltage-follower small-signal pulse response 58 Voltage-follower large-signal pulse response 59, 60 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TL031 INPUT OFFSET VOLTAGE Percentage of Units - % 12 10 IIIIIIIIII IIIIIIIIII IIIII IIIII IIII IIII 16 1681 Units Tested From 1 Wafer Lot VCC = 15 V TA = 25C P Package 14 Percentage of Units - % 14 DISTRIBUTION OF TL031A INPUT OFFSET VOLTAGE 8 6 4 2 0 12 10 1433 Units Tested From 1 Wafer Lot VCC = 15 V TA = 25C P Package IIIII IIIII 8 6 4 2 -1.2 -0.6 0 0.6 0 -900 1.2 -600 -300 Figure 6 6 3 0 -1.2 -0.6 0 600 900 DISTRIBUTION OF TL032A INPUT OFFSET VOLTAGE 0.6 1.2 15 Percentage of Amplifiers - % Percentage of Amplification - % IIIIIIIIIII IIIIIIIIIII IIIII IIIII IIII IIII 1681 Amplifiers Tested From 1 Wafer Lot VCC = 15 V TA = 25C P Package 9 300 Figure 7 DISTRIBUTION OF TL032 INPUT OFFSET VOLTAGE 12 0 VIO - Input Offset Voltage - V VIO - Input Offset Voltage - mV 12 1321 Amplifiers Tested From 1 Wafer Lot VCC = 15 V TA = 25C P Package 9 6 3 0 -900 -600 -300 0 300 600 900 VIO - Input Offset Voltage - V VIO - Input Offset Voltage - mV Figure 9 Figure 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 27 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TL034 INPUT OFFSET VOLTAGE 9 IIIIIIIIIIII IIIII IIIII IIII 1681 Amplifiers Tested From 1 Wafer Lot VCC = 15 V TA = 25C D Package 6 3 0 -1.2 -0.6 0 0.6 IIIIIIIIIIII IIIIIIIIIIII IIIIII IIIIII IIIII 15 Percentage of Amplifiers - % Percentage of Amplifiers - % 12 DISTRIBUTION OF TL034A INPUT OFFSET VOLTAGE 12 1716 Amplifiers Tested From 3 Wafer Lots VCC = 15 V TA = 25C N Package 9 6 3 0 -1.8 1.2 -1.2 VIO - Input Offset Voltage - mV 0.6 1.2 1.8 Figure 11 DISTRIBUTION OF TL031 INPUT OFFSET-VOLTAGE TEMPERATURE COEFFICIENT DISTRIBUTION OF TL032 INPUT OFFSET-VOLTAGE TEMPERATURE COEFFICIENT 76 Units Tested From 1 Wafer Lot VCC = 15 V TA = 25C to 125C P Package Percentage of Amplifiers - % Percentage of Units - % 0.6 VIO - Input Offset Voltage - mV Figure 10 24 0 18 12 6 IIIIIIIIIIIII IIIIIIIIIIIII IIIIIII IIIIIII 30 160 Amplifiers Tested From 2 Wafer Lots VCC = 15 V TA = 25C to 125C 25 P Package 20 15 10 5 0 -30 aV IO -20 -10 0 10 20 30 - Input Offset-Voltage Temperature Coefficient - V/C 0 -40 aV -30 IO -10 0 Figure 13 POST OFFICE BOX 655303 10 20 - Temperature Coefficient - V/C Figure 12 28 -20 * DALLAS, TEXAS 75265 30 40 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS DISTRIBUTION OF TL034 INPUT OFFSET-VOLTAGE TEMPERATURE COEFFICIENT 25 IIIIIIIIIIII IIIIIIIIIIII IIIIII 10 160 Amplifiers Tested From 2 Wafer Lots VCC = 15 V TA = 25C to 125C D Package VCC = 15 V TA = 25C IIB I IB - Input Bias Current - nA Percentage of Amplifiers - % 30 INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE 20 15 10 5 0 -5 5 0 -40 -30 aV IO -20 -10 0 10 20 30 -10 -15 40 -10 -5 0 5 10 VIC - Common-Mode Input Voltage - V - Temperature Coefficient - V/C Figure 15 INPUT BIAS CURRENT AND INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE COMMON-MODE INPUT VOLTAGE vs SUPPLY VOLTAGE 16 10 1 III III IIB 0.1 II II IIO 0.01 0.001 25 IIIII IIIII TA = 25C VCC = 15 V VO = 0 VIC = 0 VIC V IC - Common-Mode Input Voltage - V I IO - Input Bias and Input Offset Current - nA IIIB IB and IIO Figure 14 AAAAA AAAAA AAAAA 45 65 85 105 TA - Free-Air Temperature - C 125 AA AA AA 12 Positive Limit 8 4 0 IIIII IIIII -4 Negative Limit -8 -12 -16 0 2 Figure 16 15 4 6 8 10 12 |VCC| - Supply Voltage - V 14 16 Figure 17 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 29 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE vs FREE-AIR TEMPERATURE 20 15 IIIII Positive Limit 10 RL = 1 k RL = 2 k RL = 5 k RL = 10 k RL = 20 k 1 5 0 -5 AAA AAA IIIII IIIII IIII IIIII IIII IIIII IIIII 1.5 VO - Output Voltage - V VIC V IC - Common-Mode Input Voltage - V VCC = 15 V 0.5 0 VCC = 5 V TA = 25C IIII IIII IIII III III -0.5 RL = 20 k RL = 10 k RL = 5 k RL = 2 k RL = 1 k -10 -15 IIIII IIIII -1 Negative Limit -20 -75 -50 -25 0 25 50 75 TA - Free-Air Temperature -C 100 -1.5 -5 125 -4 -3 Figure 18 VO - Output Voltage - V 1 RL = 10 k RL = 20 k RL = 50 k 0 -1 -1.5 -15 EEEE EEEE EEEE EEEE 30 2 3 4 5 RL = 50 k RL = 20 k RL = 10 k RL = 5 k -10 -5 0 5 10 VID - Differential Input Voltage - V 15 RL = 10 k TA = 25C 12 VOM+ 8 4 0 III III -4 VOM- AA AA -8 -12 -16 0 2 Figure 20 1 16 RL = 5 k 0.5 -0.5 0 MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE VOM - Maximum Peak Output Voltage - V VOM VCC = 15 V TA = 25C -1 Figure 19 OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 1.5 -2 VID - Differential Input Voltage - V 4 6 8 10 12 |VCC| - Supply Voltage - V 14 16 Figure 21 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS MAXIMUM PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT IIIII IIIII 30 5 |VOM | - Maximum Peak Output Voltage - V VO(PP) VOPP - Maximum Peak-to-Peak Output Voltage - V MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY RL = 10 k VCC = 15 V 25 20 15 TA = -55C 10 TA = 125C VCC = 5 V AA AA AA 5 VOM+ 4 10 k 100 k f - Frequency - Hz 1M VOM- 3 2 1 0 0 1k Figure 22 VOM VOM - Maximum Peak Output Voltage - V III III IIII IIII VOM- 10 8 VOM+ 6 4 2 0 0 5 20 MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE VCC = 15 V TA = 25C 12 15 Figure 23 5 14 10 |IO| - Output Current - mA 16 |VOM | - Maximum Peak Output Voltage - V 5 0 MAXIMUM PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT 10 15 20 |IO| - Output Current - mA 25 30 IIII 4 VOM+ 3 2 1 0 -1 IIIII IIIII VCC = 5 V RL = 10 k III III -2 AAA AAA -3 VOM- -4 -5 -75 -50 -25 0 25 50 75 100 125 TA - Free-Air Temperature - C Figure 24 VCC = 5 V TA = 25C Figure 25 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 31 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs LOAD RESISTANCE MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 40 12 VOM+ 35 A VD - Large-Signal Differential Voltage Amplification - V/mV VOM VOM - Maximum Peak Output Voltage - V 16 8 4 0 -4 AA AA AA IIIII IIIII VCC = 15 V RL = 10 k III III -8 VOM- -12 -16 -75 -50 -25 0 VO = 1 V TA = 25C VCC = 15 V 30 25 20 VCC = 5 V 15 10 5 25 50 75 100 0 125 10 k 100 k RL - Load Resistance - TA - Free-Air Temperature -C Figure 26 1M Figure 27 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY 100 k 0 1k III III IIII IIII 30 60 AVD 100 90 Phase Shift 10 120 1 0.1 10 Phase Shift A VD - Large-Signal Differential Voltage Amplification 10 k VCC = 15 V RL = 10 k CL = 25 pF TA = 25C 150 100 1k 10 k 100 k f - Frequency - Hz 1M 180 10 M Figure 28 32 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 50 OUTPUT IMPEDANCE vs FREQUENCY IIII IIII 200 AA zzo o - Output Impedence - A VD - Large-Signal Differential Voltage Amplification - V/mV RL = 10 k VCC = 15 V 10 VCC = 5 V 100 80 60 AVD = 10 40 AA AA 1 -75 AVD = 100 AVD = 1 20 VCC = 15 V ro (open loop) 250 TA = 25C IIIII 10 -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C 1k 125 Figure 29 Figure 30 COMMON-MODE REJECTION RATIO vs FREQUENCY VCC = 5 V TA = 25C 90 80 70 60 50 40 30 20 10 0 IIII IIII 100 CMRR - Common-Mode Rejection Ratio - dB CMRR - Common-Mode Rejection Ratio - dB COMMON-MODE REJECTION RATIO vs FREQUENCY IIII IIII 100 VCC = 15 V TA = 25C 90 80 70 60 50 40 30 20 10 0 10 100 1k 10 k 100 k f - Frequency - Hz 1M 10 M 10 100 Figure 31 100 k 10 k f - Frequency - Hz 1k 10 k 100 k f - Frequency - Hz 1M 10 M Figure 32 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 33 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS SUPPLY-VOLTAGE REJECTION RATIO vs FREE-AIR TEMPERATURE COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE 100 kSVR - Supply Voltage Rejection Ratio - dB CMRR - Common-Mode Rejection Ratio - dB 95 VCC = 15 V 90 VCC = 5 V 85 80 IIIII IIIII VIC = VICRmin 75 -75 -50 -25 0 25 50 75 100 VCC = 5 V to 15 V 98 96 94 92 90 -75 125 -50 -25 TA - Free-Air Temperature - C 75 100 125 SHORT-CIRCUIT OUTPUT CURRENT vs TIME 30 30 VO = 0 TA = 25C IIOS OS - Short-Circuit Output Current - mA IIOS OS - Short-Circuit Output Current - mA 50 Figure 34 SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE 20 VID = 100 mV 10 0 VID = -100 mV -10 AA AA -20 -30 VID = 100 mV 20 10 0 AA IIIIII AAIIIIII IIIIII VID = -100 mV -10 VCC = 15 V TA = 25C -20 0 2 4 6 8 10 12 |VCC| - Supply Voltage - V 14 16 0 Figure 35 34 25 TA - Free-Air Temperature - C Figure 33 0 5 10 15 20 t - Time - s 25 30 Figure 36 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS TL031 and TL031A EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY SHORT-CIRCUIT OUTPUT CURRENT vs FREE-AIR TEMPERATURE AA AA IIIII AAAAA IIIII AA AAAAA IIIII AA AAAAA IIIII Vn nV/ Hz V n- Equivalent Input Noise Voltage - nVHz 25 I OS - Short-Circuit Output Current - mA VCC = 15 V 20 15 IIIII IIIII VID = 100 mV 10 5 0 -5 -10 -15 -20 VCC = 5 V IIIIII IIIII IIIII IIIII IIIII VID = -100 mV VCC = 5 V VCC = 15 V III III VO = 0 -25 -75 70 VCC = 15 V RS = 20 TA = 25C See Figure 3 60 50 40 -50 -25 0 25 50 75 TA - Free-Air Temperature - C 100 10 125 100 Figure 38 Figure 37 TL032 and TL032A EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY AA AAAAA AA AA AAAAA AAAAA AA AA AA VCC = 15 V RS = 20 TA = 25C See Figure 3 V n- Equivalent Input Noise Voltage - nV/ Vn nVHzHz V n - Equivalent Input Noise Voltage - nVHz nV/ Hz Vn 60 50 40 TL034 and TL034A EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY AAAA AAAA AAAA 90 VCC = 15 V RS = 20 TA = 25C See Figure 3 80 70 60 50 40 30 10 100 1k 10 k f - Frequency - Hz 100 k 10 Figure 39 100 k 1k 10 k f - Frequency - Hz 100 1k 10 k f - Frequency - Hz 11 k Figure 40 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 35 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS AAAA AAAA AAAA TL031 and TL031A SUPPLY CURRENT vs SUPPLY VOLTAGE 250 500 VO = 0 No Load VO = 0 No Load IICC CC - Supply Current -A A 200 A IICC CC - Supply Current - A AAA AAA TA = 25C 150 TA = 125C AA AA 400 TA = 25C 300 AA AA AA 100 TA = -55C 50 TA = 125C 200 TA = -55C 100 0 0 2 4 6 8 10 12 |VCC| - Supply Voltage - V 14 0 16 0 2 4 6 8 10 12 |VCC| - Supply Voltage - V Figure 41 III III III 1000 250 AAA AAA AAA VO = 0 No Load TA = 25C 600 TA = 125C AA AA AA 200 VCC = 15 V VCC = 5 V 150 AA AA 400 TA = -55C 200 100 50 0 0 2 4 6 8 10 12 |VCC| - Supply Voltage - V 14 16 0 -75 -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C 125 Figure 44 Figure 43 36 16 TL031 and TL031A SUPPLY CURRENT vs FREE-AIR TEMPERATURE TL034 and TL034A SUPPLY CURRENT vs SUPPLY VOLTAGE A IICC CC - Supply Current - A IICC CC - Supply Current -A A 800 14 Figure 42 VO = 0 No Load TL032 and TL032A SUPPLY CURRENT vs SUPPLY VOLTAGE Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS TL034 and TL034A SUPPLY CURRENT vs FREE-AIR TEMPERATURE TL032 and TL032A SUPPLY CURRENT vs FREE-AIR TEMPERATURE AAAA AAAA AAAA IIII IIII AA AA VO = 0 No Load VCC = 15 V VCC = 5 V 300 AA AA 200 100 0 -75 -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C VCC = 5 V 600 400 200 0 -75 125 -50 SLEW RATE vs LOAD RESISTANCE 4 IIIII IIIII IIIII IIIII SR- 5 SR- 3 SR+ 1 4 3 II SR+ IIIIII IIIIII IIIIII IIIIII 2 VCC = 15 V CL = 100 pF TA = 25C See Figure 1 1 0 0 1 10 RL - Load Resistance - k 100 1 Figure 47 125 III 6 VCC = 5 V CL = 100 pF TA = 25C See Figure 1 2 100 SLEW RATE vs LOAD RESISTANCE SR - Slew Rate - V/s s SR - Slew Rate - V/s s 5 -25 0 25 50 75 TA - Free-Air Temperature - C Figure 46 Figure 45 6 VCC = 15 V 800 400 IICC CC - Supply Current -A A A IICC CC - Supply Current -A VO = 0 No Load IIIII IIIII IIIII IIIII 1000 500 10 RL - Load Resistance - k 100 Figure 48 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 37 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS SLEW RATE vs FREE-AIR TEMPERATURE SLEW RATE vs FREE-AIR TEMPERATURE IIIII IIIII IIIII IIIII 6 5 SR- SR - Slew Rate - V/s s 5 SR - Slew Rate - V/s s 6 VCC = 5 V RL = 10 k CL = 100 pF See Figure 1 4 SR- 3 2 SR+ 1 4 3 SR+ IIIIII IIIIII IIIIII IIIIII 2 1 0 -75 -50 -25 0 25 50 75 TA - Free-Air Temperature - C 100 0 -75 125 VCC = 15 V RL = 10 k CL = 100 pF See Figure 1 -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C Figure 49 Figure 50 OVERSHOOT FACTOR vs LOAD CAPACITANCE 0.5 VI(PP) = 10 mV RL = 10 k TA = 25C See Figure 1 50 Overshoot Factor - % TOTAL HARMONIC DISTORTION vs FREQUENCY IIIII IIIII 40 VCC = 5 V 30 IIIIII 20 VCC = 15 V 10 0 0 50 100 150 200 CL - Load Capacitance - pF 250 THD - Total Harmonic Distortion - % 60 0.4 VCC = 15 V AVD = 1 VO(rms) = 6 V TA = 25C 0.3 0.2 0.1 100 Figure 51 38 125 1k 10 k f - Frequency - Hz 100 k Figure 52 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS UNITY-GAIN BANDWIDTH vs FREE-AIR TEMPERATURE UNITY-GAIN BANDWIDTH vs SUPPLY VOLTAGE 1.05 AAAAA AAAAA AAAAA AAAAA 1.0 0.95 2 4 6 8 10 12 |VCC|- Supply Voltage - V 14 VI = 10 mV RL = 10 k CL = 25 pF See Figure 4 1.2 VCC+ = 15 V 1.1 1.0 VCC = 5 V 0.9 0.8 -75 0.9 0 16 -50 -25 70 AAAAA AAAAA AAAAA AAAAA 75 100 125 VI = 10 mV RL = 10 k CL = 25 pF TA = 25C See Figure 4 AA AA 59 VI = 10 mV RL = 10 k TA = 25C See Figure 4 See Note A VCC = 15 V 66 61 AAAA AAAA AAAA AAAA IIII AAAA IIII IIIII 68 64 62 60 58 IIII IIII 56 VCC = 5 V 54 52 50 0 10 0 2 4 6 8 10 12 14 16 |VCC| - Supply Voltage - V 20 30 40 50 60 70 80 90 100 CL - Load Capacitance - pF 57 NOTE A: Values of phase margin below a load capacitance of 25 pF were estimated. Figure 55 50 PHASE MARGIN vs LOAD CAPACITANCE m - Phase Margin m - Phase Margin AA AA AA 25 Figure 54 PHASE MARGIN vs SUPPLY VOLTAGE 63 0 TA - Free-Air Temperature - C Figure 53 65 AAAAA AAAAA AAAAA AAAAA 1.3 VI = 10 mV RL = 10 k CL = 25 pF TA = 25C See Figure 4 B1 B1 - Unity-Gain Bandwidth - MHz B1 B1 - Unity-Gain Bandwidth - MHz 1.1 Figure 56 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 39 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 TYPICAL CHARACTERISTICS PHASE MARGIN vs FREE-AIR TEMPERATURE VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE IIIII IIIII 67 16 VCC = 15 V 12 V VO O - Output Voltage - mV m - Phase Margin 65 63 VCC = 5 V 61 4 VI = 10 mV RL = 10 k CL = 25 pF See Figure 4 57 VCC = 15 V RL = 10 k CL = 100 pF TA = 25C See Figure 1 0 AA AA IIIII IIIII IIIII IIIII 59 55 -75 8 AAAAA AAAAA AAAAA AAAAA AAAAA -4 -8 -12 -16 -50 -25 0 25 50 75 TA - Free-Air Temperature -C 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 t - Time - s 0 125 Figure 57 Figure 58 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 2 8 6 VO VO - Output Voltage - V VO VO - Output Voltage - V 1 VCC = 5 V RL = 10 k CL = 100 pF TA = 25C See Figure 1 0 AA AA AA AA -1 4 AAAAA AAAAA AAAAA AAAAA AAAAA 2 VCC = 15 V RL = 10 k CL = 100 pF TA = 25C See Figure 1 0 -2 -4 -6 -2 0 1 2 3 4 t - Time - s 5 6 7 8 -8 0 40 4 6 8 10 t - Time - s 12 14 16 18 Figure 60 Figure 59 2 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 APPLICATION INFORMATION input characteristics The TL03x and TL03xA are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction. Due to of the extremely high input impedance and resulting low bias-current requirements, the TL03x and TL03xA are well suited for low-level signal processing; however, leakage currents on printed circuit boards and sockets easily can exceed bias-current requirements and cause degradation in system performance. It is a good practice to include guard rings around inputs (see Figure 61). These guard rings should be driven from a low-impedance source at the same voltage level as the common-mode input. Unused amplifiers should be connected as grounded unity-gain followers to avoid oscillation. + VO + VI (a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER + VI - VO - - VI VO (c) UNITY-GAIN AMPLIFIER Figure 61. Use of Guard Rings POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 41 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 APPLICATION INFORMATION output characteristics All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance. The TL03x and TL03xA drive higher capacitive loads; however, as the load capacitance increases, the resulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value of the load capacitance at which oscillation occurs varies with production lots. If an application appears to be sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate the problem (see Figure 63). Capacitive loads of 1000 pF and larger can be driven if enough resistance is added in series with the output (see Figure 62). (a) CL = 100 pF, R = 0 (b) CL = 300 pF, R = 0 (c) CL = 350 pF, R = 0 (d) CL = 1000 pF, R = 0 (e) CL = 1000 pF, R = 50 (f) CL = 1000 pF, R = 2 k Figure 62. Effect of Capacitive Loads 15 V - -5 V R VO + 5V - 15 V CL (see Note A) 10 k NOTE A: CL includes fixture capacitance. Figure 63. Test Circuit for Output Characteristics 42 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 APPLICATION INFORMATION high-Q notch filter In general, Texas Instruments enhanced-JFET operational amplifiers serve as excellent filters. The circuit in Figure 64 provides a narrow notch at a specific frequency. Notch filters are designed to eliminate frequencies that are interfering with the operation of an application. For this filter, the center frequency can be calculated as: fO + 2p 1 R1 C1 With the resistors and capacitors shown in Figure 64, the center frequency is 1 kHz. C1 = C3 = C2 + 2 and R1 = R3 = 2 x R2. The center frequency can be modified by varying these values. When adjusting the center frequency, ensure that the operational amplifier has sufficient gain at the frequency required. 15 V - R1 R3 VI VO + 1.5 M 1.5 M -15 V C2 220 pF R3 TL03x 750 k C3 C1 110 pF 110 pF 2 1 0 Gain - dB -1 -2 -3 -4 -5 -6 -7 -8 0.2 0.4 0.6 0.8 1 0.2 0.4 f - Frequency - kHz 0.6 0.8 2 Figure 64. High-Q Notch Filter POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 43 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 APPLICATION INFORMATION transimpedance amplifier The low-power precision TL03x allows accurate measurement of low currents. The high input impedance and low offset voltage of the TL03xA greatly simplify the design of a transimpedance amplifier. At room temperature, this design achieves 10-bit accuracy with an error of less than 1/2 LSB. Assuming that R2 is much less than R1 and ignoring error terms, the output voltage can be expressed as: V O + -I IN R F ) R2 R1 R2 Using the resistor values shown in the schematic for a 1-nA input current, the output voltage equals -0.1 V. If the VO limit for the TL03xA is measured at 12 V, the maximum input current for these resistor values is 120 nA. Similarly, one LSB on a 10-bit scale corresponds to 12 mV of output voltage, or 120 pA of input current. The following equation shows the effect of input offset voltage and input bias current on the output voltage: V O +- V IO )R ) R2 R1 R2 I )I F IO IB If the application requires input protection for the transimpedance amplifier, do not use standard PN diodes. Instead, use low-leakage Siliconix SN4117 JFETs (or equivalent) connected as diodes across the TL03xA inputs (see Figure 65). As with all precision applications, special care must be taken to eliminate external sources of leakage and interference. Other precautions include using high-quality insulation, cleaning insulating surfaces to remove fluxes and other residue, and enclosing the application within a protective box. RF 10 M 15 V + Input Current TL03xA VO - -15 V R1 90 k R2 10 k SN4117 Figure 65. Transimpedance Amplifier 44 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 APPLICATION INFORMATION 4-mA to 20-mA current loops Often, information from an analog sensor must be sent over a distance to the receiving circuitry. For many applications, the most feasible method involves converting voltage information to a current before transmission. The following circuits give two variations of low-power current loops. The circuit in Figure 66 requires three wires from the transmitting to receiving circuitry, while the second variation in Figure 67 requires only two wires, but includes an extra integrated circuit. Both circuits benefit from the high input impedance of the TL03xA because many inexpensive sensors do not have low output impedance. Assuming that the voltage at the noninverting input of the TL03xA is zero, the following equation determines the output current: I O +V R3 I R1 R ) 5V S R3 R2 R + 0.16 S V ) 4mA I The circuits presently provide 4-mA to 20-mA output current for an input voltage of 0 to 100 mV. By modifying R1, R2, and R3, the input voltage range or the output current range can be adjusted. Including the offset voltage of the operational amplifier in the above equation clearly illustrates why the low offset TL03xA was chosen: I O +V I R1 + 0.16 R3 R ) 5V S R3 R2 V ) 4 mA - 0.17 I R V *V S I R1 R3 R ) S R3 R2 R ) R1 R S S I For example, an offset voltage of 1 mV decreases the output current by 0.17 mA. Due to the low power consumption of the TL03xA, both circuits have at least 2 mA available to drive the actual sensor from the 5-V reference node. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 45 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 APPLICATION INFORMATION VCC+ = 10 V 100 k R6 TL431 100 k R7 5 V Ref R2 1 M - R1 VI R5 2N3904 + 5 k 3.3 k TL03xA VEE = -5 V R4 5 k 1N4148 R3 80 k RS IO Signal Common 100 RL 50 Figure 66. Three-Wire 4-mA to 20-mA Current Loop VCC+ = 10 V IN OUT LT1019-5 5 V Ref GND 10 F R2 1 M 8 2 3 4 LTC1044 5 - R1 10 F + VI 5 k TL03xA R4 R3 R5 2N3904 3.3 k 5 k 1N4148 80 k RS IO Signal Common 100 Figure 67. Two-Wire 4-mA to 20-mA Current Loop 46 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 RL 50 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 APPLICATION INFORMATION low-level light-detector preamplifier Applications that need to detect small currents require high input-impedance operational amplifiers; otherwise, the bias currents of the operational amplifier camouflage the current being monitored. Phototransistors provide a current that is proportional to the light reaching the transistor. The TL03x allows even the small currents resulting from low-level light to be detected. In Figure 68, if there is no light, the phototransistor is off and the output is high. As light is detected, the operational amplifier output begins pulling low. Adjusting R4 both compensates for offset voltage of the amplifier and adjusts the point of light detection by the amplifier. 15 V R6 10 k R1 10 k + R3 TIL601 R4 10 k R5 R2 10 k C1 100 pF R7 TL03x VO - 10 k 10 k 5 k -15 V Figure 68. Low-Level Light-Detector Preamplifier POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 47 TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 APPLICATION INFORMATION audio-distribution amplifier This audio-distribution amplifier (see Figure 69) feeds the input signal to three separate output channels. U1A amplifies the input signal with a gain of 10, while U1B, U1C, and U1D serve as buffers to the output channels. The gain response of this circuit is very flat from 20 Hz to 20 kHz. The TL03x allows quick response to the input signal while maintaining low power consumption. R4 1 M U1B - VCC+ C1 1 F VOA + - VI + R1 100 k U1C U1A - R2 100 k VOB + VCC+ C2 100 F R5 10 k U1D - R3 100 k + NOTE A: U1A through U1D = TL03x; VCC+ = 5 V Figure 69. Audio-Distribution Amplifier Circuit 48 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 VOC TL03x, TL03xA ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180C - FEBRUARY 1997 - REVISED DECEMBER 2001 APPLICATION INFORMATION instrumentation amplifier with linear gain adjust The low offset voltage and low power consumption of the TL03x provide an accurate but inexpensive instrumentation amplifier (see Figure 70). This particular configuration offers the advantage that the gain can be linearly set by one resistor: VO = R6 x (VB - VA) R5 Adjusting R6 varies the gain. The value of R6 always should be greater than, or equal to, the value of R5 to ensure stability. The disadvantage of this instrumentation amplifier topology is the high degree of CMRR degradation resulting from mismatches between R1, R2, R3, and R4. For this reason, these four resistors should be 0.1%-tolerance resistors. VCC+ - VA R3 10 k 0.1% R1 10 k 0.1% + U1A U1C - VO + R5 100 k U1B VB R6 1 M U1D - - + + R2 10 k 0.1% R4 10 k 0.1% VCC- R7 100 k NOTE A: U1A through U1D = TL03x; VCC = 15 V Figure 70. Instrumentation Amplifier With Linear Gain-Adjust Circuit POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 49 PACKAGE OPTION ADDENDUM www.ti.com 22-Dec-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 5962-9086102Q2A OBSOLETE LCCC FK 20 TBD Call TI Call TI TL031ACD OBSOLETE SOIC D 8 TBD Call TI Call TI TL031ACP OBSOLETE PDIP P 8 TBD Call TI Call TI TL031AID OBSOLETE SOIC D 8 TBD Call TI Call TI TL031AIP OBSOLETE PDIP P 8 TBD Call TI Call TI TL031CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL031CDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL031CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL031CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL031CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL031CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL031CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL031CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL031CPWLE OBSOLETE TSSOP PW 8 TBD Call TI TL031ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL031IDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL031IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL031IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL031IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL032ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032ACDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032ACDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL032ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) Call TI PACKAGE OPTION ADDENDUM www.ti.com 22-Dec-2008 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TL032AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032AIDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032AIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL032AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL032CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032CDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL032CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL032CPSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032CPSRE4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032CPWLE OBSOLETE TSSOP PW 8 TBD Call TI TL032ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032IDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032IDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL032IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 2 Lead/Ball Finish MSL Peak Temp (3) Call TI PACKAGE OPTION ADDENDUM www.ti.com 22-Dec-2008 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TL032IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL032IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL032MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI TL032MJGB OBSOLETE CDIP JG 8 TBD Call TI Call TI TL034ACD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034ACDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034ACDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034ACDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034ACDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034ACDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034ACN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL034ACNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL034AID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034AIDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034AIDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034AIDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034AIDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034AIN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL034AINE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL034CD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CN ACTIVE PDIP N 14 CU NIPDAU N / A for Pkg Type 25 Addendum-Page 3 Pb-Free Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 22-Dec-2008 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TL034CNE4 ACTIVE PDIP N 14 TL034CNSR ACTIVE SO NS 14 TL034CNSRE4 ACTIVE SO NS TL034CNSRG4 ACTIVE SO TL034CPW ACTIVE TL034CPWE4 Lead/Ball Finish MSL Peak Temp (3) (RoHS) 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CPWLE OBSOLETE TSSOP PW 14 TBD Call TI TL034CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CPWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034ID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034IDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034IDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034IDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL034IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL034INE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL034MD OBSOLETE SOIC D 14 TBD Call TI Call TI TL034MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI TL034MJB OBSOLETE CDIP J 14 TBD Call TI Call TI TL034MN OBSOLETE PDIP N 14 TBD Call TI Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Addendum-Page 4 PACKAGE OPTION ADDENDUM www.ti.com 22-Dec-2008 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 5 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TL031CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL032ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL032AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL032CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL032CPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 TL032IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL034ACDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL034AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL034CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL034CNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 TL034CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TL034IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL031CDR SOIC D 8 2500 340.5 338.1 20.6 TL032ACDR SOIC D 8 2500 340.5 338.1 20.6 TL032AIDR SOIC D 8 2500 340.5 338.1 20.6 TL032CDR SOIC D 8 2500 340.5 338.1 20.6 TL032CPSR SO PS 8 2000 367.0 367.0 38.0 TL032IDR SOIC D 8 2500 340.5 338.1 20.6 TL034ACDR SOIC D 14 2500 367.0 367.0 38.0 TL034AIDR SOIC D 14 2500 367.0 367.0 38.0 TL034CDR SOIC D 14 2500 367.0 367.0 38.0 TL034CNSR SO NS 14 2000 367.0 367.0 38.0 TL034CPWR TSSOP PW 14 2000 367.0 367.0 35.0 TL034IDR SOIC D 14 2500 367.0 367.0 38.0 Pack Materials-Page 2 MECHANICAL DATA MCER001A - JANUARY 1995 - REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0-15 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. 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