PUMH17,115 - NXP - Datasheet.Live

1. Product profile

1.1 General description

NPN/NPN Resistor-Equipped Transistors (RET).

1.2 Features

Built-in bias resistors

Simplifies circuit design

Reduces component count

Reduces pick and place costs

1.3 Applications

Low current peripheral driver

Control of IC inputs

Replaces general-purpose transistors in digit al applications

1.4 Quick reference data

PEMH17; PUMH17

NPN/NPN resistor-equipped transistors;

R1 = 47 kΩ, R2 = 22 kΩ

Rev. 03 — 15 November 2009 Product data sheet

Table 1. Product overview

Type number Package NPN/PNP

complement PNP/PNP

complement

NXP JEITA

PEMH17 SOT666 - PEMD17 PEMB17

PUMH17 SOT363 SC-88 PUMD17 PUMB17

Table 2. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

VCEO collector-emitter voltage open base - - 50 V

IOoutput current (DC) - - 100 mA

R1 bias resistor 1 (input) 33 47 61 kΩ

R2/R1 bias resistor ratio 0.37 0.47 0.57

Product data sheet Rev. 03 — 15 November 2009 2 of 9

NXP Semiconductors PEMH17; PUMH17

NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ

2. Pinning information

3. Ordering information

4. Marking

[1] * = -: made in Hong Kong

* = p: made in Hong Kong

* = t: made in Malaysia

* = W: made in China

Table 3. Pinning

Pin Description Simplified outline Symbol

1 GND (emitter) TR1

2 input (base) TR1

3 output (collector) TR2

4 GND (emitter) TR2

5 input (base) TR2

6 output (collector) TR1 001aab55

6 45

1 32

65 4

123

TR1

TR2

R2 R1

sym063

Table 4. Orderin g i nformation

Type number Package

Name Description Version

PEMH17 - plastic surface mounted package; 6 leads SOT666

PUMH17 SC-88 plastic surface mounted package; 6 leads SOT363

Table 5. Marking codes

Type number Marking code[1]

PEMH17 5T

PUMH17 H4*

Product data sheet Rev. 03 — 15 November 2009 3 of 9

NXP Semiconductors PEMH17; PUMH17

NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ

5. Limiting values

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard

footprint.

[2] Reflow soldering is the only recommended soldering method.

Table 6. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Per transis tor

VCBO collector-base voltage open emitter - 50 V

VCEO collector-emitter voltage open base - 50 V

VEBO emitter-base voltage open collector - 10 V

VIinput voltage

positive - +40 V

negative - −10 V

IOoutput current (DC) - 100 mA

ICM peak collector current - 100 mA

Ptot total power dissipation Tamb ≤25 °C

SOT363 [1] -200mW

SOT666 [1][2] -200mW

Tstg storage temperature −65 +150 °C

Tjjunction temperature - 150 °C

Tamb ambient temperature −65 +150 °C

Per device

Ptot total power dissipation Tamb ≤25 °C

SOT363 [1] -300mW

SOT666 [1][2] -300mW

Product data sheet Rev. 03 — 15 November 2009 4 of 9

NXP Semiconductors PEMH17; PUMH17

NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ

6. Thermal characteristics

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.

[2] Reflow soldering is the only recommended soldering method.

7. Characteristics

Table 7. Thermal characteris tics

Symbol Parameter Conditions Min Typ Max Unit

Per transis tor

Rth(j-a) thermal resistance from

junction to ambient in free air

SOT363 [1] --625K/W

SOT666 [1][2] --625K/W

Per device

Rth(j-a) thermal resistance from

junction to ambient in free air

SOT363 [1] --416K/W

SOT666 [1][2] --416K/W

Table 8. Characteristics

Tamb = 25

C unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Per transis tor

ICBO collector-base cut-off

current VCB =50V; I

E= 0 A - - 100 nA

ICEO collector-emitter

cut-off current VCE =30V; I

B=0A - - 1 μA

VCE =30V; I

B=0A;

Tj= 150 °C--50μA

IEBO emitter-base cut-off

current VEB =5V; I

C=0A - - 110 μA

hFE DC current gain VCE =5V; I

C=5mA 60 - -

VCEsat collector-emitter

saturation voltage IC=10mA; I

B= 0.5 mA - - 150 mV

VI(off) off-state input voltage VCE =5V; I

C= 100 μA-1.71.2V

VI(on) on-state input voltage VCE =0.3V; I

C=2mA 4 2.7 - V

R1 bias resistor 1 (input) 33 47 61 kΩ

R2/R1 bias resistor ratio 0.37 0.47 0.57

Cccollector capacit ance VCB =10V; I

E=i

e=0A;

f=1MHz --2.5pF

Product data sheet Rev. 03 — 15 November 2009 5 of 9

NXP Semiconductors PEMH17; PUMH17

NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ

VCE =5V

(1) Tamb = 100 °C

(2) Tamb =25°C

(3) Tamb =−40 °C

IC/IB=20

(1) Tamb = 100 °C

(2) Tamb =25°C

(3) Tamb =−40 °C

Fig 1. DC current gain as a function of collector

current; typical values Fig 2. Collector-emitter saturation voltage as a

function of collector current; typical values

VCE =0.3V

(1) Tamb =−40 °C

(2) Tamb =25°C

(3) Tamb = 100 °C

VCE =5V

(1) Tamb =−40 °C

(2) Tamb =25°C

(3) Tamb = 100 °C

Fig 3. On-state input voltage as a function of

collector current; typical values Fig 4. Off-state input voltage as a funct ion of

collector current; typical values

IC (mA)

10−1102

101

006aaa184

102

103

hFE

(1)

(2)

(3)

006aaa185

IC (mA)

10−1102

101

102

VCEsat

(mV)

(1)

(2)

(3)

IC (mA)

10−1102

101

006aaa186

102

VI(on)

(V)

10−1

(1)

(2)

(3)

006aaa187

IC (mA)

10−210110−1

VI(off)

(V)

10−1

(1)

(3)

(2)

Product data sheet Rev. 03 — 15 November 2009 6 of 9

NXP Semiconductors PEMH17; PUMH17

NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ

8. Package outline

9. Packing information

[1] For further information and the availability of packing methods, see Section 12.

[2] T1: normal taping

[3] T2: reverse taping

Fig 5. Pac kage outline SOT363 (SC-88) Fig 6. Pa ckage outline SOT666

06-03-16Dimensions in mm

0.25

0.10

0.3

0.2

pin 1

index

1.3

0.65

2.2

2.0

1.35

1.15

2.2

1.8

1.1

0.8

0.45

0.15

132

465

Dimensions in mm 04-11-08

1.7

1.5

1.7

1.5

1.3

1.1

0.18

0.08

0.27

0.17

0.5

pin 1 index

123

456

0.6

0.5

0.3

0.1

Table 9. Packing methods

The indicated -xxx are the last thre e digits of the 12NC ordering code.[1]

Type number Package Description Packing quantity

3000 4000 8000 10000

PEMH17 SOT666 2 mm pitch, 8 mm tape and reel - - -315 -

4 mm pitch, 8 mm tape and reel - -115 - -

PUMH17 SOT363 4 mm pitch, 8 mm tape and reel; T1 [2] -115 - - -135

4 mm pitch, 8 mm tape and reel; T2 [3] -125 - - -165

Product data sheet Rev. 03 — 15 November 2009 7 of 9

NXP Semiconductors PEMH17; PUMH17

NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ

10. Revision history

Table 10. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PEMH17_PUMH17_3 20091115 Product data sheet - PEMH17_PUMH17_2

Modifications: •This data sheet was changed to reflec t the new company name NXP Semiconductors,

including new legal definitions and disclaimers. No changes were made to the technica l

content.

•Figure 5 “Package outline SOT363 (SC-88)”: updated

PEMH17_PUMH17_2 20050503 Product data sheet - PUMH17_1

PUMH17_1 20031009 Product specification - -

Product data sheet Rev. 03 — 15 November 2009 8 of 9

NXP Semiconductors PEMH17; PUMH17

NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ

11. Legal information

11.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

11.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warrant ies as to t he accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short dat a sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full informatio n see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall pre va il.

11.3 Disclaimers

General — In formation in this document is beli eved to be accurate and

reliable. However, NXP Semiconductors d oes not give an y represent ations or

warranties, expressed or impli ed, as to the accuracy or completeness of such

information and shall have no liability for th e co nsequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, milit ary, aircraft,

space or life support equipment, nor in app lications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for il lustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ra tings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other co nditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may af fect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/profile/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conflict between inf ormation in this document and such

terms and conditions, the latter will prevail.

No offer to sell or license — Not hing in this document may be interpret ed or

construed as an of fer t o sell product s that is open for accept ance or the gr ant,

conveyance or implication of any license under any copyrights, paten ts or

other industrial or intellectual property right s.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from national authorities.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

11.4 Trademarks

Notice: All refe renced brands, produc t names, service names and trademarks

are the property of their respective ow ners.

12. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contain s data from the objective specification for product developm ent.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

NXP Semiconductors PEMH17; PUMH17

NPN/NPN resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of rele ase: 15 November 2009

Document identifier: PEMH17_PUMH17_3

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

13. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4

7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4

8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6

9 Packing information . . . . . . . . . . . . . . . . . . . . . 6

10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 7

11 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 8

11.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 8

11.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

11.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

11.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

12 Contact information. . . . . . . . . . . . . . . . . . . . . . 8

13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9