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©2015 Fairchild Semiconductor Corporation 1www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
August 2015
FSBB15CH60D Motion SPM® 3 Series
FSBB15CH60D
Motion SPM® 3 Series
Features
• UL Certified No. E209204 (UL1557)
• 600 V - 15 A 3-Phase IGBT Inverter with Integral Gate
Drivers and Protection
• Low-Loss, Short-Circuit Rated IGBTs
• Very Low Thermal Resistance Using Al2O3 DBC
Substrate
• Built-In Bootstrap Diodes and Dedicated Vs Pins
Simplify PCB Layout
• Separate Open-Emitter Pins from Low-Side IGBTs for
Three-Phase Current Sensing
• Single-Grounded Power Supply
• LVIC Temperature-Sensing Built-In for Temperature
Monitoring
• Isolation Rating: 2500 Vrms / 1 min.
Applications
• Motion Control - Home Appliance / Industrial Motor
Related Resources
•AN-9044 - Motion SPM® 3 Series Users Guide
General Description
FSBB15CH60D is an advanced Motion SPM® 3 module
providing a fully-featured, high-performance inverter
output stage for AC Induction, BLDC, and PMSM
motors. These modules integrate optimized gate drive of
the built-in IGBTs to minimize EMI and losses, while also
providing multiple on-module protection features includ-
ing under-voltage lockouts, over-current shutdown,
thermal monitoring of drive IC, and fault reporting. The
built-in, high-speed HVIC requires only a single supply
voltage and translates the incoming logic-level gate
inputs to the high-voltage, high-current drive signals
required to properly drive the module's internal IGBTs.
Separate negative IGBT terminals are availabl e for each
phase to support the widest variety of control algorithms.
Package Mark ing and Ordering Information
Figure 1. Package Overview
Device Device Marking Package Packing Type Quantity
FSBB15CH60D FSBB15CH60D SPMCC-027 Rail 10
©2015 Fairchild Semiconductor Corporation 2www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Integrated Power Functions
• 600 V - 15 A IGBT inverter for three-phase DC / AC power conversion (Please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
• For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting
control circuit Under-Voltage Lock-Out Protection (UVLO)
Note: Available bootstrap circuit example is given in Figures 5 and 14.
• For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP)
control supply circuit Under-Voltage Lock-Out Protection (UVLO)
• Fault signaling: corresponding to UVLO (low-side supply) and SC faults
• Input interface: active-HIGH interface, works with 3.3 / 5 V logic, Schmitt-trigger input
Pin Configuration
Figure 2. Top View
©2015 Fairchild Semiconductor Corporation 3www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Pin Descriptions
Pin Number Pin Name Pin Description
1V
CC(L) Low-Side Common Bias Voltage for IC and IGBTs Driving
2 COM Common Supply Ground
3IN
(UL) Signal Inpu t for Low-Side U-Phase
4IN
(VL) Signal Input for Low-Side V-Phase
5IN
(WL) Signal Input for Low-Side W-Phase
6V
FO Fault Output
7V
TS Output for LVIC Temperature Sensing Voltage Output
8C
SC Capacitor (Low-Pass Filter) for Short-Circuit Current Detection Input
9IN
(UH) Signal Input for High-Side U-Phase
10 VCC(H) High-Side Common Bias Voltage for IC and IGBTs Driving
11 VB(U) High-Side Bias Voltage for U-Phase IGBT Driving
12 VS(U) High-Side Bias Voltage Ground for U-Phase IGBT Driving
13 IN(VH) Signal Input for High-Side V-Phase
14 VCC(H) High-Side Common Bias Voltage for IC and IGBTs Driving
15 VB(V) High-Side Bias Voltage for V-Phase IGBT Driving
16 VS(V) High-Side Bias Voltage Ground for V Phase IGBT Driving
17 IN(WH) Signal Input for High-Side W-Phase
18 VCC(H) High-Side Common Bias Voltage for IC and IGBTs Driving
19 VB(W) High-Side Bias Voltage for W-Phase IGBT Driving
20 VS(W) High-Side Bias Voltage Ground for W-Phase IGBT Driving
21 NUNegative DC-Link Input for U-Phase
22 NVNegative DC-Link Input for V-Phase
23 NWNegative DC-Link Input for W-Phase
24 U Output for U-Phase
25 V Output for V-Phase
26 W Output for W-Phase
27 P Positive DC-Link Input
©2015 Fairchild Semiconductor Corporation 4www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Internal Equivalent Circuit and Input/Output Pins
Figure 3. Internal Block Diagram
Notes:
1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection functions.
2. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals.
3. Inverter high-side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT.
COM
VCC
IN
IN
IN
VFO
VTS
CSC
OUT
OUT
OUT
NU(21)
NV(22)
NW(23)
U (24)
V ( 25)
W ( 26)
P (27)
(20 ) VS(W)
(19 ) VB(W)
(1 6) VS(V)
(15 ) VB(V)
(8) CSC
(7) VTS
(6) VFO
(5) IN(WL )
(4) IN(VL)
(3) IN(UL )
(2) COM
(1) VCC(L)
VCC
VB
OUT
COM VSIN
VB
VS
OUT
IN
COM
VCC
VCC
VB
OUT
COM VSIN
(18 ) VCC(H)
(17) IN(WH )
(14 ) VCC(H)
(1 3) IN(VH)
(12) V
S(U)
(11 ) VB(U)
(10 ) VCC(H)
(9) IN(UH)
©2015 Fairchild Semiconductor Corporation 5www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Absolute Maximum Ratings (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Control Part
Bootstrap Diode Part
Total System
Thermal Resistance
Note:
4. These values had been made an acquisition by the c alculation considered to design f actor.
5. For the measurement point of case temperature (TC), please refer to Figure 2.
Symbol Parameter Conditions Rating Unit
VPN Supply Voltage Applied between P - NU, NV, NW450 V
VPN(Surge) Supply Voltage (Surge) Applied between P - NU, NV, NW500 V
VCES Collector - Emitter Voltage 600 V
± ICEach IGBT Collector Current TC = 25°C, TJ 150°C (Note 4) 15 A
± ICP Each IGBT Collector Current (Peak) TC = 25°C, TJ 150°C, Under 1 ms Pulse
Width (Note 4) 30 A
PCCollector Dissipation TC = 25°C per One Chip (Note 4) 58 W
TJOperating Junction Temperature -40 ~ 150 °C
Symbol Parameter Conditions Rating Unit
VCC Control Supply Voltage Applied between VCC(H), VCC(L) - COM 20 V
VBS High-Side Control Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V),
VB(W) - VS(W)
20 V
VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH),
IN(UL), IN(VL), IN(WL) - COM -0.3 ~ VCC+0.3 V
VFO Fault Output Supply Voltage Applied between VFO - COM -0.3 ~ VCC+0.3 V
IFO Fault Output Current Sink Current at VFO pin 2 mA
VSC Current Sensing Input Voltage Applied between CSC - COM -0.3 ~ VCC+0.3 V
Symbol Parameter Conditions Rating Unit
VRRM Maximum Repetitive Reverse Voltage 600 V
IFForward Current TC = 25°C, TJ 150°C (Note 4) 0.5 A
IFP Forward Current (Peak) TC = 25°C, TJ 150°C, Under 1 ms Pulse
Width (Note 4) 2.0 A
TJOperating Junction Temperature -40 ~ 150 °C
Symbol Parameter Conditions Rating Unit
VPN(PROT) Self Protection Supply Voltage Limit
(Short Circuit Protection Capability) VCC = VBS = 13.5 ~ 16.5 V, TJ = 150°C,
Non-repetitive, < 2 s400 V
TCModule Case Operation Temperature See Figure 2 -40 ~ 125 °C
TSTG Storage Temperature -40 ~ 125 °C
VISO Isolation Voltage 60 Hz, Sinusoidal, AC 1 minute, Connection
Pins to Heat Sink Plate 2500 Vrms
Symbol Parameter Conditions Min. Typ. Max. Unit
Rth(j-c)Q Junction to Case Thermal Resistance
(Note 5) Inverter IGBT part (per 1 / 6 module) - - 2.15 °C / W
Rth(j-c)F Inverter FWD part (per 1 / 6 module) - - 2.85 °C / W
©2015 Fairchild Semiconductor Corporation 6www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Electrical Characteristics (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Note:
6. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally.
For the detailed information, please see Figure 4.
Figure 4. Switching Time Definition
Symbol Parameter Conditions Min. Typ. Max. Unit
VCE(SAT) Collector - Emitter Saturation
Voltage VCC = VBS = 15 V
VIN = 5 V IC = 15 A, TJ = 25°C - - 2.0 V
VFFWDi Forward Voltage VIN = 0 V IF = 15 A, TJ = 25°C - - 2.2 V
HS tON Switching Times VPN = 300 V, VCC = 15 V, IC = 15 A
TJ = 25°C
VIN = 0 V 5 V, Inductive Load
See Figure 5
(Note 6)
-1.0-s
tC(ON) -0.4-s
tOFF -0.4-s
tC(OFF) -0.1-s
trr -0.1-s
LS tON VPN = 300 V, VCC = 15 V, IC = 15 A
TJ = 25°C
VIN = 0 V 5 V, Inductive Load
See Figure 5
(Note 6)
-0.8-s
tC(ON) -0.3-s
tOFF -0.8-s
tC(OFF) -0.1-s
trr -0.1-s
ICES Collector - Emitter Leakage
Current VCE = VCES --5mA
VCE IC
VIN
tON tC(ON)
VIN(ON)
10% IC
10% VCE
90% IC
100% IC
trr
100% IC
VCE
IC
VIN
tOFF tC(OFF)
VIN(OFF) 10% VCE 10% IC
(a ) tu rn -o n (b ) turn -o ff
©2015 Fairchild Semiconductor Corporation 7www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Figure 5. Example Circuit for Switchin g Test
Figure 6. Switching Loss Charac teristics
Figure 7. Temperature Profile of VTS (Typical)
One-Leg Diagram of SPM 3
P
NU,V,W
VCC(H)
IN(H)
COM(H)
VB
OUT(H)
VS
VCC(L)
IN(L)
COM(L)
OUT(L)
CSC
TSU
VFO
IC
VPN
U,V,W
Inductor
HS Switching
LS Switching
V300V
V
V
+15V
+5V
4.7kΩ
CBS
HS Switching
LS Swit ching
VIN
0V
5V VCC
©2015 Fairchild Semiconductor Corporation 8www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Bootstrap Diode Part
Control Part
Note:
7. Short-circuit current protection is functioning only at the low-sides.
8. TLVIC is the temperature of LVIC itself. VTS is only fo r sensing temperature of LVIC and can not shutdown IGBTs automatically.
Symbol Parameter Conditions Min. Typ. Max. Unit
VFForward Voltage IF = 0.1 A, TJ = 25°C - 2.5 - V
trr Reverse Recovery Time IF = 0.1 A, dIF / dt = 50 A / s, TJ = 25°C - 80 - ns
Symbol Parameter Conditions Min. Typ. Max. Unit
IQCCH Quiescent VCC Supply
Current VCC(H) = 15 V,
IN(UH,VH,WH) = 0 VVCC(H) - COM - - 0.60 mA
IQCCL VCC(L) = 15 V,
IN(UL,VL, WL) = 0 VVCC(L) - COM - - 6.0 mA
IPCCH
Operating VCC Supply
Current
VCC(H) = 15 V, fPWM = 20 kHz,
duty = 50%, applied to one
PWM signal input for High-
Side
VCC(H) - COM - - 2.0 mA
IPCCL VCC(L) = 15V, fPWM = 20 kHz,
duty = 50%, applied to one
PWM signal input for Low-
Side
VCC(L) - COM - - 10 . 0 mA
IQBS Quiescent VBS Supply
Current VBS = 15 V,
IN(UH, VH, WH) = 0 V VB(U) - VS(U),
VB(V) - VS(V),
VB(W) - VS(W)
--0.50mA
IPBS Operating VBS Supply
Current VCC = VBS = 15 V,
fPWM = 20 kHz, duty = 50%,
applied to one PWM signal
input for High-Side
VB(U) - VS(U),
VB(V) - VS(V),
VB(W) - VS(W)
--2.0mA
VFOH Fault Output Voltage VCC = 15 V, VSC = 0 V, VFO Circuit: 4.7 k to 5 V
Pull-up 4.5 - - V
VFOL VCC = 15 V, VSC = 1 V, VFO Circuit: 4.7 k to 5 V
Pull-up --0.5V
VSC(ref) Short Circuit Trip Level VCC = 15 V (Note 7) CSC - COM(L) 0.45 0.50 0.55 V
UVCCD Supply Circuit Under-
Voltage Protection Detection Level 9.8 - 13.3 V
UVCCR Reset Level 10.3 - 13.8 V
UVBSD Detection Level 10.0 - 12.0 V
UVBSR Reset Level 10.5 - 12.5 V
tFOD Fault-Out Pulse Width 50 - - s
VTS LVIC Temperature
Sensing Voltage Output VCC(L) = 15 V, TLVIC = 25°C (Note 8)
See Figure 7 540 640 740 mV
VIN(ON) ON Threshold Voltage Applied between IN(UH, VH, WH) - COM,
IN(UL, VL, WL) - COM --2.6V
VIN(OFF) OFF Threshold Voltage 0.8 - - V
©2015 Fairchild Semiconductor Corporation 9www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Recommended Operating Conditions
Note:
9. This product might not make response if input pulse width is less than the recommanded value.
Symbol Parameter Conditions Value Unit
Min. Typ. Max.
VPN Supply Voltage Applied between P - NU, NV, NW- 300 400 V
VCC Control Supply Voltage Applied between VCC(UH, VH, WH) - COM, VCC(L) -
COM 14.0 15 16.5 V
VBS High-Side Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) -
VS(W)
13.0 15 18.5 V
dVCC / d t,
dVBS / dt Control Supply
Variation - 1 - 1 V / s
tdead Blanking Time for
Preventing Arm - Short For Each Input Signal 2.0 - - s
fPWM PWM Input Signal -40C TC 125°C, -40C TJ 150°C - - 20 kHz
VSEN Voltage for Current
Sensing Applied between NU, NV, NW - COM
(Including Surge Voltage) - 4 4 V
TJJunction Temperature - 40 - 150 C
©2015 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Mechanical Characteristics and Ratings
Figure 8. Flatness Measurement Position
Figure 9. Mounting Screws Torque Order
Note:
10. Do not make over torque when mounting screws. Much mounting torque may cause DBC cracks, as well as bolts and Al heat-sink destruction.
11. Avoid one-sided tightening stress. Figure 9 show s the recommended torque order for mounting screws. Uneven mounting can cause the DBC substrate of package to be
damaged. The pre-screwing torq ue is set to 20 ~ 30% of maximum torque rating.
Parameter Conditions Min. Typ. Max. Unit
Mounting Torque Mounting Screw: M3 Recommended 0.62 N•m 0.51 0.62 0.80 N•m
Device Flatness See Figure 7 0 - +150 m
Weight - 15.00 - g
( + )
( + )
( + )
( + )
1
2Pre - Scr ewing : 1 2
Final Screwing : 2 1
©2015 Fairchild Semiconductor Corporation 11 www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Time Charts of SPMs Protective Function
Figure 10. Under-Voltage Protection (Low-Side)
a1 : Control supply voltage rises: After the voltage rises UVCCR, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under voltage detection (UVCCD).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts with a fixed pulse width.
a6 : Under voltage reset (UVCCR).
a7 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
Figure 11. Under-Voltage Protection (High-Side)
b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under voltage detection (UVBSD).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under voltage reset (UVBSR).
b6 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
©2015 Fairchild Semiconductor Corporation 12 www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Figure 12. Short-Circuit Current Protection (Low-Side Operation only)
(with the external sense resistance and RC filter connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short circuit current detection (SC trigger).
c3 : All low-side IGBT’s gate are hard interrupted.
c4 : All low-side IGBTs turn OFF.
c5 : Fault output operation starts with a fixed pulse width.
c6 : Input HIGH: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c7 : Fault output operation finishes, but IGBT doesn’t turn on until triggering next signal from LOW to HIGH.
c8 : Normal operation: IGBT ON and carrying current.
Input/Output Interface Circuit
Figure 13. Recommended CPU I/O Interface Circuit
Note:
12. RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s print ed circuit board.
The input signal section of the Motion SPM 3 product integrates 5 k(typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the
signal voltage drop at input terminal.
Lower arms
control input
Output Current
Sensing Voltage
of sense resistor
Fault Output Signal
S C Referenc e Volt age
RC Filter circuit
t ime c onstant
delay
S C current t ri p level
Protection
Cir cuit state SET RESET
c6 c7
c3
c2
c1 c8
c4
c5
Internal IGBT
G ate-Emi tter Voltage I nternal del ay
at protect ion circui t
MCU
COM
+ 5V (M CU or C o nt rol power)
,,
IN(UL) IN(VL) IN(WL)
,,
IN(UH) IN(VH) IN(WH)
VFO
4. 7 kΩSPM
©2015 Fairchild Semiconductor Corporation 13 www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Figure 14. Typical Application Circuit
Note:
13. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 - 3 cm)
14. VFO output is open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2 mA. Please
refer to Figure 13.
15. Input signal is active-HIGH type. There is a 5 k resistor inside the IC to pull-down each input signal line to GND. RC coupling circuits should be adopted for the prevention
of input signal oscillation. R1C1 time constant should be selected in the range 50 ~ 150 ns. (Recommended R1 = 100 Ω, C1 = 1 nF)
16. Each wiring pattern inductance of A point should be minimized (Recommend less than 10nH). Use the shunt resistor R4 of surface moun ted (SMD) type to reduce wiring
inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R4 as close as possible.
17. To prevent errors of the protection function, the wiring of B, C, and D point should be as short as possible.
18. In the short-circuit protection circuit, please select the R6C6 time c onstant in the ra nge 1. 5 ~ 2 s. Do enough evaluaiton on the real system because short-circuit protection
time may vary wiring pattern layout and value of the R6C6 time constant.
19. Each capacitor should be mounted as close to the pins of the Motion SPM® 3 product as possible.
20. To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short as possible. The use of a high-frequency non-inductive
capacitor of around 0.1 ~ 0.22 F between the P & GND pins is recommended.
21. Relays are used at almost every systems of electrical equipments at industrial application. In these cases, there should be sufficient distance between the CPU and the
relays.
22. The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals
(Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15Ω).
23. C2 of around 7 times larger than bootstrap capacitor C3 is recommended.
24. Please choose the electrolytic capacitor with good temperature char acteristic in C3. Also, choose 0.1 ~ 0.2 F R-category ceramic capacitors with good t emperature and
frequency characteristics in C4.
Fault
C3C4
C2C4
5V line
R3
C1
R1
M
VDC
C7
Gating UH
Gating VH
Gating WH
Gating WL
Gating VL
Gating UL
C1
M
C
U
R5
R5
R5
R4
R4
R4
C5C5
C5
W-Phase C urrent
V- Phas e Current
U-Phase Current
R6
COM
VCC
IN
IN
IN
VFO
VTS
CSC
OUT
OUT
OUT
NU(21)
NV(22)
NW(23)
U (24)
V (2 5)
W (2 6)
P (2 7)
(20) VS(W)
(19) VB(W)
(16) VS(V)
(15) VB(V)
(8) CSC
(7) VTS
(6) VFO
(5) IN(W L )
(4) IN(V L)
(3) IN(U L )
(2) COM
(1) VCC(L)
VCC
VB
OUT
COM
VS
IN
(18) VCC( H)
(17) IN(WH)
(14) VCC( H)
(13) IN(VH)
(12) VS(U)
(11) VB(U)
(10) VCC(H)
(9) IN(UH)
Input Signal for
S hort- Circ ui t P rot ect i on
C6
R1
R1
R1
R1
R1
R1
C1C1C1
A
BD
C
E
VCC
VB
OUT
COM
VS
IN
VCC
VB
OUT
COM
VS
IN
C3C4
C3C4
15V line
C4
C4
C4
C1C1
C1
D2
D2
D2
Pow er
GN D Line
Control
GND Line
D2
VTS
C5
©2015 Fairchild Semiconductor Corporation 14 www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
FSBB15CH60D Motion SPM® 3 Series
Detailed Package Outline Drawings (FSBB15CH60D)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions,
specifically the the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MO/MOD27BA.pdf
©2015 Fairchild Semiconductor Corporation 15 www.fairchildsemi.com
FSBB15CH60D Rev. 1.0
www.onsemi.com
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