8Kx8 Power-Switched and Reprogrammable PROM
CY7C266
Cypress Semiconductor Corporation • 198 Champion Court • San Jose,CA 95134-1709 • 408-943-2600
Document #: 38-04005 Rev. *C Revised August 16, 2006
Features
• CMOS for optimum speed/power
• Windowed for reprogrammability
• High speed
— 20 ns (Commercial)
• Low power
— 660 mW (Commercial)
• Super low standby power
— Less than 85 mW when deselected
• EPROM technology 100% programma ble
•5V ±10% V
CC, commercial and military
• TTL-compatible I/O
• Direct replacement for 27C64 EPROMs
Functional Description
The CY7C266 is a high-performance 8192-word by 8-bit
CMOS PROM. When deselected, the CY7C266 automatically
powers down into a low-power standby mode. It is packaged
in a 600-mil-wide package. The reprogrammable packages
are equipped with an erasure window; when exposed to UV
light, these PROMs are erased and can then be repro-
grammed. The memory cells utilize proven EPROM
floating-gate technology and byte-wide intelligent
programming algorithms.
The CY7C266 is a plug-in replacement for EPROM devices.
The EPROM cell requires only 12.5V for the super voltage and
low-current requirements allow for gang programming. The
EPROM cells allow for each memory location to be tested
100%, as each location is written into, erased, and repeatedly
exercised prior to encapsulation. Each PROM is also tested
for AC performance to guarantee that after customer
programming, the product will meet DC and AC specification
limits.
Reading is accomplished b y placing an active LOW signal on
OE and CE. The contents of the memory location addressed
by the address lines (A0 through A12) will become available on
the output lines (O0 through O7).
LogicBlockDiagram Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
Top View
CerDIP
VCC
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
VCC
NC
A8
A9
A11
OE
A10
CE
O7
O6
O4
O5
O3
A0
A1
A7
A2
A3
A4
A5
A6
A8
A9
A10
A11
A12
POWER DOWN
O7
O6
O5
O4
O3
O2
O1
O0
CE
OE
PROGRAMMABLE
ARRAY MULTIPLEXER
COLUMN
ADDRESS
12
O0
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
A7
VCC
A6
A5
A4
A3
A2
A1
A0CE
A9
A11
NC
A10
O7
O6
O4
GND
Top View
LCC
A8
OE
A12
VCC
O3
O2
O1
181920
27
28
29
32
NC
NC
NC
O5
NC
VCC
15
7C266
7C266
ADDRESS
DECODER
ROW
ADDRESS
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CY7C266
Document #: 38-04005 Rev. *C Page 2 of 12
Maximum Ratings[1]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Potential
(Pin 28 to Pin 14)............ ... .............. ... .. .........–0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State ............. ... ...............................–0.5V to +7.0V
DC Input Voltage............................................–3.0V to +7.0V
DC Program Voltage....................... ............... .. .............13.0V
Static Discharge Voltage...........................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current....................................................> 200 mA
UV Exposure .................................. ... ...........7258 Wsec/cm2
Selection Guide
7C266-20 7C266-25 7C266-45 Unit
Maximum Access Time 20 25 45 ns
Maximum Operating Current Commercial 120 120 100 mA
Maximum Standby Current Commercial 15 15 15 mA
Operating Range
Range Ambient
Temperature VCC
Commercial 0°C to +70°C 5V ± 10%
Notes
1. The voltage on any input or I/ O pin cannot exceed the power pin during power-up.
2. See the “Introduction to CMOS PROMs” section of the Cypress Data Book for general information on te sting.
3. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.
Electrical Characteristics Over the Operating Range[2]
Parameter Description Test Conditions 7C266-20 7C266-25 Unit
Min. Max. Min. Max.
VOH Output HIGH Voltage VCC = Min.,
IOH = –2.0 mA Com’l 2.4 2.4 V
2.4
VOL Output LOW Voltage VCC = Min., IOL = 8. 0 mA Com’l 0.4 0.4 V
VIH Input HI GH Voltage 2.0 2.0 V
VIL Input LOW Voltage 0.8 0.8 V
IIX Input Current GND < VIN < VCC –10 +10 –10 +10 µA
VCD Input Diode
Clamp Voltage Note 3
IOZ Output Leakage Current VOL < VOUT < VOH,
Output Disabled –40 +40 –40 +40 µA
IOS Output Short
Circuit Current[3] VCC = Max., VOUT = GND –20 –90 –20 –90 mA
ICC Power Supply Current VCC = Max., VIN = 2.0V,
IOUT = 0 mA Com’l 120 120 mA
ISB Standby Supply Current Chip Enable Inactive,
CE > VIH, IOUT = 0 mA Com’l 15 15 mA
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CY7C266
Document #: 38-04005 Rev. *C Page 3 of 12
Electrical Characteristics Over the Operating Range[2] (continued)
Parameter Description Test Conditions 7C266-45 Unit
Min. Max.
VOH Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 V
VOL Output LOW Voltage VCC = Min., IOL = 16.0 mA 0.4 V
VIH Input HIGH Voltage 2.0 V
VIL Input LOW Voltage 0.8 V
IIX Input Current GND < VIN < VCC –10 +10 mA
VCD Input Diode Clamp
Voltage Note 3
IOZ Output Leakage Current VOL < VOUT < VOH,
Output Disabled –10 +10 mA
IOS Output Short
Circuit Current[3] VCC = Max., VOUT = GND –20 –90 mA
ICC Power Supply Current VCC = Max., VIN = 2.0V,
IOUT = 0 mA Com’l 100 mA
ISB Standby Supply Current Chip Enable Inactive,
CE > VIH, IOUT = 0 mA Com’l 15 mA
Capacitance[2]
Parameter Description Test Conditions Max. Unit
CIN Input Capacitance TA = 25°C, f = 1 MHz,
VCC = 5.0V 10 pF
COUT Output Capacita nce 10 pF
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CY7C266
Document #: 38-04005 Rev. *C Page 4 of 12
AC Test Loads and Waveforms
R2333Ω
(403ΩMIL)
3.0V
5V
OUTPUT
R1500
(658ΩMIL)
30 pF
INCLUDING
JIG AND
SCOPE
GND 90%
10%
90%
10%
<5ns <5ns
5V
OUTPUT
5pF
INCLUDING
JIG AND
SCOPE
(a) NormalLoad (b) HighZ Load
OUTPUT RTH 200
5V
OUTPUT 5V
OUTPUT
R1250Ω
30pF
INCLUDING
JIG AND
SCOPE
5pF
INCLUDING
JIG AND
SCOPE
(c)NormalLoad (d) HighZ Load
OUTPUT 2.0V
RTH 100Ω
R1250Ω
R1500Ω
(658ΩMIL)
R2333Ω
(403ΩMIL)
R2167ΩR2167Ω
250 MIL
Test Load for -20 through -25 speeds
Test Load for -35 through -45 sp eeds
Equivalent to: THÉ VENIN EQUIVALENT
Equivalent to: THÉ VENIN EQUIVALENT
Switching Characteristics Over the Operating Range[2]
Parameter Description 7C266-20 7C266-25 7C266-45 Unit
Min. Max. Min. Max. Min. Max.
tAA Address to Output Valid 20 25 45 ns
tHZCE Chip Enable Inactive to High Z 25 30 45 ns
tHZOE Output Enable Inactive to High Z 12 12 20 ns
tAOE Output Enable Active to Output Valid 12 12 20 ns
tACE Chip Enable Active to Output Valid 25 30 45 ns
tOHA Data Hold from Address Change 333ns
tPU Chip Enable Active to Power-up 25 30 45 ns
tPD Chip Enable Inactive to Power-down 25 30 45 ns
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CY7C266
Document #: 38-04005 Rev. *C Page 5 of 12
Erasure Characteristics
W avelengths of light less than 4000 angstroms begin to erase
the devices in the windowed package. For this reason, an
opaque label should be placed over the window if the EPROM
is exposed to sunlight or fluorescent lighting for extended
periods of time .
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV
intensity multiplied by exposure time) of 25 Wsec/cm2. For an
ultraviolet lamp with a 12 mW/cm2 power rating, the exposure time
would be approximately 35 minutes. The CY7C266 needs to be
within 1 inch of the l amp during erasure. Permane nt damage may
result if the EPROM is exposed to high-intensity UV light for an
extended period of time.
7258 Wsec/cm2 is the recommended maximum dosage.
Programming Modes
Programming support is available from Cypress as well as
from a number of third party software vendors. For detailed
programming information, including a listing of software
packages, please see the PROM Programming Information
located at the end of this section. Programming algorithms can
be obtained from any Cypress representative.
Figure 1. Progra mming Pinout
Table 1. Mode Selection
Mode Pin Function[4, 5]
Normal Operation A8A9A10 A11 A12 CE OE D7–D0
Program VFY PGM LAT NA NA CE VPP D7–D0
Read A8A9A10 A11 A12 VIL VIL O7–O0
Standby X X X X X VIH XThree-Stated
Output Disable A8A9A10 A11 A12 VIL VIH Three-Stated
Program VIHP VILP VILP VILP VILP VILP VPP D7–D0
Program Verify VILP VIHP VILP VILP VILP VILP VPP O7–O0
Program Inhibit VIHP VIHP VILP VILP VILP VILP VPP Three-Stated
Blank Check VILP VIHP VILP VILP VILP VILP VPP O7–O0
Notes
4. X = “don’t care” but must not exceed VCC + 5%.
5. Address A8–A12 must be latched thr ough lines A0–A4 in Programming mo des.
1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
NC
NA
A7
A6
A5
A4/A12
A3/A11
A2/A10
A1/A9
A0/A8
D0
D1
D2
VSS
VPP
NC
NC
VFY
PGM
NA
VPP
CE
D7
D6
D4
D5
D3
12
D0
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
A7
VCC
A6
A5
A4/A12
A3/A11
A2/A1
0
A1/A9
A0/A8CE
PGM
NA
NC
LAT
D7
D6
D4
VFY
V
CC
D3
D2
D1
181920
27
28
29
32
NC
NC
NC
D5
NC
VCC
15
NA
VPP
VSS
LAT
CerDIP LCC/PLCC
Top View
Top View
7C266 7C266
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CY7C266
Document #: 38-04005 Rev. *C Page 6 of 12
Typical DC and AC Characteristics
TYPICAL ACCESS TIME CHANGE
vs. OUTPUT LOADING
1.4
1.6
1.0
0.8
4.0 4.5 5.0 5.5 6.0 −55 25 125
1.2
1.1
1.2
1.0
0.8
0.6
4.0 4.5 5.0 5.5 6.0
NORMALIZED ACCESS TIME
SUPPLY VOLTAGE(V)
NORMALIZED SUPPLY CURRENT
vs. SUPPLY VOLTAGE NORMALIZED SUPPLY CURRENT
vs. AMBIENT TEMPERATURE
AMBIENT TEMPERATURE(°C) SUPPLY VOLTAGE(V)
NORMALIZED ACCESS TIME
vs. SUPPLY VOLTAGE
0.6
1.2
1.6
1.4
1.2
1.0
0.8
–55 125
AMBIENT TEMPERATURE (°C)
NORMALIZED ACCESS TIME
vs. TEMPERATURE
150
175
125
75
50
25
0.0 1.0 2.0 3.0
OUTPUT SINK CURRENT (mA)
0
100
OUTPUT VOLTAGE (V)
OUTPUT SINK CURRENT
vs. OUTPUT VOLTAGE
1.0
0.9
0.8
NORMALIZED I CC
NORMALIZED I
CC
VCC = 5.0V
TA= 25°C
TA= 25°C
0.6
0.4
60
50
40
30
20
10
01.0 2.03.0
OUTPUT SOURCE CURRENT (mA)
OUTPUT VOLTAGE (V)
30
25
20
15
10
5
0 200 400 600 800
DELTA t (ns)
AA
CAPACITANCE (pF)
4.0 1000
VCC = 4.5V
TA= 25°C
TA= 25°C
f= f
MAX
25 0
OUTPUT SOURCE CURRENT
vs. VOLTAGE
4.0
1.00
1.05
0.95
0.85
0.80
0.75
025 5075
100
0.70
0.90
NORMALIZED SUPPLY CURRENT
vs. CYCLE PERIOD
CYCLE PERIOD (ns)
NORMALIZED I
CC
VCC = 5.5V
TA = 25°C
0
35
NORMALIZED ACCESS TIME
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CY7C266
Document #: 38-04005 Rev. *C Page 7 of 12
Ordering Information
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
20 CY7C266-20JC J64 28-Lead Plastic Leaded Chip Carrier Commercial
CY7C266-20WC W16 28-Lead (6 00-Mil) Windowed CerDIP
Package Diagrams
Figure 2. 28-Lead(600-Mil) CerDIP D16
MIL-STD-1835 D-10 Config. A
51-80019-**
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CY7C266
Document #: 38-04005 Rev. *C Page 9 of 12
Figure 4. 28LD(600 MIL) PDIP Package Outline
Package Diagrams (continued)
DIMENSIONS IN INCHES MIN.
MAX.
SEATING PLANE
0.090
0.110
0.055
0.065
0.140
0.195
0.015
0.060
0.014
0.022
0.155
0.200
1.380
1.480
0.115
0.160
0.530
0.550
0.070
0.090
114
15 28
REFERENCE JEDEC Ms-020
0.600
0.625
0.610
0.700
0.009
0.012
3° MIN.
51-85017-*B
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CY7C266
Document #: 38-04005 Rev. *C Page 11 of 12
© Cypress Semi con duct or Cor po rati on , 20 06 . The information con t a in ed he re i n is subject to change wi t hou t n oti ce. C ypr ess S em ic on duct or Cor po rati on assu me s no resp onsi b i lity f or th e u s e
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significan t injury to the user. The inclusion of Cypre ss
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Figure 6. 28-Lead (600-Mil) Windowed CerDIP W16
All product and company names mentioned in this document may be the trademarks of their respective holders.
Package Diagrams (continued)
MIL-STD-1835 D-10 Config. A
51-80020-**
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CY7C266
Document #: 38-04005 Rev. *C Page 12 of 12
Document History Page
Document Title: CY7C266 8K x 8 Power Switched and Reprogrammable PROM
Document Number: 38-04005
REV. ECN NO. Issue
Date Orig. of
Change Description of Change
** 113861 03/08/02 DSG Changed from Spec number: 38-00086 to 38-04005
*A 118897 10/09/02 GBI Updated ordering information
*B 122246 12/27/02 RBI Added power up requirements to Operating Conditions Informa tion
*C 499538 See ECN PCI Updated ordering information
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