AON7400A
30V N-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 40A
R
DS(ON)
(at V
GS
=10V) < 7.5m
R
DS(ON)
(at V
GS
= 4.5V) < 10.5m
100% UIS Tested
100% R
g
Tested
Symbol
V
DS
• The AON7400A combines advanced trench MOSFET
technology with a low resistance package to provide
extremely low R
DS(ON)
. This device is suitable for use as a
high side switch in SMPS and general purpose
applications.
• RoHS and Halogen-Free Compliant
V
Maximum UnitsParameter
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
30V
Drain-Source Voltage
30
G
D
S
DFN 3x3 EP
Top View Bottom View
Pin 1
Top View
1
2
3
4
8
7
6
5
V
DS
V
GS
I
DM
I
AS
, I
AR
E
AS
, E
AR
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJC
Maximum Junction-to-Case °C/W
°C/W
Maximum Junction-to-Ambient
4.2
75
5
W
Power Dissipation
A
P
DSM
W
T
A
=70°C
25
2
T
A
=25°C
I
D
40
28
T
C
=25°C
T
C
=100°C
Power Dissipation
B
P
D
Continuous Drain
Current
36
15
A27
A
T
A
=25°C I
DSM
A
T
A
=70°C
V
40
V±20Gate-Source Voltage
Drain-Source Voltage
30
Avalanche energy L=0.1mH
C
mJ
Avalanche Current
C
12
Junction and Storage Temperature Range -55 to 150 °C
Thermal Characteristics
Units
Maximum Junction-to-Ambient
A
°C/W
R
θJA
30
60
100Pulsed Drain Current
C
Continuous Drain
Current
G
Parameter Typ Max
T
C
=25°C
3.1
10
T
C
=100°C
Rev 4.0: August 2014
www.aosmd.com Page 1 of 6
AON7400A
Symbol Min Typ Max Units
BV
DSS
30 V
V
DS
=30V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
100 nA
V
GS(th)
Gate Threshold Voltage 1.5 1.97 2.5 V
I
D(ON)
100 A
6.2 7.5
T
J
=125°C 9.4 11.3
8.4 10.5 m
g
FS
55 S
V
SD
0.7 1 V
I
S
30 A
C
iss
920 1150 1380 pF
C
oss
125 180 235 pF
C
rss
60 105 150 pF
R
g
0.55 1.1 1.65
Q
g
(10V) 16 20 24 nC
Q
g
(4.5V) 7.6 9.5 11.4 nC
Q
gs
2 2.7 3.2 nC
Q
gd
3 5 7 nC
t
D(on)
6.5 ns
t
2
Reverse Transfer Capacitance
V
GS
=0V, V
DS
=15V, f=1MHz
SWITCHING PARAMETERS
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS
Parameter Conditions
Drain-Source Breakdown Voltage
On state drain current
I
D
=250µA, V
GS
=0V
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=20A
R
DS(ON)
Static Drain-Source On-Resistance
I
DSS
µA
V
DS
=V
GS
I
D
=250µA
V
DS
=0V, V
GS
= ±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
m
I
S
=1A,V
GS
=0V
V
DS
=5V, I
D
=20A
V
GS
=4.5V, I
D
=20A
Forward Transconductance
Diode Forward Voltage
V
=10V, V
=15V, R
=0.75
,
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge
V
GS
=10V, V
DS
=15V, I
D
=20A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
t
r
2
t
D(off)
17 ns
t
f
3.5 ns
t
rr
78.7 10.5 ns
Q
rr
11 13.5 16 nC
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
I
F
=20A, dI/dt=500A/µs
Body Diode Reverse Recovery Time
V
GS
=10V, V
DS
=15V, R
L
=0.75
,
R
GEN
=3
Turn-Off Fall Time
Body Diode Reverse Recovery Charge I
F
=20A, dI/dt=500A/µs
Turn-On Rise Time
Turn-Off DelayTime
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
Power dissipation PDSM is based on R θJA t ≤ 10s value and the maximum allowed junction temperature of 150°C. The value in any given
application depends on the user's specific board design.
B. The power dissipation PDis based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
Rev 4.0: August 2014 www.aosmd.com Page 2 of 6
AON7400A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
20
40
60
80
100
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
ID(A)
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
2
4
6
8
10
12
0 5 10 15 20 25 30
RDS(ON) (m)
ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1
1.2
1.4
1.6
1.8
0 25 50 75 100 125 150 175
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=4.5V
ID=20A
VGS=10V
ID=20A
25°C
125°C
V
DS
=5V
VGS=4.5V
VGS=10V
0
20
40
60
80
100
120
012345
ID(A)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=3V
3.5V
5V
6V
10V
4V
4.5V
40
Voltage (Note E)
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
0.0 0.2 0.4 0.6 0.8 1.0 1.2
IS(A)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
(Note E)
0
5
10
15
20
25
2 4 6 8 10
RDS(ON) (m)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
ID=20A
25°C
125°C
Rev 4.0: August 2014 www.aosmd.com Page 3 of 6
AON7400A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
2
4
6
8
10
0 5 10 15 20
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
200
400
600
800
1000
1200
1400
1600
0 5 10 15 20 25 30
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
0
40
80
120
160
200
0.0001 0.001 0.01 0.1 1 10
Power (W)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction
-
to
-
Coss
C
rss
VDS=15V
ID=20A
TJ(Max)=150°C
TC=25°C
10
µ
s
0.0
0.1
1.0
10.0
100.0
1000.0
0.01 0.1 1 10 100
ID(Amps)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
µ
s
10ms
1ms
DC
RDS(ON)
limited
TJ(Max)=150°C
TC=25°C
100
µ
s
40
Figure 10: Single Pulse Power Rating Junction
-
to
-
Case (Note F)
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100
ZθJC Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Operating Area (Note F)
RθJC=5°C/W
Rev 4.0: August 2014 www.aosmd.com Page 4 of 6
AON7400A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
10
100
1 10 100 1000
IAR (A) Peak Avalanche Current
Time in avalanche, tA(µs)
Figure 12: Single Pulse Avalanche capability
(Note C)
0
5
10
15
20
25
30
0 25 50 75 100 125 150
Power Dissipation (W)
TCASE (°C)
Figure 13: Power De-rating (Note F)
0
10
20
30
40
50
0 25 50 75 100 125 150
Current rating ID(A)
TCASE (°C)
Figure 14: Current De
-
rating (Note F)
TA=25°C
1
10
100
1000
10000
0.00001 0.001 0.1 10 1000
Power (W)
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction
-
to
-
TA=25°C
TA=150°C
TA=100°C
TA=125°C
40
0.001
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
ZθJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Figure 14: Current De
-
rating (Note F)
Figure 15: Single Pulse Power Rating Junction
-
to
-
Ambient (Note H)
RθJA=75°C/W
Rev 4.0: August 2014 www.aosmd.com Page 5 of 6
AON7400A
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VD C
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Id
+
L
Vds
BV
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds
DSS
2
E = 1/2 LI
AR
AR
Vdd
Vgs
Vgs
Rg
DUT
-
+
VDC
Vgs
Id
Vgs
I
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
I
F
AR
dI/dt
I
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
Rev 4.0: August 2014 www.aosmd.com Page 6 of 6